drivers/video/via/accel.c

   1 /*
   2  * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
   4
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public
   7  * License as published by the Free Software Foundation;
   8  * either version 2, or (at your option) any later version.
   9
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
  12  * the implied warranty of MERCHANTABILITY or FITNESS FOR
  13  * A PARTICULAR PURPOSE.See the GNU General Public License
  14  * for more details.
  15
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.,
  19  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20  */
  21 #include "global.h"
  22
  23 static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height,
  24         u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y,
  25         u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y,
  26         u32 fg_color, u32 bg_color, u8 fill_rop)
  27 {
  28         u32 ge_cmd = 0, tmp, i;
  29
  30         if (!op || op > 3) {
  31                 printk(KERN_WARNING "hw_bitblt_1: Invalid operation: %d\n", op);
  32                 return -EINVAL;
  33         }
  34
  35         if (op != VIA_BITBLT_FILL && !src_mem && src_addr == dst_addr) {
  36                 if (src_x < dst_x) {
  37                         ge_cmd |= 0x00008000;
  38                         src_x += width - 1;
  39                         dst_x += width - 1;
  40                 }
  41                 if (src_y < dst_y) {
  42                         ge_cmd |= 0x00004000;
  43                         src_y += height - 1;
  44                         dst_y += height - 1;
  45                 }
  46         }
  47
  48         if (op == VIA_BITBLT_FILL) {
  49                 switch (fill_rop) {
  50                 case 0x00: /* blackness */
  51                 case 0x5A: /* pattern inversion */
  52                 case 0xF0: /* pattern copy */
  53                 case 0xFF: /* whiteness */
  54                         break;
  55                 default:
  56                         printk(KERN_WARNING "hw_bitblt_1: Invalid fill rop: "
  57                                 "%u\n", fill_rop);
  58                         return -EINVAL;
  59                 }
  60         }
  61
  62         switch (dst_bpp) {
  63         case 8:
  64                 tmp = 0x00000000;
  65                 break;
  66         case 16:
  67                 tmp = 0x00000100;
  68                 break;
  69         case 32:
  70                 tmp = 0x00000300;
  71                 break;
  72         default:
  73                 printk(KERN_WARNING "hw_bitblt_1: Unsupported bpp %d\n",
  74                         dst_bpp);
  75                 return -EINVAL;
  76         }
  77         writel(tmp, engine + 0x04);
  78
  79         if (op != VIA_BITBLT_FILL) {
  80                 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)
  81                         || src_y & 0xFFFFF000) {
  82                         printk(KERN_WARNING "hw_bitblt_1: Unsupported source "
  83                                 "x/y %d %d\n", src_x, src_y);
  84                         return -EINVAL;
  85                 }
  86                 tmp = src_x | (src_y << 16);
  87                 writel(tmp, engine + 0x08);
  88         }
  89
  90         if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {
  91                 printk(KERN_WARNING "hw_bitblt_1: Unsupported destination x/y "
  92                         "%d %d\n", dst_x, dst_y);
  93                 return -EINVAL;
  94         }
  95         tmp = dst_x | (dst_y << 16);
  96         writel(tmp, engine + 0x0C);
  97
  98         if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {
  99                 printk(KERN_WARNING "hw_bitblt_1: Unsupported width/height "
 100                         "%d %d\n", width, height);
 101                 return -EINVAL;
 102         }
 103         tmp = (width - 1) | ((height - 1) << 16);
 104         writel(tmp, engine + 0x10);
 105
 106         if (op != VIA_BITBLT_COLOR)
 107                 writel(fg_color, engine + 0x18);
 108
 109         if (op == VIA_BITBLT_MONO)
 110                 writel(bg_color, engine + 0x1C);
 111
 112         if (op != VIA_BITBLT_FILL) {
 113                 tmp = src_mem ? 0 : src_addr;
 114                 if (dst_addr & 0xE0000007) {
 115                         printk(KERN_WARNING "hw_bitblt_1: Unsupported source "
 116                                 "address %X\n", tmp);
 117                         return -EINVAL;
 118                 }
 119                 tmp >>= 3;
 120                 writel(tmp, engine + 0x30);
 121         }
 122
 123         if (dst_addr & 0xE0000007) {
 124                 printk(KERN_WARNING "hw_bitblt_1: Unsupported destination "
 125                         "address %X\n", dst_addr);
 126                 return -EINVAL;
 127         }
 128         tmp = dst_addr >> 3;
 129         writel(tmp, engine + 0x34);
 130
 131         if (op == VIA_BITBLT_FILL)
 132                 tmp = 0;
 133         else
 134                 tmp = src_pitch;
 135         if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {
 136                 printk(KERN_WARNING "hw_bitblt_1: Unsupported pitch %X %X\n",
 137                         tmp, dst_pitch);
 138                 return -EINVAL;
 139         }
 140         tmp = VIA_PITCH_ENABLE | (tmp >> 3) | (dst_pitch << (16 - 3));
 141         writel(tmp, engine + 0x38);
 142
 143         if (op == VIA_BITBLT_FILL)
 144                 ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;
 145         else {
 146                 ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */
 147                 if (src_mem)
 148                         ge_cmd |= 0x00000040;
 149                 if (op == VIA_BITBLT_MONO)
 150                         ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;
 151                 else
 152                         ge_cmd |= 0x00000001;
 153         }
 154         writel(ge_cmd, engine);
 155
 156         if (op == VIA_BITBLT_FILL || !src_mem)
 157                 return 0;
 158
 159         tmp = (width * height * (op == VIA_BITBLT_MONO ? 1 : (dst_bpp >> 3)) +
 160                 3) >> 2;
 161
 162         for (i = 0; i < tmp; i++)
 163                 writel(src_mem[i], engine + VIA_MMIO_BLTBASE);
 164
 165         return 0;
 166 }
 167
 168 /*
 169  * Figure out an appropriate bytes-per-pixel setting.
 170  */
 171 static int viafb_set_bpp(void __iomem *engine, u8 bpp)
 172 {
 173         u32 gemode;
 174
 175         /* Preserve the reserved bits */
 176         /* Lowest 2 bits to zero gives us no rotation */
 177         gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;
 178         switch (bpp) {
 179         case 8:
 180                 gemode |= VIA_GEM_8bpp;
 181                 break;
 182         case 16:
 183                 gemode |= VIA_GEM_16bpp;
 184                 break;
 185         case 32:
 186                 gemode |= VIA_GEM_32bpp;
 187                 break;
 188         default:
 189                 printk(KERN_WARNING "hw_bitblt_2: Unsupported bpp %d\n", bpp);
 190                 return -EINVAL;
 191         }
 192         writel(gemode, engine + VIA_REG_GEMODE);
 193         return 0;
 194 }
 195
 196
 197 static int hw_bitblt_2(void __iomem *engine, u8 op, u32 width, u32 height,
 198         u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y,
 199         u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y,
 200         u32 fg_color, u32 bg_color, u8 fill_rop)
 201 {
 202         u32 ge_cmd = 0, tmp, i;
 203         int ret;
 204
 205         if (!op || op > 3) {
 206                 printk(KERN_WARNING "hw_bitblt_2: Invalid operation: %d\n", op);
 207                 return -EINVAL;
 208         }
 209
 210         if (op != VIA_BITBLT_FILL && !src_mem && src_addr == dst_addr) {
 211                 if (src_x < dst_x) {
 212                         ge_cmd |= 0x00008000;
 213                         src_x += width - 1;
 214                         dst_x += width - 1;
 215                 }
 216                 if (src_y < dst_y) {
 217                         ge_cmd |= 0x00004000;
 218                         src_y += height - 1;
 219                         dst_y += height - 1;
 220                 }
 221         }
 222
 223         if (op == VIA_BITBLT_FILL) {
 224                 switch (fill_rop) {
 225                 case 0x00: /* blackness */
 226                 case 0x5A: /* pattern inversion */
 227                 case 0xF0: /* pattern copy */
 228                 case 0xFF: /* whiteness */
 229                         break;
 230                 default:
 231                         printk(KERN_WARNING "hw_bitblt_2: Invalid fill rop: "
 232                                 "%u\n", fill_rop);
 233                         return -EINVAL;
 234                 }
 235         }
 236
 237         ret = viafb_set_bpp(engine, dst_bpp);
 238         if (ret)
 239                 return ret;
 240
 241         if (op == VIA_BITBLT_FILL)
 242                 tmp = 0;
 243         else
 244                 tmp = src_pitch;
 245         if (tmp & 0xFFFFC007 || dst_pitch & 0xFFFFC007) {
 246                 printk(KERN_WARNING "hw_bitblt_2: Unsupported pitch %X %X\n",
 247                         tmp, dst_pitch);
 248                 return -EINVAL;
 249         }
 250         tmp = (tmp >> 3) | (dst_pitch << (16 - 3));
 251         writel(tmp, engine + 0x08);
 252
 253         if ((width - 1) & 0xFFFFF000 || (height - 1) & 0xFFFFF000) {
 254                 printk(KERN_WARNING "hw_bitblt_2: Unsupported width/height "
 255                         "%d %d\n", width, height);
 256                 return -EINVAL;
 257         }
 258         tmp = (width - 1) | ((height - 1) << 16);
 259         writel(tmp, engine + 0x0C);
 260
 261         if (dst_x & 0xFFFFF000 || dst_y & 0xFFFFF000) {
 262                 printk(KERN_WARNING "hw_bitblt_2: Unsupported destination x/y "
 263                         "%d %d\n", dst_x, dst_y);
 264                 return -EINVAL;
 265         }
 266         tmp = dst_x | (dst_y << 16);
 267         writel(tmp, engine + 0x10);
 268
 269         if (dst_addr & 0xE0000007) {
 270                 printk(KERN_WARNING "hw_bitblt_2: Unsupported destination "
 271                         "address %X\n", dst_addr);
 272                 return -EINVAL;
 273         }
 274         tmp = dst_addr >> 3;
 275         writel(tmp, engine + 0x14);
 276
 277         if (op != VIA_BITBLT_FILL) {
 278                 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)
 279                         || src_y & 0xFFFFF000) {
 280                         printk(KERN_WARNING "hw_bitblt_2: Unsupported source "
 281                                 "x/y %d %d\n", src_x, src_y);
 282                         return -EINVAL;
 283                 }
 284                 tmp = src_x | (src_y << 16);
 285                 writel(tmp, engine + 0x18);
 286
 287                 tmp = src_mem ? 0 : src_addr;
 288                 if (dst_addr & 0xE0000007) {
 289                         printk(KERN_WARNING "hw_bitblt_2: Unsupported source "
 290                                 "address %X\n", tmp);
 291                         return -EINVAL;
 292                 }
 293                 tmp >>= 3;
 294                 writel(tmp, engine + 0x1C);
 295         }
 296
 297         if (op != VIA_BITBLT_COLOR)
 298                 writel(fg_color, engine + 0x4C);
 299
 300         if (op == VIA_BITBLT_MONO)
 301                 writel(bg_color, engine + 0x50);
 302
 303         if (op == VIA_BITBLT_FILL)
 304                 ge_cmd |= fill_rop << 24 | 0x00002000 | 0x00000001;
 305         else {
 306                 ge_cmd |= 0xCC000000; /* ROP=SRCCOPY */
 307                 if (src_mem)
 308                         ge_cmd |= 0x00000040;
 309                 if (op == VIA_BITBLT_MONO)
 310                         ge_cmd |= 0x00000002 | 0x00000100 | 0x00020000;
 311                 else
 312                         ge_cmd |= 0x00000001;
 313         }
 314         writel(ge_cmd, engine);
 315
 316         if (op == VIA_BITBLT_FILL || !src_mem)
 317                 return 0;
 318
 319         tmp = (width * height * (op == VIA_BITBLT_MONO ? 1 : (dst_bpp >> 3)) +
 320                 3) >> 2;
 321
 322         for (i = 0; i < tmp; i++)
 323                 writel(src_mem[i], engine + VIA_MMIO_BLTBASE);
 324
 325         return 0;
 326 }
 327
 328 int viafb_init_engine(struct fb_info *info)
 329 {
 330         struct viafb_par *viapar = info->par;
 331         void __iomem *engine;
 332         u32 vq_start_addr, vq_end_addr, vq_start_low, vq_end_low, vq_high,
 333                 vq_len, chip_name = viapar->shared->chip_info.gfx_chip_name;
 334
 335         engine = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
 336         viapar->shared->engine_mmio = engine;
 337         if (!engine) {
 338                 printk(KERN_WARNING "viafb_init_accel: ioremap failed, "
 339                         "hardware acceleration disabled\n");
 340                 return -ENOMEM;
 341         }
 342
 343         switch (chip_name) {
 344         case UNICHROME_CLE266:
 345         case UNICHROME_K400:
 346         case UNICHROME_K800:
 347         case UNICHROME_PM800:
 348         case UNICHROME_CN700:
 349         case UNICHROME_CX700:
 350         case UNICHROME_CN750:
 351         case UNICHROME_K8M890:
 352         case UNICHROME_P4M890:
 353         case UNICHROME_P4M900:
 354                 viapar->shared->hw_bitblt = hw_bitblt_1;
 355                 break;
 356         case UNICHROME_VX800:
 357         case UNICHROME_VX855:
 358                 viapar->shared->hw_bitblt = hw_bitblt_2;
 359                 break;
 360         default:
 361                 viapar->shared->hw_bitblt = NULL;
 362         }
 363
 364         viapar->fbmem_free -= CURSOR_SIZE;
 365         viapar->shared->cursor_vram_addr = viapar->fbmem_free;
 366         viapar->fbmem_used += CURSOR_SIZE;
 367
 368         viapar->fbmem_free -= VQ_SIZE;
 369         viapar->shared->vq_vram_addr = viapar->fbmem_free;
 370         viapar->fbmem_used += VQ_SIZE;
 371
 372         /* Init 2D engine reg to reset 2D engine */
 373         writel(0x0, engine + VIA_REG_KEYCONTROL);
 374
 375         /* Init AGP and VQ regs */
 376         switch (chip_name) {
 377         case UNICHROME_K8M890:
 378         case UNICHROME_P4M900:
 379                 writel(0x00100000, engine + VIA_REG_CR_TRANSET);
 380                 writel(0x680A0000, engine + VIA_REG_CR_TRANSPACE);
 381                 writel(0x02000000, engine + VIA_REG_CR_TRANSPACE);
 382                 break;
 383
 384         default:
 385                 writel(0x00100000, engine + VIA_REG_TRANSET);
 386                 writel(0x00000000, engine + VIA_REG_TRANSPACE);
 387                 writel(0x00333004, engine + VIA_REG_TRANSPACE);
 388                 writel(0x60000000, engine + VIA_REG_TRANSPACE);
 389                 writel(0x61000000, engine + VIA_REG_TRANSPACE);
 390                 writel(0x62000000, engine + VIA_REG_TRANSPACE);
 391                 writel(0x63000000, engine + VIA_REG_TRANSPACE);
 392                 writel(0x64000000, engine + VIA_REG_TRANSPACE);
 393                 writel(0x7D000000, engine + VIA_REG_TRANSPACE);
 394
 395                 writel(0xFE020000, engine + VIA_REG_TRANSET);
 396                 writel(0x00000000, engine + VIA_REG_TRANSPACE);
 397                 break;
 398         }
 399
 400         /* Enable VQ */
 401         vq_start_addr = viapar->shared->vq_vram_addr;
 402         vq_end_addr = viapar->shared->vq_vram_addr + VQ_SIZE - 1;
 403
 404         vq_start_low = 0x50000000 | (vq_start_addr & 0xFFFFFF);
 405         vq_end_low = 0x51000000 | (vq_end_addr & 0xFFFFFF);
 406         vq_high = 0x52000000 | ((vq_start_addr & 0xFF000000) >> 24) |
 407                 ((vq_end_addr & 0xFF000000) >> 16);
 408         vq_len = 0x53000000 | (VQ_SIZE >> 3);
 409
 410         switch (chip_name) {
 411         case UNICHROME_K8M890:
 412         case UNICHROME_P4M900:
 413                 vq_start_low |= 0x20000000;
 414                 vq_end_low |= 0x20000000;
 415                 vq_high |= 0x20000000;
 416                 vq_len |= 0x20000000;
 417
 418                 writel(0x00100000, engine + VIA_REG_CR_TRANSET);
 419                 writel(vq_high, engine + VIA_REG_CR_TRANSPACE);
 420                 writel(vq_start_low, engine + VIA_REG_CR_TRANSPACE);
 421                 writel(vq_end_low, engine + VIA_REG_CR_TRANSPACE);
 422                 writel(vq_len, engine + VIA_REG_CR_TRANSPACE);
 423                 writel(0x74301001, engine + VIA_REG_CR_TRANSPACE);
 424                 writel(0x00000000, engine + VIA_REG_CR_TRANSPACE);
 425                 break;
 426         default:
 427                 writel(0x00FE0000, engine + VIA_REG_TRANSET);
 428                 writel(0x080003FE, engine + VIA_REG_TRANSPACE);
 429                 writel(0x0A00027C, engine + VIA_REG_TRANSPACE);
 430                 writel(0x0B000260, engine + VIA_REG_TRANSPACE);
 431                 writel(0x0C000274, engine + VIA_REG_TRANSPACE);
 432                 writel(0x0D000264, engine + VIA_REG_TRANSPACE);
 433                 writel(0x0E000000, engine + VIA_REG_TRANSPACE);
 434                 writel(0x0F000020, engine + VIA_REG_TRANSPACE);
 435                 writel(0x1000027E, engine + VIA_REG_TRANSPACE);
 436                 writel(0x110002FE, engine + VIA_REG_TRANSPACE);
 437                 writel(0x200F0060, engine + VIA_REG_TRANSPACE);
 438
 439                 writel(0x00000006, engine + VIA_REG_TRANSPACE);
 440                 writel(0x40008C0F, engine + VIA_REG_TRANSPACE);
 441                 writel(0x44000000, engine + VIA_REG_TRANSPACE);
 442                 writel(0x45080C04, engine + VIA_REG_TRANSPACE);
 443                 writel(0x46800408, engine + VIA_REG_TRANSPACE);
 444
 445                 writel(vq_high, engine + VIA_REG_TRANSPACE);
 446                 writel(vq_start_low, engine + VIA_REG_TRANSPACE);
 447                 writel(vq_end_low, engine + VIA_REG_TRANSPACE);
 448                 writel(vq_len, engine + VIA_REG_TRANSPACE);
 449                 break;
 450         }
 451
 452         /* Set Cursor Image Base Address */
 453         writel(viapar->shared->cursor_vram_addr, engine + VIA_REG_CURSOR_MODE);
 454         writel(0x0, engine + VIA_REG_CURSOR_POS);
 455         writel(0x0, engine + VIA_REG_CURSOR_ORG);
 456         writel(0x0, engine + VIA_REG_CURSOR_BG);
 457         writel(0x0, engine + VIA_REG_CURSOR_FG);
 458         return 0;
 459 }
 460
 461 void viafb_show_hw_cursor(struct fb_info *info, int Status)
 462 {
 463         struct viafb_par *viapar = info->par;
 464         u32 temp, iga_path = viapar->iga_path;
 465
 466         temp = readl(viapar->shared->engine_mmio + VIA_REG_CURSOR_MODE);
 467         switch (Status) {
 468         case HW_Cursor_ON:
 469                 temp |= 0x1;
 470                 break;
 471         case HW_Cursor_OFF:
 472                 temp &= 0xFFFFFFFE;
 473                 break;
 474         }
 475         switch (iga_path) {
 476         case IGA2:
 477                 temp |= 0x80000000;
 478                 break;
 479         case IGA1:
 480         default:
 481                 temp &= 0x7FFFFFFF;
 482         }
 483         writel(temp, viapar->shared->engine_mmio + VIA_REG_CURSOR_MODE);
 484 }
 485
 486 void viafb_wait_engine_idle(struct fb_info *info)
 487 {
 488         struct viafb_par *viapar = info->par;
 489         int loop = 0;
 490
 491         while (!(readl(viapar->shared->engine_mmio + VIA_REG_STATUS) &
 492                         VIA_VR_QUEUE_BUSY) && (loop < MAXLOOP)) {
 493                 loop++;
 494                 cpu_relax();
 495         }
 496
 497         while ((readl(viapar->shared->engine_mmio + VIA_REG_STATUS) &
 498                     (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
 499                     (loop < MAXLOOP)) {
 500                 loop++;
 501                 cpu_relax();
 502         }
 503
 504         if (loop >= MAXLOOP)
 505                 printk(KERN_ERR "viafb_wait_engine_idle: not syncing\n");
 506 }