2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public
7 * License as published by the Free Software Foundation;
8 * either version 2, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12 * the implied warranty of MERCHANTABILITY or FITNESS FOR
13 * A PARTICULAR PURPOSE.See the GNU General Public License
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
27 *plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
32 viafb_i2c_readbyte(plvds_chip_info->i2c_port,
33 plvds_chip_info->lvds_chip_slave_addr, index, &data);
37 void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information
38 *plvds_setting_info, struct lvds_chip_information
39 *plvds_chip_info, struct IODATA io_data)
43 index = io_data.Index;
44 data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info,
46 data = (data & (~io_data.Mask)) | io_data.Data;
48 viafb_i2c_writebyte(plvds_chip_info->i2c_port,
49 plvds_chip_info->lvds_chip_slave_addr, index, data);
52 void viafb_init_lvds_vt1636(struct lvds_setting_information
53 *plvds_setting_info, struct lvds_chip_information *plvds_chip_info)
57 /* Common settings: */
58 reg_num = ARRAY_SIZE(COMMON_INIT_TBL_VT1636);
60 for (i = 0; i < reg_num; i++) {
61 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
63 COMMON_INIT_TBL_VT1636[i]);
66 /* Input Data Mode Select */
67 if (plvds_setting_info->device_lcd_dualedge) {
68 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
70 DUAL_CHANNEL_ENABLE_TBL_VT1636[0]);
72 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
74 SINGLE_CHANNEL_ENABLE_TBL_VT1636[0]);
77 if (plvds_setting_info->LCDDithering) {
78 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
80 DITHERING_ENABLE_TBL_VT1636[0]);
82 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
84 DITHERING_DISABLE_TBL_VT1636[0]);
88 void viafb_enable_lvds_vt1636(struct lvds_setting_information
90 struct lvds_chip_information *plvds_chip_info)
93 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
94 VDD_ON_TBL_VT1636[0]);
97 switch (plvds_chip_info->output_interface) {
100 viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0);
106 viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
110 case INTERFACE_DFP_LOW:
112 viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03);
116 case INTERFACE_DFP_HIGH:
118 viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C);
125 void viafb_disable_lvds_vt1636(struct lvds_setting_information
127 struct lvds_chip_information *plvds_chip_info)
130 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
131 VDD_OFF_TBL_VT1636[0]);
134 switch (plvds_chip_info->output_interface) {
137 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0);
143 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
147 case INTERFACE_DFP_LOW:
149 viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03);
153 case INTERFACE_DFP_HIGH:
155 viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C);
162 bool viafb_lvds_identify_vt1636(u8 i2c_adapter)
166 DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n");
168 /* Sense VT1636 LVDS Transmiter */
169 viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
170 VT1636_LVDS_I2C_ADDR;
172 /* Check vendor ID first: */
173 if (viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR,
176 viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x01, &Buffer[1]);
178 if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11)))
182 viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x02, &Buffer[0]);
183 viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x03, &Buffer[1]);
184 if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) {
185 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
193 static int get_clk_range_index(u32 Clk)
195 if (Clk < DPA_CLK_30M)
196 return DPA_CLK_RANGE_30M;
197 else if (Clk < DPA_CLK_50M)
198 return DPA_CLK_RANGE_30_50M;
199 else if (Clk < DPA_CLK_70M)
200 return DPA_CLK_RANGE_50_70M;
201 else if (Clk < DPA_CLK_100M)
202 return DPA_CLK_RANGE_70_100M;
203 else if (Clk < DPA_CLK_150M)
204 return DPA_CLK_RANGE_100_150M;
206 return DPA_CLK_RANGE_150M;
209 static int get_lvds_dpa_setting_index(int panel_size_id,
210 struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl,
215 for (i = 0; i < tbl_size; i++) {
216 if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID)
219 p_vt1636_dpasetting_tbl++;
225 static void set_dpa_vt1636(struct lvds_setting_information
226 *plvds_setting_info, struct lvds_chip_information *plvds_chip_info,
227 struct VT1636_DPA_SETTING *p_vt1636_dpa_setting)
229 struct IODATA io_data;
231 io_data.Index = 0x09;
233 io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1;
234 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info,
235 plvds_chip_info, io_data);
237 io_data.Index = 0x08;
239 io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2;
240 viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info,
244 void viafb_vt1636_patch_skew_on_vt3324(
245 struct lvds_setting_information *plvds_setting_info,
246 struct lvds_chip_information *plvds_chip_info)
250 DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n");
252 /* Graphics DPA settings: */
253 index = get_clk_range_index(plvds_setting_info->vclk);
254 viafb_set_dpa_gfx(plvds_chip_info->output_interface,
255 &GFX_DPA_SETTING_TBL_VT3324[index]);
257 /* LVDS Transmitter DPA settings: */
258 size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324);
260 get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
261 VT1636_DPA_SETTING_TBL_VT3324, size);
262 set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
263 &VT1636_DPA_SETTING_TBL_VT3324[index]);
266 void viafb_vt1636_patch_skew_on_vt3327(
267 struct lvds_setting_information *plvds_setting_info,
268 struct lvds_chip_information *plvds_chip_info)
272 DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n");
274 /* Graphics DPA settings: */
275 index = get_clk_range_index(plvds_setting_info->vclk);
276 viafb_set_dpa_gfx(plvds_chip_info->output_interface,
277 &GFX_DPA_SETTING_TBL_VT3327[index]);
279 /* LVDS Transmitter DPA settings: */
280 size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327);
282 get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id,
283 VT1636_DPA_SETTING_TBL_VT3327, size);
284 set_dpa_vt1636(plvds_setting_info, plvds_chip_info,
285 &VT1636_DPA_SETTING_TBL_VT3327[index]);
288 void viafb_vt1636_patch_skew_on_vt3364(
289 struct lvds_setting_information *plvds_setting_info,
290 struct lvds_chip_information *plvds_chip_info)
294 DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n");
296 /* Graphics DPA settings: */
297 index = get_clk_range_index(plvds_setting_info->vclk);
298 viafb_set_dpa_gfx(plvds_chip_info->output_interface,
299 &GFX_DPA_SETTING_TBL_VT3364[index]);