4 * Xilinx TFT LCD frame buffer driver
6 * Author: MontaVista Software, Inc.
9 * 2002-2007 (c) MontaVista Software, Inc.
10 * 2007 (c) Secret Lab Technologies, Ltd.
12 * This file is licensed under the terms of the GNU General Public License
13 * version 2. This program is licensed "as is" without any warranty of any
14 * kind, whether express or implied.
18 * This driver was based on au1100fb.c by MontaVista rewritten for 2.6
19 * by Embedded Alley Solutions <source@embeddedalley.com>, which in turn
20 * was based on skeletonfb.c, Skeleton for a frame buffer device by
24 #include <linux/device.h>
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/version.h>
28 #include <linux/errno.h>
29 #include <linux/string.h>
32 #include <linux/init.h>
33 #include <linux/dma-mapping.h>
34 #include <linux/platform_device.h>
35 #if defined(CONFIG_OF)
36 #include <linux/of_device.h>
37 #include <linux/of_platform.h>
40 #include <linux/xilinxfb.h>
42 #define DRIVER_NAME "xilinxfb"
43 #define DRIVER_DESCRIPTION "Xilinx TFT LCD frame buffer driver"
46 * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
47 * the VGA port on the Xilinx ML40x board. This is a hardware display controller
48 * for a 640x480 resolution TFT or VGA screen.
50 * The interface to the framebuffer is nice and simple. There are two
51 * control registers. The first tells the LCD interface where in memory
52 * the frame buffer is (only the 11 most significant bits are used, so
53 * don't start thinking about scrolling). The second allows the LCD to
54 * be turned on or off as well as rotated 180 degrees.
59 #define REG_CTRL_ENABLE 0x0001
60 #define REG_CTRL_ROTATE 0x0002
63 * The hardware only handles a single mode: 640x480 24 bit true
64 * color. Each pixel gets a word (32 bits) of memory. Within each word,
65 * the 8 most significant bits are ignored, the next 8 bits are the red
66 * level, the next 8 bits are the green level and the 8 least
67 * significant bits are the blue level. Each row of the LCD uses 1024
68 * words, but only the first 640 pixels are displayed with the other 384
69 * words being ignored. There are 480 rows.
71 #define BYTES_PER_PIXEL 4
72 #define BITS_PER_PIXEL (BYTES_PER_PIXEL * 8)
75 #define XRES_VIRTUAL 1024
76 #define YRES_VIRTUAL YRES
77 #define LINE_LENGTH (XRES_VIRTUAL * BYTES_PER_PIXEL)
78 #define FB_SIZE (YRES_VIRTUAL * LINE_LENGTH)
84 #define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */
87 * Here are the default fb_fix_screeninfo and fb_var_screeninfo structures
89 static struct fb_fix_screeninfo xilinx_fb_fix = {
91 .type = FB_TYPE_PACKED_PIXELS,
92 .visual = FB_VISUAL_TRUECOLOR,
94 .line_length = LINE_LENGTH,
95 .accel = FB_ACCEL_NONE
98 static struct fb_var_screeninfo xilinx_fb_var = {
101 .xres_virtual = XRES_VIRTUAL,
102 .yres_virtual = YRES_VIRTUAL,
104 .bits_per_pixel = BITS_PER_PIXEL,
106 .red = { RED_SHIFT, 8, 0 },
107 .green = { GREEN_SHIFT, 8, 0 },
108 .blue = { BLUE_SHIFT, 8, 0 },
109 .transp = { 0, 0, 0 },
111 .activate = FB_ACTIVATE_NOW
114 struct xilinxfb_drvdata {
116 struct fb_info info; /* FB driver info record */
118 u32 regs_phys; /* phys. address of the control registers */
119 u32 __iomem *regs; /* virt. address of the control registers */
121 void *fb_virt; /* virt. address of the frame buffer */
122 dma_addr_t fb_phys; /* phys. address of the frame buffer */
124 u32 reg_ctrl_default;
126 u32 pseudo_palette[PALETTE_ENTRIES_NO];
127 /* Fake palette of 16 colors */
130 #define to_xilinxfb_drvdata(_info) \
131 container_of(_info, struct xilinxfb_drvdata, info)
134 * The LCD controller has DCR interface to its registers, but all
135 * the boards and configurations the driver has been tested with
136 * use opb2dcr bridge. So the registers are seen as memory mapped.
137 * This macro is to make it simple to add the direct DCR access
140 #define xilinx_fb_out_be32(driverdata, offset, val) \
141 out_be32(driverdata->regs + offset, val)
144 xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
145 unsigned transp, struct fb_info *fbi)
147 u32 *palette = fbi->pseudo_palette;
149 if (regno >= PALETTE_ENTRIES_NO)
152 if (fbi->var.grayscale) {
153 /* Convert color to grayscale.
154 * grayscale = 0.30*R + 0.59*G + 0.11*B */
156 (red * 77 + green * 151 + blue * 28 + 127) >> 8;
159 /* fbi->fix.visual is always FB_VISUAL_TRUECOLOR */
161 /* We only handle 8 bits of each color. */
165 palette[regno] = (red << RED_SHIFT) | (green << GREEN_SHIFT) |
166 (blue << BLUE_SHIFT);
172 xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
174 struct xilinxfb_drvdata *drvdata = to_xilinxfb_drvdata(fbi);
176 switch (blank_mode) {
177 case FB_BLANK_UNBLANK:
179 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
182 case FB_BLANK_NORMAL:
183 case FB_BLANK_VSYNC_SUSPEND:
184 case FB_BLANK_HSYNC_SUSPEND:
185 case FB_BLANK_POWERDOWN:
187 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
192 return 0; /* success */
195 static struct fb_ops xilinxfb_ops =
197 .owner = THIS_MODULE,
198 .fb_setcolreg = xilinx_fb_setcolreg,
199 .fb_blank = xilinx_fb_blank,
200 .fb_fillrect = cfb_fillrect,
201 .fb_copyarea = cfb_copyarea,
202 .fb_imageblit = cfb_imageblit,
205 /* ---------------------------------------------------------------------
206 * Bus independent setup/teardown
209 static int xilinxfb_assign(struct device *dev, unsigned long physaddr,
210 int width_mm, int height_mm, int rotate)
212 struct xilinxfb_drvdata *drvdata;
215 /* Allocate the driver data region */
216 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
218 dev_err(dev, "Couldn't allocate device private record\n");
221 dev_set_drvdata(dev, drvdata);
223 /* Map the control registers in */
224 if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
225 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
230 drvdata->regs_phys = physaddr;
231 drvdata->regs = ioremap(physaddr, 8);
232 if (!drvdata->regs) {
233 dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
239 /* Allocate the framebuffer memory */
240 drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(FB_SIZE),
241 &drvdata->fb_phys, GFP_KERNEL);
242 if (!drvdata->fb_virt) {
243 dev_err(dev, "Could not allocate frame buffer memory\n");
248 /* Clear (turn to black) the framebuffer */
249 memset_io((void __iomem *)drvdata->fb_virt, 0, FB_SIZE);
251 /* Tell the hardware where the frame buffer is */
252 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
254 /* Turn on the display */
255 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
257 drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
258 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
260 /* Fill struct fb_info */
261 drvdata->info.device = dev;
262 drvdata->info.screen_base = (void __iomem *)drvdata->fb_virt;
263 drvdata->info.fbops = &xilinxfb_ops;
264 drvdata->info.fix = xilinx_fb_fix;
265 drvdata->info.fix.smem_start = drvdata->fb_phys;
266 drvdata->info.pseudo_palette = drvdata->pseudo_palette;
267 drvdata->info.flags = FBINFO_DEFAULT;
268 drvdata->info.var = xilinx_fb_var;
270 xilinx_fb_var.height = height_mm;
271 xilinx_fb_var.width = width_mm;
273 /* Allocate a colour map */
274 rc = fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0);
276 dev_err(dev, "Fail to allocate colormap (%d entries)\n",
281 /* Register new frame buffer */
282 rc = register_framebuffer(&drvdata->info);
284 dev_err(dev, "Could not register frame buffer\n");
288 /* Put a banner in the log (for DEBUG) */
289 dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr, drvdata->regs);
290 dev_dbg(dev, "fb: phys=%p, virt=%p, size=%x\n",
291 (void*)drvdata->fb_phys, drvdata->fb_virt, FB_SIZE);
292 return 0; /* success */
295 fb_dealloc_cmap(&drvdata->info.cmap);
298 dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
300 /* Turn off the display */
301 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
304 iounmap(drvdata->regs);
307 release_mem_region(physaddr, 8);
311 dev_set_drvdata(dev, NULL);
316 static int xilinxfb_release(struct device *dev)
318 struct xilinxfb_drvdata *drvdata = dev_get_drvdata(dev);
320 #if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
321 xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
324 unregister_framebuffer(&drvdata->info);
326 fb_dealloc_cmap(&drvdata->info.cmap);
328 dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
331 /* Turn off the display */
332 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
333 iounmap(drvdata->regs);
335 release_mem_region(drvdata->regs_phys, 8);
338 dev_set_drvdata(dev, NULL);
343 /* ---------------------------------------------------------------------
344 * Platform bus binding
348 xilinxfb_platform_probe(struct platform_device *pdev)
350 struct xilinxfb_platform_data *pdata;
351 struct resource *res;
356 /* Find the registers address */
357 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
359 dev_err(&pdev->dev, "Couldn't get registers resource\n");
363 /* If a pdata structure is provided, then extract the parameters */
364 pdata = pdev->dev.platform_data;
366 height_mm = pdata->screen_height_mm;
367 width_mm = pdata->screen_width_mm;
368 rotate = pdata->rotate_screen ? 1 : 0;
371 return xilinxfb_assign(&pdev->dev, res->start, width_mm, height_mm,
376 xilinxfb_platform_remove(struct platform_device *pdev)
378 return xilinxfb_release(&pdev->dev);
382 static struct platform_driver xilinxfb_platform_driver = {
383 .probe = xilinxfb_platform_probe,
384 .remove = xilinxfb_platform_remove,
386 .owner = THIS_MODULE,
391 /* ---------------------------------------------------------------------
395 #if defined(CONFIG_OF)
397 xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
401 int width = 0, height = 0, rotate = 0;
404 dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match);
406 rc = of_address_to_resource(op->node, 0, &res);
408 dev_err(&op->dev, "invalid address\n");
412 prop = of_get_property(op->node, "display-number", &size);
413 if ((prop) && (size >= sizeof(u32)*2)) {
418 if (of_find_property(op->node, "rotate-display", NULL))
421 return xilinxfb_assign(&op->dev, res.start, width, height, rotate);
424 static int __devexit xilinxfb_of_remove(struct of_device *op)
426 return xilinxfb_release(&op->dev);
429 /* Match table for of_platform binding */
430 static struct of_device_id __devinit xilinxfb_of_match[] = {
431 { .compatible = "xilinx,ml300-fb", },
434 MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
436 static struct of_platform_driver xilinxfb_of_driver = {
437 .owner = THIS_MODULE,
439 .match_table = xilinxfb_of_match,
440 .probe = xilinxfb_of_probe,
441 .remove = __devexit_p(xilinxfb_of_remove),
447 /* Registration helpers to keep the number of #ifdefs to a minimum */
448 static inline int __init xilinxfb_of_register(void)
450 pr_debug("xilinxfb: calling of_register_platform_driver()\n");
451 return of_register_platform_driver(&xilinxfb_of_driver);
454 static inline void __exit xilinxfb_of_unregister(void)
456 of_unregister_platform_driver(&xilinxfb_of_driver);
458 #else /* CONFIG_OF */
459 /* CONFIG_OF not enabled; do nothing helpers */
460 static inline int __init xilinxfb_of_register(void) { return 0; }
461 static inline void __exit xilinxfb_of_unregister(void) { }
462 #endif /* CONFIG_OF */
464 /* ---------------------------------------------------------------------
465 * Module setup and teardown
472 rc = xilinxfb_of_register();
476 rc = platform_driver_register(&xilinxfb_platform_driver);
478 xilinxfb_of_unregister();
484 xilinxfb_cleanup(void)
486 platform_driver_unregister(&xilinxfb_platform_driver);
487 xilinxfb_of_unregister();
490 module_init(xilinxfb_init);
491 module_exit(xilinxfb_cleanup);
493 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
494 MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
495 MODULE_LICENSE("GPL");