5 * SoftDog 0.05: A Software Watchdog Device
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
16 #include <linux/device.h>
18 #include <linux/init.h>
20 #include <linux/bitops.h>
21 #include <linux/kernel.h>
22 #include <linux/miscdevice.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pci.h>
26 #include <linux/pci_ids.h>
27 #include <linux/types.h>
28 #include <linux/uaccess.h>
29 #include <linux/watchdog.h>
30 #include <linux/dmi.h>
31 #include <linux/spinlock.h>
32 #include <linux/nmi.h>
33 #include <linux/kdebug.h>
34 #include <linux/notifier.h>
35 #include <asm/cacheflush.h>
37 #define HPWDT_VERSION "1.1.1"
38 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
39 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
40 #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
41 #define DEFAULT_MARGIN 30
43 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
44 static unsigned int reload; /* the computed soft_margin */
45 static int nowayout = WATCHDOG_NOWAYOUT;
46 static char expect_release;
47 static unsigned long hpwdt_is_open;
49 static void __iomem *pci_mem_addr; /* the PCI-memory address */
50 static unsigned long __iomem *hpwdt_timer_reg;
51 static unsigned long __iomem *hpwdt_timer_con;
53 static struct pci_device_id hpwdt_devices[] = {
54 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
55 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
56 {0}, /* terminate list */
58 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
60 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
61 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
62 #define PCI_BIOS32_PARAGRAPH_LEN 16
63 #define PCI_ROM_BASE1 0x000F0000
64 #define ROM_SIZE 0x10000
66 struct bios32_service_dir {
76 struct smbios_cru64_info {
85 #define SMBIOS_CRU64_INFORMATION 212
87 struct cmn_registers {
127 } __attribute__((packed));
129 static unsigned int hpwdt_nmi_decoding;
130 static unsigned int allow_kdump;
131 static unsigned int priority; /* hpwdt at end of die_notify list */
132 static DEFINE_SPINLOCK(rom_lock);
133 static void *cru_rom_addr;
134 static struct cmn_registers cmn_regs;
136 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
137 unsigned long *pRomEntry);
140 /* --32 Bit Bios------------------------------------------------------------ */
142 #define HPWDT_ARCH 32
146 "asminline_call: \n\t"
148 "movl %esp, %ebp \n\t"
154 "movl 8(%ebp),%eax \n\t"
155 "movl 4(%eax),%ebx \n\t"
156 "movl 8(%eax),%ecx \n\t"
157 "movl 12(%eax),%edx \n\t"
158 "movl 16(%eax),%esi \n\t"
159 "movl 20(%eax),%edi \n\t"
160 "movl (%eax),%eax \n\t"
162 "call *12(%ebp) \n\t"
165 "movl 8(%ebp),%eax \n\t"
166 "movl %ebx,4(%eax) \n\t"
167 "movl %ecx,8(%eax) \n\t"
168 "movl %edx,12(%eax) \n\t"
169 "movl %esi,16(%eax) \n\t"
170 "movl %edi,20(%eax) \n\t"
171 "movw %ds,24(%eax) \n\t"
172 "movw %es,26(%eax) \n\t"
174 "movl %ebx,(%eax) \n\t"
176 "movl %ebx,28(%eax) \n\t"
188 * Routine Description:
189 * This function uses the 32-bit BIOS Service Directory record to
190 * search for a $CRU record.
196 static int __devinit cru_detect(unsigned long map_entry,
197 unsigned long map_offset)
200 unsigned long *bios32_entrypoint;
201 unsigned long cru_physical_address;
202 unsigned long cru_length;
203 unsigned long physical_bios_base = 0;
204 unsigned long physical_bios_offset = 0;
205 int retval = -ENODEV;
207 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
209 if (bios32_map == NULL)
212 bios32_entrypoint = bios32_map + map_offset;
214 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
216 asminline_call(&cmn_regs, bios32_entrypoint);
218 if (cmn_regs.u1.ral != 0) {
220 "hpwdt: Call succeeded but with an error: 0x%x\n",
223 physical_bios_base = cmn_regs.u2.rebx;
224 physical_bios_offset = cmn_regs.u4.redx;
225 cru_length = cmn_regs.u3.recx;
226 cru_physical_address =
227 physical_bios_base + physical_bios_offset;
229 /* If the values look OK, then map it in. */
230 if ((physical_bios_base + physical_bios_offset)) {
232 ioremap(cru_physical_address, cru_length);
237 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
239 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
240 physical_bios_offset);
241 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
243 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
253 static int __devinit bios_checksum(const char __iomem *ptr, int len)
259 * calculate checksum of size bytes. This should add up
260 * to zero if we have a valid header.
262 for (i = 0; i < len; i++)
265 return ((sum == 0) && (len > 0));
271 * Routine Description:
272 * This function finds the 32-bit BIOS Service Directory
278 static int __devinit bios32_present(const char __iomem *p)
280 struct bios32_service_dir *bios_32_ptr;
282 unsigned long map_entry, map_offset;
284 bios_32_ptr = (struct bios32_service_dir *) p;
287 * Search for signature by checking equal to the swizzled value
288 * instead of calling another routine to perform a strcmp.
290 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
291 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
292 if (bios_checksum(p, length)) {
294 * According to the spec, we're looking for the
295 * first 4KB-aligned address below the entrypoint
296 * listed in the header. The Service Directory code
297 * is guaranteed to occupy no more than 2 4KB pages.
299 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
300 map_offset = bios_32_ptr->entry_point - map_entry;
302 return cru_detect(map_entry, map_offset);
308 static int __devinit detect_cru_service(void)
314 * Search from 0x0f0000 through 0x0fffff, inclusive.
316 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
320 for (q = p; q < p + ROM_SIZE; q += 16) {
321 rc = bios32_present(q);
328 /* ------------------------------------------------------------------------- */
329 #endif /* CONFIG_X86_32 */
331 /* --64 Bit Bios------------------------------------------------------------ */
333 #define HPWDT_ARCH 64
337 "asminline_call: \n\t"
339 "movq %rsp, %rbp \n\t"
345 "movq %rsi, %r12 \n\t"
346 "movq %rdi, %r9 \n\t"
347 "movl 4(%r9),%ebx \n\t"
348 "movl 8(%r9),%ecx \n\t"
349 "movl 12(%r9),%edx \n\t"
350 "movl 16(%r9),%esi \n\t"
351 "movl 20(%r9),%edi \n\t"
352 "movl (%r9),%eax \n\t"
356 "movl %eax, (%r9) \n\t"
357 "movl %ebx, 4(%r9) \n\t"
358 "movl %ecx, 8(%r9) \n\t"
359 "movl %edx, 12(%r9) \n\t"
360 "movl %esi, 16(%r9) \n\t"
361 "movl %edi, 20(%r9) \n\t"
362 "movq %r12, %rax \n\t"
363 "movl %eax, 28(%r9) \n\t"
376 * Routine Description:
377 * This function checks whether or not a SMBIOS/DMI record is
378 * the 64bit CRU info or not
380 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
382 struct smbios_cru64_info *smbios_cru64_ptr;
383 unsigned long cru_physical_address;
385 if (dm->type == SMBIOS_CRU64_INFORMATION) {
386 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
387 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
388 cru_physical_address =
389 smbios_cru64_ptr->physical_address +
390 smbios_cru64_ptr->double_offset;
391 cru_rom_addr = ioremap(cru_physical_address,
392 smbios_cru64_ptr->double_length);
393 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
394 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
399 static int __devinit detect_cru_service(void)
403 dmi_walk(dmi_find_cru, NULL);
405 /* if cru_rom_addr has been set then we found a CRU service */
406 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
408 /* ------------------------------------------------------------------------- */
409 #endif /* CONFIG_X86_64 */
412 * Watchdog operations
414 static void hpwdt_start(void)
416 reload = SECS_TO_TICKS(soft_margin);
417 iowrite16(reload, hpwdt_timer_reg);
418 iowrite16(0x85, hpwdt_timer_con);
421 static void hpwdt_stop(void)
425 data = ioread16(hpwdt_timer_con);
427 iowrite16(data, hpwdt_timer_con);
430 static void hpwdt_ping(void)
432 iowrite16(reload, hpwdt_timer_reg);
435 static int hpwdt_change_timer(int new_margin)
437 if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
439 "hpwdt: New value passed in is invalid: %d seconds.\n",
444 soft_margin = new_margin;
446 "hpwdt: New timer passed in is %d seconds.\n",
448 reload = SECS_TO_TICKS(soft_margin);
453 static int hpwdt_time_left(void)
455 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
461 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
464 unsigned long rom_pl;
465 static int die_nmi_called;
467 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
470 if (!hpwdt_nmi_decoding)
473 spin_lock_irqsave(&rom_lock, rom_pl);
475 asminline_call(&cmn_regs, cru_rom_addr);
477 spin_unlock_irqrestore(&rom_lock, rom_pl);
478 if (cmn_regs.u1.ral == 0) {
479 printk(KERN_WARNING "hpwdt: An NMI occurred, "
480 "but unable to determine source.\n");
484 panic("An NMI occurred, please see the Integrated "
485 "Management Log for details.\n");
492 * /dev/watchdog handling
494 static int hpwdt_open(struct inode *inode, struct file *file)
496 /* /dev/watchdog can only be opened once */
497 if (test_and_set_bit(0, &hpwdt_is_open))
500 /* Start the watchdog */
504 return nonseekable_open(inode, file);
507 static int hpwdt_release(struct inode *inode, struct file *file)
509 /* Stop the watchdog */
510 if (expect_release == 42) {
514 "hpwdt: Unexpected close, not stopping watchdog!\n");
520 /* /dev/watchdog is being closed, make sure it can be re-opened */
521 clear_bit(0, &hpwdt_is_open);
526 static ssize_t hpwdt_write(struct file *file, const char __user *data,
527 size_t len, loff_t *ppos)
529 /* See if we got the magic character 'V' and reload the timer */
534 /* note: just in case someone wrote the magic character
535 * five months ago... */
538 /* scan to see whether or not we got the magic char. */
539 for (i = 0; i != len; i++) {
541 if (get_user(c, data + i))
548 /* someone wrote to us, we should reload the timer */
555 static const struct watchdog_info ident = {
556 .options = WDIOF_SETTIMEOUT |
557 WDIOF_KEEPALIVEPING |
559 .identity = "HP iLO2+ HW Watchdog Timer",
562 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
565 void __user *argp = (void __user *)arg;
566 int __user *p = argp;
571 case WDIOC_GETSUPPORT:
573 if (copy_to_user(argp, &ident, sizeof(ident)))
577 case WDIOC_GETSTATUS:
578 case WDIOC_GETBOOTSTATUS:
579 ret = put_user(0, p);
582 case WDIOC_KEEPALIVE:
587 case WDIOC_SETTIMEOUT:
588 ret = get_user(new_margin, p);
592 ret = hpwdt_change_timer(new_margin);
598 case WDIOC_GETTIMEOUT:
599 ret = put_user(soft_margin, p);
602 case WDIOC_GETTIMELEFT:
603 ret = put_user(hpwdt_time_left(), p);
612 static const struct file_operations hpwdt_fops = {
613 .owner = THIS_MODULE,
615 .write = hpwdt_write,
616 .unlocked_ioctl = hpwdt_ioctl,
618 .release = hpwdt_release,
621 static struct miscdevice hpwdt_miscdev = {
622 .minor = WATCHDOG_MINOR,
627 static struct notifier_block die_notifier = {
628 .notifier_call = hpwdt_pretimeout,
636 #ifdef ARCH_HAS_NMI_WATCHDOG
637 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
640 * If nmi_watchdog is turned off then we can turn on
641 * our nmi decoding capability.
643 if (!nmi_watchdog_active())
644 hpwdt_nmi_decoding = 1;
646 dev_warn(&dev->dev, "NMI decoding is disabled. To enable this "
647 "functionality you must reboot with nmi_watchdog=0 "
648 "and load the hpwdt driver with priority=1.\n");
651 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
653 dev_warn(&dev->dev, "NMI decoding is disabled. "
654 "Your kernel does not support a NMI Watchdog.\n");
656 #endif /* ARCH_HAS_NMI_WATCHDOG */
658 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
663 * We need to map the ROM to get the CRU service.
664 * For 32 bit Operating Systems we need to go through the 32 Bit
665 * BIOS Service Directory
666 * For 64 bit Operating Systems we get that service through SMBIOS.
668 retval = detect_cru_service();
671 "Unable to detect the %d Bit CRU Service.\n",
677 * We know this is the only CRU call we need to make so lets keep as
678 * few instructions as possible once the NMI comes in.
680 cmn_regs.u1.rah = 0x0D;
681 cmn_regs.u1.ral = 0x02;
684 * If the priority is set to 1, then we will be put first on the
685 * die notify list to handle a critical NMI. The default is to
686 * be last so other users of the NMI signal can function.
689 die_notifier.priority = 0x7FFFFFFF;
691 retval = register_die_notifier(&die_notifier);
694 "Unable to register a die notifier (err=%d).\n",
697 iounmap(cru_rom_addr);
701 "HP Watchdog Timer Driver: NMI decoding initialized"
702 ", allow kernel dump: %s (default = 0/OFF)"
703 ", priority: %s (default = 0/LAST).\n",
704 (allow_kdump == 0) ? "OFF" : "ON",
705 (priority == 0) ? "LAST" : "FIRST");
709 static void __devexit hpwdt_exit_nmi_decoding(void)
711 unregister_die_notifier(&die_notifier);
713 iounmap(cru_rom_addr);
716 static int __devinit hpwdt_init_one(struct pci_dev *dev,
717 const struct pci_device_id *ent)
722 * Check if we can do NMI decoding or not
724 hpwdt_check_nmi_decoding(dev);
727 * First let's find out if we are on an iLO2+ server. We will
728 * not run on a legacy ASM box.
729 * So we only support the G5 ProLiant servers and higher.
731 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
733 "This server does not have an iLO2+ ASIC.\n");
737 if (pci_enable_device(dev)) {
739 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
740 ent->vendor, ent->device);
744 pci_mem_addr = pci_iomap(dev, 1, 0x80);
747 "Unable to detect the iLO2+ server memory.\n");
749 goto error_pci_iomap;
751 hpwdt_timer_reg = pci_mem_addr + 0x70;
752 hpwdt_timer_con = pci_mem_addr + 0x72;
754 /* Make sure that we have a valid soft_margin */
755 if (hpwdt_change_timer(soft_margin))
756 hpwdt_change_timer(DEFAULT_MARGIN);
758 /* Initialize NMI Decoding functionality */
759 retval = hpwdt_init_nmi_decoding(dev);
761 goto error_init_nmi_decoding;
763 retval = misc_register(&hpwdt_miscdev);
766 "Unable to register miscdev on minor=%d (err=%d).\n",
767 WATCHDOG_MINOR, retval);
768 goto error_misc_register;
771 dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
772 ", timer margin: %d seconds (nowayout=%d).\n",
773 HPWDT_VERSION, soft_margin, nowayout);
777 hpwdt_exit_nmi_decoding();
778 error_init_nmi_decoding:
779 pci_iounmap(dev, pci_mem_addr);
781 pci_disable_device(dev);
785 static void __devexit hpwdt_exit(struct pci_dev *dev)
790 misc_deregister(&hpwdt_miscdev);
791 hpwdt_exit_nmi_decoding();
792 pci_iounmap(dev, pci_mem_addr);
793 pci_disable_device(dev);
796 static struct pci_driver hpwdt_driver = {
798 .id_table = hpwdt_devices,
799 .probe = hpwdt_init_one,
800 .remove = __devexit_p(hpwdt_exit),
803 static void __exit hpwdt_cleanup(void)
805 pci_unregister_driver(&hpwdt_driver);
808 static int __init hpwdt_init(void)
810 return pci_register_driver(&hpwdt_driver);
813 MODULE_AUTHOR("Tom Mingarelli");
814 MODULE_DESCRIPTION("hp watchdog driver");
815 MODULE_LICENSE("GPL");
816 MODULE_VERSION(HPWDT_VERSION);
817 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
819 module_param(soft_margin, int, 0);
820 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
822 module_param(nowayout, int, 0);
823 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
824 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
826 module_param(allow_kdump, int, 0);
827 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
829 module_param(priority, int, 0);
830 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
831 " (default = 0/Last)\n");
833 module_init(hpwdt_init);
834 module_exit(hpwdt_cleanup);