2 * Watchdog Timer Driver
3 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 * Based on softdog.c by Alan Cox,
8 * 83977f_wdt.c by Jose Goncalves,
9 * it87.c by Chris Gauthron, Jean Delvare
11 * Data-sheets: Publicly available at the ITE website
12 * http://www.ite.com.tw/
14 * Support of the watchdog timers, which are available on
15 * IT8716, IT8718, IT8720, IT8726 and IT8712 (J,K version).
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/types.h>
35 #include <linux/kernel.h>
37 #include <linux/miscdevice.h>
38 #include <linux/init.h>
39 #include <linux/ioport.h>
40 #include <linux/watchdog.h>
41 #include <linux/notifier.h>
42 #include <linux/reboot.h>
43 #include <linux/uaccess.h>
46 #include <asm/system.h>
48 #define WATCHDOG_VERSION "1.13"
49 #define WATCHDOG_NAME "IT87 WDT"
50 #define PFX WATCHDOG_NAME ": "
51 #define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
54 /* Defaults for Module Parameter */
55 #define DEFAULT_NOGAMEPORT 0
56 #define DEFAULT_EXCLUSIVE 1
57 #define DEFAULT_TIMEOUT 60
58 #define DEFAULT_TESTMODE 0
59 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
65 /* Logical device Numbers LDN */
70 /* Configuration Registers and Functions */
78 #define NO_DEV_ID 0xffff
79 #define IT8705_ID 0x8705
80 #define IT8712_ID 0x8712
81 #define IT8716_ID 0x8716
82 #define IT8718_ID 0x8718
83 #define IT8720_ID 0x8720
84 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
86 /* GPIO Configuration Registers LDN=0x07 */
89 #define WDTVALLSB 0x73
90 #define WDTVALMSB 0x74
92 /* GPIO Bits WDTCTRL */
93 #define WDT_CIRINT 0x80
94 #define WDT_MOUSEINT 0x40
95 #define WDT_KYBINT 0x20
96 #define WDT_GAMEPORT 0x10 /* not in it8718, it8720 */
97 #define WDT_FORCE 0x02
100 /* GPIO Bits WDTCFG */
101 #define WDT_TOV1 0x80
102 #define WDT_KRST 0x40
103 #define WDT_TOVE 0x20
104 #define WDT_PWROK 0x10
105 #define WDT_INT_MASK 0x0f
107 /* CIR Configuration Register LDN=0x0a */
110 /* The default Base address is not always available, we use this */
111 #define CIR_BASE 0x0208
114 #define CIR_DR(b) (b)
115 #define CIR_IER(b) (b + 1)
116 #define CIR_RCR(b) (b + 2)
117 #define CIR_TCR1(b) (b + 3)
118 #define CIR_TCR2(b) (b + 4)
119 #define CIR_TSR(b) (b + 5)
120 #define CIR_RSR(b) (b + 6)
121 #define CIR_BDLR(b) (b + 5)
122 #define CIR_BDHR(b) (b + 6)
123 #define CIR_IIR(b) (b + 7)
125 /* Default Base address of Game port */
126 #define GP_BASE_DEFAULT 0x0201
129 #define WDTS_TIMER_RUN 0
130 #define WDTS_DEV_OPEN 1
131 #define WDTS_KEEPALIVE 2
132 #define WDTS_LOCKED 3
133 #define WDTS_USE_GP 4
134 #define WDTS_EXPECTED 5
136 static unsigned int base, gpact, ciract;
137 static unsigned long wdt_status;
138 static DEFINE_SPINLOCK(spinlock);
140 static int nogameport = DEFAULT_NOGAMEPORT;
141 static int exclusive = DEFAULT_EXCLUSIVE;
142 static int timeout = DEFAULT_TIMEOUT;
143 static int testmode = DEFAULT_TESTMODE;
144 static int nowayout = DEFAULT_NOWAYOUT;
146 module_param(nogameport, int, 0);
147 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
148 __MODULE_STRING(DEFAULT_NOGAMEPORT));
149 module_param(exclusive, int, 0);
150 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
151 __MODULE_STRING(DEFAULT_EXCLUSIVE));
152 module_param(timeout, int, 0);
153 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
154 __MODULE_STRING(DEFAULT_TIMEOUT));
155 module_param(testmode, int, 0);
156 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
157 __MODULE_STRING(DEFAULT_TESTMODE));
158 module_param(nowayout, int, 0);
159 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
160 __MODULE_STRING(WATCHDOG_NOWAYOUT));
164 static inline void superio_enter(void)
172 static inline void superio_exit(void)
178 static inline void superio_select(int ldn)
184 static inline int superio_inb(int reg)
190 static inline void superio_outb(int val, int reg)
196 static inline int superio_inw(int reg)
206 static inline void superio_outw(int val, int reg)
214 /* watchdog timer handling */
216 static void wdt_keepalive(void)
218 if (test_bit(WDTS_USE_GP, &wdt_status))
221 /* The timer reloads with around 5 msec delay */
222 outb(0x55, CIR_DR(base));
223 set_bit(WDTS_KEEPALIVE, &wdt_status);
226 static void wdt_start(void)
230 spin_lock_irqsave(&spinlock, flags);
233 superio_select(GPIO);
234 if (test_bit(WDTS_USE_GP, &wdt_status))
235 superio_outb(WDT_GAMEPORT, WDTCTRL);
237 superio_outb(WDT_CIRINT, WDTCTRL);
239 superio_outb(WDT_TOV1 | WDT_KRST | WDT_PWROK, WDTCFG);
241 superio_outb(WDT_TOV1, WDTCFG);
242 superio_outb(timeout>>8, WDTVALMSB);
243 superio_outb(timeout, WDTVALLSB);
246 spin_unlock_irqrestore(&spinlock, flags);
249 static void wdt_stop(void)
253 spin_lock_irqsave(&spinlock, flags);
256 superio_select(GPIO);
257 superio_outb(0x00, WDTCTRL);
258 superio_outb(WDT_TOV1, WDTCFG);
259 superio_outb(0x00, WDTVALMSB);
260 superio_outb(0x00, WDTVALLSB);
263 spin_unlock_irqrestore(&spinlock, flags);
267 * wdt_set_timeout - set a new timeout value with watchdog ioctl
268 * @t: timeout value in seconds
270 * The hardware device has a 16 bit watchdog timer, thus the
271 * timeout time ranges between 1 and 65535 seconds.
273 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
276 static int wdt_set_timeout(int t)
280 if (t < 1 || t > 65535)
285 spin_lock_irqsave(&spinlock, flags);
286 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
289 superio_select(GPIO);
290 superio_outb(t>>8, WDTVALMSB);
291 superio_outb(t, WDTVALLSB);
295 spin_unlock_irqrestore(&spinlock, flags);
300 * wdt_get_status - determines the status supported by watchdog ioctl
301 * @status: status returned to user space
303 * The status bit of the device does not allow to distinguish
304 * between a regular system reset and a watchdog forced reset.
305 * But, in test mode it is useful, so it is supported through
306 * WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
307 * reports the keepalive signal and the acception of the magic.
309 * Used within WDIOC_GETSTATUS watchdog device ioctl.
312 static int wdt_get_status(int *status)
318 spin_lock_irqsave(&spinlock, flags);
320 superio_select(GPIO);
321 if (superio_inb(WDTCTRL) & WDT_ZERO) {
322 superio_outb(0x00, WDTCTRL);
323 clear_bit(WDTS_TIMER_RUN, &wdt_status);
324 *status |= WDIOF_CARDRESET;
328 spin_unlock_irqrestore(&spinlock, flags);
330 if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
331 *status |= WDIOF_KEEPALIVEPING;
332 if (test_bit(WDTS_EXPECTED, &wdt_status))
333 *status |= WDIOF_MAGICCLOSE;
337 /* /dev/watchdog handling */
340 * wdt_open - watchdog file_operations .open
341 * @inode: inode of the device
342 * @file: file handle to the device
344 * The watchdog timer starts by opening the device.
346 * Used within the file operation of the watchdog device.
349 static int wdt_open(struct inode *inode, struct file *file)
351 if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
353 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
354 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
355 __module_get(THIS_MODULE);
358 return nonseekable_open(inode, file);
362 * wdt_release - watchdog file_operations .release
363 * @inode: inode of the device
364 * @file: file handle to the device
366 * Closing the watchdog device either stops the watchdog timer
367 * or in the case, that nowayout is set or the magic character
368 * wasn't written, a critical warning about an running watchdog
371 * Used within the file operation of the watchdog device.
374 static int wdt_release(struct inode *inode, struct file *file)
376 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
377 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
379 clear_bit(WDTS_TIMER_RUN, &wdt_status);
383 "unexpected close, not stopping watchdog!\n");
386 clear_bit(WDTS_DEV_OPEN, &wdt_status);
391 * wdt_write - watchdog file_operations .write
392 * @file: file handle to the watchdog
393 * @buf: buffer to write
394 * @count: count of bytes
395 * @ppos: pointer to the position to write. No seeks allowed
397 * A write to a watchdog device is defined as a keepalive signal. Any
398 * write of data will do, as we don't define content meaning.
400 * Used within the file operation of the watchdog device.
403 static ssize_t wdt_write(struct file *file, const char __user *buf,
404 size_t count, loff_t *ppos)
407 clear_bit(WDTS_EXPECTED, &wdt_status);
413 /* note: just in case someone wrote the magic character long ago */
414 for (ofs = 0; ofs != count; ofs++) {
416 if (get_user(c, buf + ofs))
419 set_bit(WDTS_EXPECTED, &wdt_status);
425 static const struct watchdog_info ident = {
426 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
427 .firmware_version = 1,
428 .identity = WATCHDOG_NAME,
432 * wdt_ioctl - watchdog file_operations .unlocked_ioctl
433 * @file: file handle to the device
434 * @cmd: watchdog command
435 * @arg: argument pointer
437 * The watchdog API defines a common set of functions for all watchdogs
438 * according to their available features.
440 * Used within the file operation of the watchdog device.
443 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
445 int rc = 0, status, new_options, new_timeout;
447 struct watchdog_info __user *ident;
451 uarg.i = (int __user *)arg;
454 case WDIOC_GETSUPPORT:
455 return copy_to_user(uarg.ident,
456 &ident, sizeof(ident)) ? -EFAULT : 0;
458 case WDIOC_GETSTATUS:
459 wdt_get_status(&status);
460 return put_user(status, uarg.i);
462 case WDIOC_GETBOOTSTATUS:
463 return put_user(0, uarg.i);
465 case WDIOC_KEEPALIVE:
469 case WDIOC_SETOPTIONS:
470 if (get_user(new_options, uarg.i))
473 switch (new_options) {
474 case WDIOS_DISABLECARD:
475 if (test_bit(WDTS_TIMER_RUN, &wdt_status))
477 clear_bit(WDTS_TIMER_RUN, &wdt_status);
480 case WDIOS_ENABLECARD:
481 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status))
489 case WDIOC_SETTIMEOUT:
490 if (get_user(new_timeout, uarg.i))
492 rc = wdt_set_timeout(new_timeout);
493 case WDIOC_GETTIMEOUT:
494 if (put_user(timeout, uarg.i))
503 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
506 if (code == SYS_DOWN || code == SYS_HALT)
511 static const struct file_operations wdt_fops = {
512 .owner = THIS_MODULE,
515 .unlocked_ioctl = wdt_ioctl,
517 .release = wdt_release,
520 static struct miscdevice wdt_miscdev = {
521 .minor = WATCHDOG_MINOR,
526 static struct notifier_block wdt_notifier = {
527 .notifier_call = wdt_notify_sys,
530 static int __init it87_wdt_init(void)
533 int try_gameport = !nogameport;
538 spin_lock_irqsave(&spinlock, flags);
540 chip_type = superio_inw(CHIPID);
541 chip_rev = superio_inb(CHIPREV) & 0x0f;
543 spin_unlock_irqrestore(&spinlock, flags);
558 "Unsupported Chip found, Chip %04x Revision %02x\n",
559 chip_type, chip_rev);
562 printk(KERN_ERR PFX "no device\n");
566 "Unknown Chip found, Chip %04x Revision %04x\n",
567 chip_type, chip_rev);
571 spin_lock_irqsave(&spinlock, flags);
574 superio_select(GPIO);
575 superio_outb(WDT_TOV1, WDTCFG);
576 superio_outb(0x00, WDTCTRL);
578 /* First try to get Gameport support */
580 superio_select(GAMEPORT);
581 base = superio_inw(BASEREG);
583 base = GP_BASE_DEFAULT;
584 superio_outw(base, BASEREG);
586 gpact = superio_inb(ACTREG);
587 superio_outb(0x01, ACTREG);
589 spin_unlock_irqrestore(&spinlock, flags);
590 if (request_region(base, 1, WATCHDOG_NAME))
591 set_bit(WDTS_USE_GP, &wdt_status);
596 spin_unlock_irqrestore(&spinlock, flags);
599 /* If we haven't Gameport support, try to get CIR support */
600 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
601 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
604 "I/O Address 0x%04x and 0x%04x"
605 " already in use\n", base, CIR_BASE);
608 "I/O Address 0x%04x already in use\n",
614 spin_lock_irqsave(&spinlock, flags);
618 superio_outw(base, BASEREG);
619 superio_outb(0x00, CIR_ILS);
620 ciract = superio_inb(ACTREG);
621 superio_outb(0x01, ACTREG);
623 superio_select(GAMEPORT);
624 superio_outb(gpact, ACTREG);
628 spin_unlock_irqrestore(&spinlock, flags);
631 if (timeout < 1 || timeout > 65535) {
632 timeout = DEFAULT_TIMEOUT;
633 printk(KERN_WARNING PFX
634 "Timeout value out of range, use default %d sec\n",
638 rc = register_reboot_notifier(&wdt_notifier);
641 "Cannot register reboot notifier (err=%d)\n", rc);
645 rc = misc_register(&wdt_miscdev);
648 "Cannot register miscdev on minor=%d (err=%d)\n",
649 wdt_miscdev.minor, rc);
653 /* Initialize CIR to use it as keepalive source */
654 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
655 outb(0x00, CIR_RCR(base));
656 outb(0xc0, CIR_TCR1(base));
657 outb(0x5c, CIR_TCR2(base));
658 outb(0x10, CIR_IER(base));
659 outb(0x00, CIR_BDHR(base));
660 outb(0x01, CIR_BDLR(base));
661 outb(0x09, CIR_IER(base));
664 printk(KERN_INFO PFX "Chip it%04x revision %d initialized. "
665 "timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
666 "nogameport=%d)\n", chip_type, chip_rev, timeout,
667 nowayout, testmode, exclusive, nogameport);
672 unregister_reboot_notifier(&wdt_notifier);
674 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
675 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
676 spin_lock_irqsave(&spinlock, flags);
679 superio_outb(ciract, ACTREG);
681 spin_unlock_irqrestore(&spinlock, flags);
685 spin_lock_irqsave(&spinlock, flags);
687 superio_select(GAMEPORT);
688 superio_outb(gpact, ACTREG);
690 spin_unlock_irqrestore(&spinlock, flags);
696 static void __exit it87_wdt_exit(void)
701 nolock = !spin_trylock_irqsave(&spinlock, flags);
703 superio_select(GPIO);
704 superio_outb(0x00, WDTCTRL);
705 superio_outb(0x00, WDTCFG);
706 superio_outb(0x00, WDTVALMSB);
707 superio_outb(0x00, WDTVALLSB);
708 if (test_bit(WDTS_USE_GP, &wdt_status)) {
709 superio_select(GAMEPORT);
710 superio_outb(gpact, ACTREG);
713 superio_outb(ciract, ACTREG);
717 spin_unlock_irqrestore(&spinlock, flags);
719 misc_deregister(&wdt_miscdev);
720 unregister_reboot_notifier(&wdt_notifier);
721 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
724 module_init(it87_wdt_init);
725 module_exit(it87_wdt_exit);
727 MODULE_AUTHOR("Oliver Schuster");
728 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
729 MODULE_LICENSE("GPL");
730 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);