2 * Watchdog Timer Driver
3 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 * Based on softdog.c by Alan Cox,
8 * 83977f_wdt.c by Jose Goncalves,
9 * it87.c by Chris Gauthron, Jean Delvare
11 * Data-sheets: Publicly available at the ITE website
12 * http://www.ite.com.tw/
14 * Support of the watchdog timers, which are available on
15 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/types.h>
35 #include <linux/kernel.h>
37 #include <linux/miscdevice.h>
38 #include <linux/init.h>
39 #include <linux/ioport.h>
40 #include <linux/watchdog.h>
41 #include <linux/notifier.h>
42 #include <linux/reboot.h>
43 #include <linux/uaccess.h>
46 #include <asm/system.h>
48 #define WATCHDOG_VERSION "1.14"
49 #define WATCHDOG_NAME "IT87 WDT"
50 #define PFX WATCHDOG_NAME ": "
51 #define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION "\n"
54 /* Defaults for Module Parameter */
55 #define DEFAULT_NOGAMEPORT 0
56 #define DEFAULT_EXCLUSIVE 1
57 #define DEFAULT_TIMEOUT 60
58 #define DEFAULT_TESTMODE 0
59 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
65 /* Logical device Numbers LDN */
70 /* Configuration Registers and Functions */
78 #define NO_DEV_ID 0xffff
79 #define IT8702_ID 0x8702
80 #define IT8705_ID 0x8705
81 #define IT8712_ID 0x8712
82 #define IT8716_ID 0x8716
83 #define IT8718_ID 0x8718
84 #define IT8720_ID 0x8720
85 #define IT8721_ID 0x8721
86 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
88 /* GPIO Configuration Registers LDN=0x07 */
91 #define WDTVALLSB 0x73
92 #define WDTVALMSB 0x74
94 /* GPIO Bits WDTCTRL */
95 #define WDT_CIRINT 0x80
96 #define WDT_MOUSEINT 0x40
97 #define WDT_KYBINT 0x20
98 #define WDT_GAMEPORT 0x10 /* not in it8718, it8720, it8721 */
99 #define WDT_FORCE 0x02
100 #define WDT_ZERO 0x01
102 /* GPIO Bits WDTCFG */
103 #define WDT_TOV1 0x80
104 #define WDT_KRST 0x40
105 #define WDT_TOVE 0x20
106 #define WDT_PWROK 0x10 /* not in it8721 */
107 #define WDT_INT_MASK 0x0f
109 /* CIR Configuration Register LDN=0x0a */
112 /* The default Base address is not always available, we use this */
113 #define CIR_BASE 0x0208
116 #define CIR_DR(b) (b)
117 #define CIR_IER(b) (b + 1)
118 #define CIR_RCR(b) (b + 2)
119 #define CIR_TCR1(b) (b + 3)
120 #define CIR_TCR2(b) (b + 4)
121 #define CIR_TSR(b) (b + 5)
122 #define CIR_RSR(b) (b + 6)
123 #define CIR_BDLR(b) (b + 5)
124 #define CIR_BDHR(b) (b + 6)
125 #define CIR_IIR(b) (b + 7)
127 /* Default Base address of Game port */
128 #define GP_BASE_DEFAULT 0x0201
131 #define WDTS_TIMER_RUN 0
132 #define WDTS_DEV_OPEN 1
133 #define WDTS_KEEPALIVE 2
134 #define WDTS_LOCKED 3
135 #define WDTS_USE_GP 4
136 #define WDTS_EXPECTED 5
138 static unsigned int base, gpact, ciract, max_units, chip_type;
139 static unsigned long wdt_status;
141 static int nogameport = DEFAULT_NOGAMEPORT;
142 static int exclusive = DEFAULT_EXCLUSIVE;
143 static int timeout = DEFAULT_TIMEOUT;
144 static int testmode = DEFAULT_TESTMODE;
145 static int nowayout = DEFAULT_NOWAYOUT;
147 module_param(nogameport, int, 0);
148 MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default="
149 __MODULE_STRING(DEFAULT_NOGAMEPORT));
150 module_param(exclusive, int, 0);
151 MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default="
152 __MODULE_STRING(DEFAULT_EXCLUSIVE));
153 module_param(timeout, int, 0);
154 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
155 __MODULE_STRING(DEFAULT_TIMEOUT));
156 module_param(testmode, int, 0);
157 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
158 __MODULE_STRING(DEFAULT_TESTMODE));
159 module_param(nowayout, int, 0);
160 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
161 __MODULE_STRING(WATCHDOG_NOWAYOUT));
165 static inline int superio_enter(void)
168 * Try to reserve REG and REG + 1 for exclusive access.
170 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
180 static inline void superio_exit(void)
184 release_region(REG, 2);
187 static inline void superio_select(int ldn)
193 static inline int superio_inb(int reg)
199 static inline void superio_outb(int val, int reg)
205 static inline int superio_inw(int reg)
215 static inline void superio_outw(int val, int reg)
223 /* Internal function, should be called after superio_select(GPIO) */
224 static void wdt_update_timeout(void)
226 unsigned char cfg = WDT_KRST;
237 if (chip_type != IT8721_ID)
240 superio_outb(cfg, WDTCFG);
241 superio_outb(tm, WDTVALLSB);
243 superio_outb(tm>>8, WDTVALMSB);
246 static int wdt_round_time(int t)
253 /* watchdog timer handling */
255 static void wdt_keepalive(void)
257 if (test_bit(WDTS_USE_GP, &wdt_status))
260 /* The timer reloads with around 5 msec delay */
261 outb(0x55, CIR_DR(base));
262 set_bit(WDTS_KEEPALIVE, &wdt_status);
265 static int wdt_start(void)
267 int ret = superio_enter();
271 superio_select(GPIO);
272 if (test_bit(WDTS_USE_GP, &wdt_status))
273 superio_outb(WDT_GAMEPORT, WDTCTRL);
275 superio_outb(WDT_CIRINT, WDTCTRL);
276 wdt_update_timeout();
283 static int wdt_stop(void)
285 int ret = superio_enter();
289 superio_select(GPIO);
290 superio_outb(0x00, WDTCTRL);
291 superio_outb(WDT_TOV1, WDTCFG);
292 superio_outb(0x00, WDTVALLSB);
294 superio_outb(0x00, WDTVALMSB);
301 * wdt_set_timeout - set a new timeout value with watchdog ioctl
302 * @t: timeout value in seconds
304 * The hardware device has a 8 or 16 bit watchdog timer (depends on
305 * chip version) that can be configured to count seconds or minutes.
307 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
310 static int wdt_set_timeout(int t)
312 if (t < 1 || t > max_units * 60)
316 timeout = wdt_round_time(t);
320 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
321 int ret = superio_enter();
325 superio_select(GPIO);
326 wdt_update_timeout();
333 * wdt_get_status - determines the status supported by watchdog ioctl
334 * @status: status returned to user space
336 * The status bit of the device does not allow to distinguish
337 * between a regular system reset and a watchdog forced reset.
338 * But, in test mode it is useful, so it is supported through
339 * WDIOC_GETSTATUS watchdog ioctl. Additionally the driver
340 * reports the keepalive signal and the acception of the magic.
342 * Used within WDIOC_GETSTATUS watchdog device ioctl.
345 static int wdt_get_status(int *status)
349 int ret = superio_enter();
353 superio_select(GPIO);
354 if (superio_inb(WDTCTRL) & WDT_ZERO) {
355 superio_outb(0x00, WDTCTRL);
356 clear_bit(WDTS_TIMER_RUN, &wdt_status);
357 *status |= WDIOF_CARDRESET;
362 if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status))
363 *status |= WDIOF_KEEPALIVEPING;
364 if (test_bit(WDTS_EXPECTED, &wdt_status))
365 *status |= WDIOF_MAGICCLOSE;
369 /* /dev/watchdog handling */
372 * wdt_open - watchdog file_operations .open
373 * @inode: inode of the device
374 * @file: file handle to the device
376 * The watchdog timer starts by opening the device.
378 * Used within the file operation of the watchdog device.
381 static int wdt_open(struct inode *inode, struct file *file)
383 if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status))
385 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
387 if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status))
388 __module_get(THIS_MODULE);
392 clear_bit(WDTS_LOCKED, &wdt_status);
393 clear_bit(WDTS_TIMER_RUN, &wdt_status);
394 clear_bit(WDTS_DEV_OPEN, &wdt_status);
398 return nonseekable_open(inode, file);
402 * wdt_release - watchdog file_operations .release
403 * @inode: inode of the device
404 * @file: file handle to the device
406 * Closing the watchdog device either stops the watchdog timer
407 * or in the case, that nowayout is set or the magic character
408 * wasn't written, a critical warning about an running watchdog
411 * Used within the file operation of the watchdog device.
414 static int wdt_release(struct inode *inode, struct file *file)
416 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
417 if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) {
418 int ret = wdt_stop();
421 * Stop failed. Just keep the watchdog alive
422 * and hope nothing bad happens.
424 set_bit(WDTS_EXPECTED, &wdt_status);
428 clear_bit(WDTS_TIMER_RUN, &wdt_status);
432 "unexpected close, not stopping watchdog!\n");
435 clear_bit(WDTS_DEV_OPEN, &wdt_status);
440 * wdt_write - watchdog file_operations .write
441 * @file: file handle to the watchdog
442 * @buf: buffer to write
443 * @count: count of bytes
444 * @ppos: pointer to the position to write. No seeks allowed
446 * A write to a watchdog device is defined as a keepalive signal. Any
447 * write of data will do, as we don't define content meaning.
449 * Used within the file operation of the watchdog device.
452 static ssize_t wdt_write(struct file *file, const char __user *buf,
453 size_t count, loff_t *ppos)
456 clear_bit(WDTS_EXPECTED, &wdt_status);
462 /* note: just in case someone wrote the magic character long ago */
463 for (ofs = 0; ofs != count; ofs++) {
465 if (get_user(c, buf + ofs))
468 set_bit(WDTS_EXPECTED, &wdt_status);
474 static const struct watchdog_info ident = {
475 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
476 .firmware_version = 1,
477 .identity = WATCHDOG_NAME,
481 * wdt_ioctl - watchdog file_operations .unlocked_ioctl
482 * @file: file handle to the device
483 * @cmd: watchdog command
484 * @arg: argument pointer
486 * The watchdog API defines a common set of functions for all watchdogs
487 * according to their available features.
489 * Used within the file operation of the watchdog device.
492 static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
494 int rc = 0, status, new_options, new_timeout;
496 struct watchdog_info __user *ident;
500 uarg.i = (int __user *)arg;
503 case WDIOC_GETSUPPORT:
504 return copy_to_user(uarg.ident,
505 &ident, sizeof(ident)) ? -EFAULT : 0;
507 case WDIOC_GETSTATUS:
508 rc = wdt_get_status(&status);
511 return put_user(status, uarg.i);
513 case WDIOC_GETBOOTSTATUS:
514 return put_user(0, uarg.i);
516 case WDIOC_KEEPALIVE:
520 case WDIOC_SETOPTIONS:
521 if (get_user(new_options, uarg.i))
524 switch (new_options) {
525 case WDIOS_DISABLECARD:
526 if (test_bit(WDTS_TIMER_RUN, &wdt_status)) {
531 clear_bit(WDTS_TIMER_RUN, &wdt_status);
534 case WDIOS_ENABLECARD:
535 if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) {
538 clear_bit(WDTS_TIMER_RUN, &wdt_status);
548 case WDIOC_SETTIMEOUT:
549 if (get_user(new_timeout, uarg.i))
551 rc = wdt_set_timeout(new_timeout);
552 case WDIOC_GETTIMEOUT:
553 if (put_user(timeout, uarg.i))
562 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
565 if (code == SYS_DOWN || code == SYS_HALT)
570 static const struct file_operations wdt_fops = {
571 .owner = THIS_MODULE,
574 .unlocked_ioctl = wdt_ioctl,
576 .release = wdt_release,
579 static struct miscdevice wdt_miscdev = {
580 .minor = WATCHDOG_MINOR,
585 static struct notifier_block wdt_notifier = {
586 .notifier_call = wdt_notify_sys,
589 static int __init it87_wdt_init(void)
592 int try_gameport = !nogameport;
594 int gp_rreq_fail = 0;
598 rc = superio_enter();
602 chip_type = superio_inw(CHIPID);
603 chip_rev = superio_inb(CHIPREV) & 0x0f;
611 max_units = (chip_rev < 8) ? 255 : 65535;
625 "Unsupported Chip found, Chip %04x Revision %02x\n",
626 chip_type, chip_rev);
629 printk(KERN_ERR PFX "no device\n");
633 "Unknown Chip found, Chip %04x Revision %04x\n",
634 chip_type, chip_rev);
638 rc = superio_enter();
642 superio_select(GPIO);
643 superio_outb(WDT_TOV1, WDTCFG);
644 superio_outb(0x00, WDTCTRL);
646 /* First try to get Gameport support */
648 superio_select(GAMEPORT);
649 base = superio_inw(BASEREG);
651 base = GP_BASE_DEFAULT;
652 superio_outw(base, BASEREG);
654 gpact = superio_inb(ACTREG);
655 superio_outb(0x01, ACTREG);
656 if (request_region(base, 1, WATCHDOG_NAME))
657 set_bit(WDTS_USE_GP, &wdt_status);
662 /* If we haven't Gameport support, try to get CIR support */
663 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
664 if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) {
667 "I/O Address 0x%04x and 0x%04x"
668 " already in use\n", base, CIR_BASE);
671 "I/O Address 0x%04x already in use\n",
679 superio_outw(base, BASEREG);
680 superio_outb(0x00, CIR_ILS);
681 ciract = superio_inb(ACTREG);
682 superio_outb(0x01, ACTREG);
684 superio_select(GAMEPORT);
685 superio_outb(gpact, ACTREG);
689 if (timeout < 1 || timeout > max_units * 60) {
690 timeout = DEFAULT_TIMEOUT;
691 printk(KERN_WARNING PFX
692 "Timeout value out of range, use default %d sec\n",
696 if (timeout > max_units)
697 timeout = wdt_round_time(timeout);
699 rc = register_reboot_notifier(&wdt_notifier);
702 "Cannot register reboot notifier (err=%d)\n", rc);
706 rc = misc_register(&wdt_miscdev);
709 "Cannot register miscdev on minor=%d (err=%d)\n",
710 wdt_miscdev.minor, rc);
714 /* Initialize CIR to use it as keepalive source */
715 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
716 outb(0x00, CIR_RCR(base));
717 outb(0xc0, CIR_TCR1(base));
718 outb(0x5c, CIR_TCR2(base));
719 outb(0x10, CIR_IER(base));
720 outb(0x00, CIR_BDHR(base));
721 outb(0x01, CIR_BDLR(base));
722 outb(0x09, CIR_IER(base));
725 printk(KERN_INFO PFX "Chip IT%04x revision %d initialized. "
726 "timeout=%d sec (nowayout=%d testmode=%d exclusive=%d "
727 "nogameport=%d)\n", chip_type, chip_rev, timeout,
728 nowayout, testmode, exclusive, nogameport);
734 unregister_reboot_notifier(&wdt_notifier);
736 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
737 if (!test_bit(WDTS_USE_GP, &wdt_status)) {
739 superio_outb(ciract, ACTREG);
743 superio_select(GAMEPORT);
744 superio_outb(gpact, ACTREG);
751 static void __exit it87_wdt_exit(void)
753 if (superio_enter() == 0) {
754 superio_select(GPIO);
755 superio_outb(0x00, WDTCTRL);
756 superio_outb(0x00, WDTCFG);
757 superio_outb(0x00, WDTVALLSB);
759 superio_outb(0x00, WDTVALMSB);
760 if (test_bit(WDTS_USE_GP, &wdt_status)) {
761 superio_select(GAMEPORT);
762 superio_outb(gpact, ACTREG);
765 superio_outb(ciract, ACTREG);
770 misc_deregister(&wdt_miscdev);
771 unregister_reboot_notifier(&wdt_notifier);
772 release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8);
775 module_init(it87_wdt_init);
776 module_exit(it87_wdt_exit);
778 MODULE_AUTHOR("Oliver Schuster");
779 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
780 MODULE_LICENSE("GPL");
781 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);