4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@redhat.com>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42 #include <linux/bitops.h>
44 #include <linux/uaccess.h>
45 #include <mach/hardware.h>
46 #include <mach/prcm.h>
50 static struct platform_device *omap_wdt_dev;
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56 static unsigned int wdt_trgr_pattern = 0x1234;
57 static spinlock_t wdt_lock;
60 void __iomem *base; /* physical */
63 struct clk *armwdt_ck;
64 struct clk *mpu_wdt_ick;
65 struct clk *mpu_wdt_fck;
67 struct miscdevice omap_wdt_miscdev;
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
72 void __iomem *base = wdev->base;
73 /* wait for posted write to complete */
74 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76 wdt_trgr_pattern = ~wdt_trgr_pattern;
77 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78 /* wait for posted write to complete */
79 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
81 /* reloaded WCRR from WLDR */
84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
88 /* Sequence to enable the watchdog */
89 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
90 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
92 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
101 /* sequence required to disable watchdog */
102 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
103 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
105 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
106 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
110 static void omap_wdt_adjust_timeout(unsigned new_timeout)
112 if (new_timeout < TIMER_MARGIN_MIN)
113 new_timeout = TIMER_MARGIN_DEFAULT;
114 if (new_timeout > TIMER_MARGIN_MAX)
115 new_timeout = TIMER_MARGIN_MAX;
116 timer_margin = new_timeout;
119 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
121 u32 pre_margin = GET_WLDR_VAL(timer_margin);
125 /* just count up at 32 KHz */
126 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
128 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
129 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
134 * Allow only one task to hold it open
137 static int omap_wdt_open(struct inode *inode, struct file *file)
139 struct omap_wdt_dev *wdev;
141 wdev = platform_get_drvdata(omap_wdt_dev);
143 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
146 if (cpu_is_omap16xx())
147 clk_enable(wdev->armwdt_ck); /* Enable the clock */
149 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
150 clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
151 clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
154 /* initialize prescaler */
155 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
157 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
161 file->private_data = (void *) wdev;
163 omap_wdt_set_timeout(wdev);
164 omap_wdt_enable(wdev);
165 return nonseekable_open(inode, file);
168 static int omap_wdt_release(struct inode *inode, struct file *file)
170 struct omap_wdt_dev *wdev;
171 wdev = file->private_data;
173 * Shut off the timer unless NOWAYOUT is defined.
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
177 omap_wdt_disable(wdev);
179 if (cpu_is_omap16xx())
180 clk_disable(wdev->armwdt_ck); /* Disable the clock */
182 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
183 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
184 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
187 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
189 wdev->omap_wdt_users = 0;
193 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
194 size_t len, loff_t *ppos)
196 struct omap_wdt_dev *wdev;
197 wdev = file->private_data;
198 /* Refresh LOAD_TIME. */
200 spin_lock(&wdt_lock);
202 spin_unlock(&wdt_lock);
207 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
210 struct omap_wdt_dev *wdev;
212 static const struct watchdog_info ident = {
213 .identity = "OMAP Watchdog",
214 .options = WDIOF_SETTIMEOUT,
215 .firmware_version = 0,
217 wdev = file->private_data;
220 case WDIOC_GETSUPPORT:
221 return copy_to_user((struct watchdog_info __user *)arg, &ident,
223 case WDIOC_GETSTATUS:
224 return put_user(0, (int __user *)arg);
225 case WDIOC_GETBOOTSTATUS:
226 if (cpu_is_omap16xx())
227 return put_user(__raw_readw(ARM_SYSST),
229 if (cpu_is_omap24xx())
230 return put_user(omap_prcm_get_reset_sources(),
232 case WDIOC_KEEPALIVE:
233 spin_lock(&wdt_lock);
235 spin_unlock(&wdt_lock);
237 case WDIOC_SETTIMEOUT:
238 if (get_user(new_margin, (int __user *)arg))
240 omap_wdt_adjust_timeout(new_margin);
242 spin_lock(&wdt_lock);
243 omap_wdt_disable(wdev);
244 omap_wdt_set_timeout(wdev);
245 omap_wdt_enable(wdev);
248 spin_unlock(&wdt_lock);
250 case WDIOC_GETTIMEOUT:
251 return put_user(timer_margin, (int __user *)arg);
257 static const struct file_operations omap_wdt_fops = {
258 .owner = THIS_MODULE,
259 .write = omap_wdt_write,
260 .unlocked_ioctl = omap_wdt_ioctl,
261 .open = omap_wdt_open,
262 .release = omap_wdt_release,
266 static int __init omap_wdt_probe(struct platform_device *pdev)
268 struct resource *res, *mem;
270 struct omap_wdt_dev *wdev;
272 /* reserve static register mappings */
273 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280 mem = request_mem_region(res->start, res->end - res->start + 1,
285 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
290 wdev->omap_wdt_users = 0;
293 if (cpu_is_omap16xx()) {
294 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
295 if (IS_ERR(wdev->armwdt_ck)) {
296 ret = PTR_ERR(wdev->armwdt_ck);
297 wdev->armwdt_ck = NULL;
302 if (cpu_is_omap24xx()) {
303 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
304 if (IS_ERR(wdev->mpu_wdt_ick)) {
305 ret = PTR_ERR(wdev->mpu_wdt_ick);
306 wdev->mpu_wdt_ick = NULL;
309 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
310 if (IS_ERR(wdev->mpu_wdt_fck)) {
311 ret = PTR_ERR(wdev->mpu_wdt_fck);
312 wdev->mpu_wdt_fck = NULL;
317 if (cpu_is_omap34xx()) {
318 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
319 if (IS_ERR(wdev->mpu_wdt_ick)) {
320 ret = PTR_ERR(wdev->mpu_wdt_ick);
321 wdev->mpu_wdt_ick = NULL;
324 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
325 if (IS_ERR(wdev->mpu_wdt_fck)) {
326 ret = PTR_ERR(wdev->mpu_wdt_fck);
327 wdev->mpu_wdt_fck = NULL;
331 wdev->base = ioremap(res->start, res->end - res->start + 1);
337 platform_set_drvdata(pdev, wdev);
339 omap_wdt_disable(wdev);
340 omap_wdt_adjust_timeout(timer_margin);
342 wdev->omap_wdt_miscdev.parent = &pdev->dev;
343 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
344 wdev->omap_wdt_miscdev.name = "watchdog";
345 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
347 ret = misc_register(&(wdev->omap_wdt_miscdev));
351 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
352 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
355 /* autogate OCP interface clock */
356 __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
364 platform_set_drvdata(pdev, NULL);
366 clk_put(wdev->armwdt_ck);
367 if (wdev->mpu_wdt_ick)
368 clk_put(wdev->mpu_wdt_ick);
369 if (wdev->mpu_wdt_fck)
370 clk_put(wdev->mpu_wdt_fck);
375 release_mem_region(res->start, res->end - res->start + 1);
380 static void omap_wdt_shutdown(struct platform_device *pdev)
382 struct omap_wdt_dev *wdev;
383 wdev = platform_get_drvdata(pdev);
385 if (wdev->omap_wdt_users)
386 omap_wdt_disable(wdev);
389 static int omap_wdt_remove(struct platform_device *pdev)
391 struct omap_wdt_dev *wdev;
392 wdev = platform_get_drvdata(pdev);
393 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
398 misc_deregister(&(wdev->omap_wdt_miscdev));
399 release_mem_region(res->start, res->end - res->start + 1);
400 platform_set_drvdata(pdev, NULL);
401 if (wdev->armwdt_ck) {
402 clk_put(wdev->armwdt_ck);
403 wdev->armwdt_ck = NULL;
405 if (wdev->mpu_wdt_ick) {
406 clk_put(wdev->mpu_wdt_ick);
407 wdev->mpu_wdt_ick = NULL;
409 if (wdev->mpu_wdt_fck) {
410 clk_put(wdev->mpu_wdt_fck);
411 wdev->mpu_wdt_fck = NULL;
422 /* REVISIT ... not clear this is the best way to handle system suspend; and
423 * it's very inappropriate for selective device suspend (e.g. suspending this
424 * through sysfs rather than by stopping the watchdog daemon). Also, this
425 * may not play well enough with NOWAYOUT...
428 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
430 struct omap_wdt_dev *wdev;
431 wdev = platform_get_drvdata(pdev);
432 if (wdev->omap_wdt_users)
433 omap_wdt_disable(wdev);
437 static int omap_wdt_resume(struct platform_device *pdev)
439 struct omap_wdt_dev *wdev;
440 wdev = platform_get_drvdata(pdev);
441 if (wdev->omap_wdt_users) {
442 omap_wdt_enable(wdev);
449 #define omap_wdt_suspend NULL
450 #define omap_wdt_resume NULL
453 static struct platform_driver omap_wdt_driver = {
454 .probe = omap_wdt_probe,
455 .remove = omap_wdt_remove,
456 .shutdown = omap_wdt_shutdown,
457 .suspend = omap_wdt_suspend,
458 .resume = omap_wdt_resume,
460 .owner = THIS_MODULE,
465 static int __init omap_wdt_init(void)
467 spin_lock_init(&wdt_lock);
468 return platform_driver_register(&omap_wdt_driver);
471 static void __exit omap_wdt_exit(void)
473 platform_driver_unregister(&omap_wdt_driver);
476 module_init(omap_wdt_init);
477 module_exit(omap_wdt_exit);
479 MODULE_AUTHOR("George G. Davis");
480 MODULE_LICENSE("GPL");
481 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
482 MODULE_ALIAS("platform:omap_wdt");