4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/bitops.h>
43 #include <linux/uaccess.h>
44 #include <linux/slab.h>
45 #include <linux/pm_runtime.h>
46 #include <mach/hardware.h>
47 #include <plat/prcm.h>
51 static struct platform_device *omap_wdt_dev;
53 static unsigned timer_margin;
54 module_param(timer_margin, uint, 0);
55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
57 static unsigned int wdt_trgr_pattern = 0x1234;
58 static DEFINE_SPINLOCK(wdt_lock);
61 void __iomem *base; /* physical */
65 struct miscdevice omap_wdt_miscdev;
68 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
70 void __iomem *base = wdev->base;
72 /* wait for posted write to complete */
73 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76 wdt_trgr_pattern = ~wdt_trgr_pattern;
77 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
79 /* wait for posted write to complete */
80 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
82 /* reloaded WCRR from WLDR */
85 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
87 void __iomem *base = wdev->base;
89 /* Sequence to enable the watchdog */
90 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
91 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
95 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
99 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
101 void __iomem *base = wdev->base;
103 /* sequence required to disable watchdog */
104 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
105 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
108 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
109 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
113 static void omap_wdt_adjust_timeout(unsigned new_timeout)
115 if (new_timeout < TIMER_MARGIN_MIN)
116 new_timeout = TIMER_MARGIN_DEFAULT;
117 if (new_timeout > TIMER_MARGIN_MAX)
118 new_timeout = TIMER_MARGIN_MAX;
119 timer_margin = new_timeout;
122 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
124 u32 pre_margin = GET_WLDR_VAL(timer_margin);
125 void __iomem *base = wdev->base;
127 pm_runtime_get_sync(wdev->dev);
129 /* just count up at 32 KHz */
130 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
133 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
134 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
137 pm_runtime_put_sync(wdev->dev);
141 * Allow only one task to hold it open
143 static int omap_wdt_open(struct inode *inode, struct file *file)
145 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
146 void __iomem *base = wdev->base;
148 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
151 pm_runtime_get_sync(wdev->dev);
153 /* initialize prescaler */
154 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
157 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
161 file->private_data = (void *) wdev;
163 omap_wdt_set_timeout(wdev);
164 omap_wdt_ping(wdev); /* trigger loading of new timeout value */
165 omap_wdt_enable(wdev);
167 pm_runtime_put_sync(wdev->dev);
169 return nonseekable_open(inode, file);
172 static int omap_wdt_release(struct inode *inode, struct file *file)
174 struct omap_wdt_dev *wdev = file->private_data;
177 * Shut off the timer unless NOWAYOUT is defined.
179 #ifndef CONFIG_WATCHDOG_NOWAYOUT
180 pm_runtime_get_sync(wdev->dev);
182 omap_wdt_disable(wdev);
184 pm_runtime_put_sync(wdev->dev);
186 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
188 wdev->omap_wdt_users = 0;
193 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
194 size_t len, loff_t *ppos)
196 struct omap_wdt_dev *wdev = file->private_data;
198 /* Refresh LOAD_TIME. */
200 pm_runtime_get_sync(wdev->dev);
201 spin_lock(&wdt_lock);
203 spin_unlock(&wdt_lock);
204 pm_runtime_put_sync(wdev->dev);
209 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
212 struct omap_wdt_dev *wdev;
214 static const struct watchdog_info ident = {
215 .identity = "OMAP Watchdog",
216 .options = WDIOF_SETTIMEOUT,
217 .firmware_version = 0,
220 wdev = file->private_data;
223 case WDIOC_GETSUPPORT:
224 return copy_to_user((struct watchdog_info __user *)arg, &ident,
226 case WDIOC_GETSTATUS:
227 return put_user(0, (int __user *)arg);
228 case WDIOC_GETBOOTSTATUS:
229 if (cpu_is_omap16xx())
230 return put_user(__raw_readw(ARM_SYSST),
232 if (cpu_is_omap24xx())
233 return put_user(omap_prcm_get_reset_sources(),
235 return put_user(0, (int __user *)arg);
236 case WDIOC_KEEPALIVE:
237 pm_runtime_get_sync(wdev->dev);
238 spin_lock(&wdt_lock);
240 spin_unlock(&wdt_lock);
241 pm_runtime_put_sync(wdev->dev);
243 case WDIOC_SETTIMEOUT:
244 if (get_user(new_margin, (int __user *)arg))
246 omap_wdt_adjust_timeout(new_margin);
248 pm_runtime_get_sync(wdev->dev);
249 spin_lock(&wdt_lock);
250 omap_wdt_disable(wdev);
251 omap_wdt_set_timeout(wdev);
252 omap_wdt_enable(wdev);
255 spin_unlock(&wdt_lock);
256 pm_runtime_put_sync(wdev->dev);
258 case WDIOC_GETTIMEOUT:
259 return put_user(timer_margin, (int __user *)arg);
265 static const struct file_operations omap_wdt_fops = {
266 .owner = THIS_MODULE,
267 .write = omap_wdt_write,
268 .unlocked_ioctl = omap_wdt_ioctl,
269 .open = omap_wdt_open,
270 .release = omap_wdt_release,
274 static int __devinit omap_wdt_probe(struct platform_device *pdev)
276 struct resource *res, *mem;
277 struct omap_wdt_dev *wdev;
280 /* reserve static register mappings */
281 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
284 goto err_get_resource;
292 mem = request_mem_region(res->start, resource_size(res), pdev->name);
298 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
304 wdev->omap_wdt_users = 0;
306 wdev->dev = &pdev->dev;
308 wdev->base = ioremap(res->start, resource_size(res));
314 platform_set_drvdata(pdev, wdev);
316 pm_runtime_enable(wdev->dev);
317 pm_runtime_get_sync(wdev->dev);
319 omap_wdt_disable(wdev);
320 omap_wdt_adjust_timeout(timer_margin);
322 wdev->omap_wdt_miscdev.parent = &pdev->dev;
323 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
324 wdev->omap_wdt_miscdev.name = "watchdog";
325 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
327 ret = misc_register(&(wdev->omap_wdt_miscdev));
331 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
332 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
335 pm_runtime_put_sync(wdev->dev);
342 platform_set_drvdata(pdev, NULL);
350 release_mem_region(res->start, resource_size(res));
358 static void omap_wdt_shutdown(struct platform_device *pdev)
360 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
362 if (wdev->omap_wdt_users) {
363 pm_runtime_get_sync(wdev->dev);
364 omap_wdt_disable(wdev);
365 pm_runtime_put_sync(wdev->dev);
369 static int __devexit omap_wdt_remove(struct platform_device *pdev)
371 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
372 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
377 misc_deregister(&(wdev->omap_wdt_miscdev));
378 release_mem_region(res->start, resource_size(res));
379 platform_set_drvdata(pdev, NULL);
391 /* REVISIT ... not clear this is the best way to handle system suspend; and
392 * it's very inappropriate for selective device suspend (e.g. suspending this
393 * through sysfs rather than by stopping the watchdog daemon). Also, this
394 * may not play well enough with NOWAYOUT...
397 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
399 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
401 if (wdev->omap_wdt_users) {
402 pm_runtime_get_sync(wdev->dev);
403 omap_wdt_disable(wdev);
404 pm_runtime_put_sync(wdev->dev);
410 static int omap_wdt_resume(struct platform_device *pdev)
412 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
414 if (wdev->omap_wdt_users) {
415 pm_runtime_get_sync(wdev->dev);
416 omap_wdt_enable(wdev);
418 pm_runtime_put_sync(wdev->dev);
425 #define omap_wdt_suspend NULL
426 #define omap_wdt_resume NULL
429 static struct platform_driver omap_wdt_driver = {
430 .probe = omap_wdt_probe,
431 .remove = __devexit_p(omap_wdt_remove),
432 .shutdown = omap_wdt_shutdown,
433 .suspend = omap_wdt_suspend,
434 .resume = omap_wdt_resume,
436 .owner = THIS_MODULE,
441 module_platform_driver(omap_wdt_driver);
443 MODULE_AUTHOR("George G. Davis");
444 MODULE_LICENSE("GPL");
445 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
446 MODULE_ALIAS("platform:omap_wdt");