2 * w83627hf/thf WDT driver
4 * (c) Copyright 2013 Guenter Roeck
5 * converted to watchdog infrastructure
7 * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
8 * added support for W83627THF.
10 * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
12 * Based on advantechwdt.c which is based on wdt.c.
13 * Original copyright messages:
15 * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
17 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
18 * All Rights Reserved.
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
25 * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
26 * warranty for any of this software. This material is provided
27 * "AS-IS" and at no charge.
29 * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/types.h>
37 #include <linux/watchdog.h>
38 #include <linux/ioport.h>
39 #include <linux/init.h>
42 #define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
43 #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
46 static int cr_wdt_timeout; /* WDT timeout register */
47 static int cr_wdt_control; /* WDT control register */
49 enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
50 w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p,
51 w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792 };
53 static int timeout; /* in seconds */
54 module_param(timeout, int, 0);
55 MODULE_PARM_DESC(timeout,
56 "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
57 __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
59 static bool nowayout = WATCHDOG_NOWAYOUT;
60 module_param(nowayout, bool, 0);
61 MODULE_PARM_DESC(nowayout,
62 "Watchdog cannot be stopped once started (default="
63 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
65 static int early_disable;
66 module_param(early_disable, int, 0);
67 MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)");
73 #define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
74 #define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
76 #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
78 #define W83627HF_LD_WDT 0x08
80 #define W83627HF_ID 0x52
81 #define W83627S_ID 0x59
82 #define W83697HF_ID 0x60
83 #define W83697UG_ID 0x68
84 #define W83637HF_ID 0x70
85 #define W83627THF_ID 0x82
86 #define W83687THF_ID 0x85
87 #define W83627EHF_ID 0x88
88 #define W83627DHG_ID 0xa0
89 #define W83627UHG_ID 0xa2
90 #define W83667HG_ID 0xa5
91 #define W83627DHG_P_ID 0xb0
92 #define W83667HG_B_ID 0xb3
93 #define NCT6775_ID 0xb4
94 #define NCT6776_ID 0xc3
95 #define NCT6779_ID 0xc5
96 #define NCT6791_ID 0xc8
97 #define NCT6792_ID 0xc9
99 #define W83627HF_WDT_TIMEOUT 0xf6
100 #define W83697HF_WDT_TIMEOUT 0xf4
102 #define W83627HF_WDT_CONTROL 0xf5
103 #define W83697HF_WDT_CONTROL 0xf3
105 static void superio_outb(int reg, int val)
111 static inline int superio_inb(int reg)
114 return inb(WDT_EFDR);
117 static int superio_enter(void)
119 if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
122 outb_p(0x87, WDT_EFER); /* Enter extended function mode */
123 outb_p(0x87, WDT_EFER); /* Again according to manual */
128 static void superio_select(int ld)
130 superio_outb(0x07, ld);
133 static void superio_exit(void)
135 outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
136 release_region(wdt_io, 2);
139 static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
144 ret = superio_enter();
148 superio_select(W83627HF_LD_WDT);
150 /* set CR30 bit 0 to activate GPIO2 */
151 t = superio_inb(0x30);
153 superio_outb(0x30, t | 0x01);
158 t = superio_inb(0x2B) & ~0x10;
159 superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
162 /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
163 t = superio_inb(0x29) & ~0x60;
165 superio_outb(0x29, t);
168 /* Set pin 118 to WDTO# mode */
169 t = superio_inb(0x2b) & ~0x04;
170 superio_outb(0x2b, t);
173 t = (superio_inb(0x2B) & ~0x08) | 0x04;
174 superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
178 t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
179 superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
180 t = superio_inb(cr_wdt_control);
181 t |= 0x02; /* enable the WDTO# output low pulse
182 * to the KBRST# pin */
183 superio_outb(cr_wdt_control, t);
188 t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
189 superio_outb(0x2C, t);
201 * These chips have a fixed WDTO# output pin (W83627UHG),
202 * or support more than one WDTO# output pin.
203 * Don't touch its configuration, and hope the BIOS
204 * does the right thing.
206 t = superio_inb(cr_wdt_control);
207 t |= 0x02; /* enable the WDTO# output low pulse
208 * to the KBRST# pin */
209 superio_outb(cr_wdt_control, t);
215 t = superio_inb(cr_wdt_timeout);
218 pr_warn("Stopping previously enabled watchdog until userland kicks in\n");
219 superio_outb(cr_wdt_timeout, 0);
221 pr_info("Watchdog already running. Resetting timeout to %d sec\n",
223 superio_outb(cr_wdt_timeout, wdog->timeout);
227 /* set second mode & disable keyboard turning off watchdog */
228 t = superio_inb(cr_wdt_control) & ~0x0C;
229 superio_outb(cr_wdt_control, t);
231 /* reset trigger, disable keyboard & mouse turning off watchdog */
232 t = superio_inb(0xF7) & ~0xD0;
233 superio_outb(0xF7, t);
240 static int wdt_set_time(unsigned int timeout)
244 ret = superio_enter();
248 superio_select(W83627HF_LD_WDT);
249 superio_outb(cr_wdt_timeout, timeout);
255 static int wdt_start(struct watchdog_device *wdog)
257 return wdt_set_time(wdog->timeout);
260 static int wdt_stop(struct watchdog_device *wdog)
262 return wdt_set_time(0);
265 static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
267 wdog->timeout = timeout;
272 static unsigned int wdt_get_time(struct watchdog_device *wdog)
274 unsigned int timeleft;
277 ret = superio_enter();
281 superio_select(W83627HF_LD_WDT);
282 timeleft = superio_inb(cr_wdt_timeout);
292 static struct watchdog_info wdt_info = {
293 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
294 .identity = "W83627HF Watchdog",
297 static struct watchdog_ops wdt_ops = {
298 .owner = THIS_MODULE,
301 .set_timeout = wdt_set_timeout,
302 .get_timeleft = wdt_get_time,
305 static struct watchdog_device wdt_dev = {
308 .timeout = WATCHDOG_TIMEOUT,
314 * The WDT needs to learn about soft shutdowns in order to
315 * turn the timebomb registers off.
318 static int wdt_find(int addr)
323 cr_wdt_timeout = W83627HF_WDT_TIMEOUT;
324 cr_wdt_control = W83627HF_WDT_CONTROL;
326 ret = superio_enter();
329 superio_select(W83627HF_LD_WDT);
330 val = superio_inb(0x20);
340 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
341 cr_wdt_control = W83697HF_WDT_CONTROL;
345 cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
346 cr_wdt_control = W83697HF_WDT_CONTROL;
395 pr_err("Unsupported chip ID: 0x%02x\n", val);
402 static int __init wdt_init(void)
406 const char * const chip_name[] = {
428 chip = wdt_find(0x2e);
431 chip = wdt_find(0x4e);
436 pr_info("WDT driver for %s Super I/O chip initialising\n",
439 watchdog_init_timeout(&wdt_dev, timeout, NULL);
440 watchdog_set_nowayout(&wdt_dev, nowayout);
441 watchdog_stop_on_reboot(&wdt_dev);
443 ret = w83627hf_init(&wdt_dev, chip);
445 pr_err("failed to initialize watchdog (err=%d)\n", ret);
449 ret = watchdog_register_device(&wdt_dev);
453 pr_info("initialized. timeout=%d sec (nowayout=%d)\n",
454 wdt_dev.timeout, nowayout);
459 static void __exit wdt_exit(void)
461 watchdog_unregister_device(&wdt_dev);
464 module_init(wdt_init);
465 module_exit(wdt_exit);
467 MODULE_LICENSE("GPL");
468 MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
469 MODULE_DESCRIPTION("w83627hf/thf WDT driver");