2 * PCI Backend - Handles the virtual fields in the configuration space headers.
4 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
7 #include <linux/kernel.h>
10 #include "conf_space.h"
18 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
19 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
21 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
25 if (!pci_is_enabled(dev) && is_enable_cmd(value)) {
26 if (unlikely(verbose_request))
27 printk(KERN_DEBUG "pciback: %s: enable\n",
29 err = pci_enable_device(dev);
32 } else if (pci_is_enabled(dev) && !is_enable_cmd(value)) {
33 if (unlikely(verbose_request))
34 printk(KERN_DEBUG "pciback: %s: disable\n",
36 pci_disable_device(dev);
39 if (!dev->is_busmaster && is_master_cmd(value)) {
40 if (unlikely(verbose_request))
41 printk(KERN_DEBUG "pciback: %s: set bus master\n",
46 if (value & PCI_COMMAND_INVALIDATE) {
47 if (unlikely(verbose_request))
49 "pciback: %s: enable memory-write-invalidate\n",
51 err = pci_set_mwi(dev);
54 "pciback: %s: cannot enable "
55 "memory-write-invalidate (%d)\n",
57 value &= ~PCI_COMMAND_INVALIDATE;
61 return pci_write_config_word(dev, offset, value);
64 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data)
66 struct pci_bar_info *bar = data;
69 printk(KERN_WARNING "pciback: driver data not found for %s\n",
71 return XEN_PCI_ERR_op_failed;
74 /* A write to obtain the length must happen as a 32-bit write.
75 * This does not (yet) support writing individual bytes
77 if (value == ~PCI_ROM_ADDRESS_ENABLE)
81 pci_read_config_dword(dev, offset, &tmpval);
82 if (tmpval != bar->val && value == bar->val) {
83 /* Allow restoration of bar value. */
84 pci_write_config_dword(dev, offset, bar->val);
89 /* Do we need to support enabling/disabling the rom address here? */
94 /* For the BARs, only allow writes which write ~0 or
95 * the correct resource information
96 * (Needed for when the driver probes the resource usage)
98 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data)
100 struct pci_bar_info *bar = data;
102 if (unlikely(!bar)) {
103 printk(KERN_WARNING "pciback: driver data not found for %s\n",
105 return XEN_PCI_ERR_op_failed;
108 /* A write to obtain the length must happen as a 32-bit write.
109 * This does not (yet) support writing individual bytes
115 pci_read_config_dword(dev, offset, &tmpval);
116 if (tmpval != bar->val && value == bar->val) {
117 /* Allow restoration of bar value. */
118 pci_write_config_dword(dev, offset, bar->val);
126 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data)
128 struct pci_bar_info *bar = data;
130 if (unlikely(!bar)) {
131 printk(KERN_WARNING "pciback: driver data not found for %s\n",
133 return XEN_PCI_ERR_op_failed;
136 *value = bar->which ? bar->len_val : bar->val;
141 static inline void read_dev_bar(struct pci_dev *dev,
142 struct pci_bar_info *bar_info, int offset,
145 pci_read_config_dword(dev, offset, &bar_info->val);
146 pci_write_config_dword(dev, offset, len_mask);
147 pci_read_config_dword(dev, offset, &bar_info->len_val);
148 pci_write_config_dword(dev, offset, bar_info->val);
151 static void *bar_init(struct pci_dev *dev, int offset)
153 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
156 return ERR_PTR(-ENOMEM);
158 read_dev_bar(dev, bar, offset, ~0);
164 static void *rom_init(struct pci_dev *dev, int offset)
166 struct pci_bar_info *bar = kmalloc(sizeof(*bar), GFP_KERNEL);
169 return ERR_PTR(-ENOMEM);
171 read_dev_bar(dev, bar, offset, ~PCI_ROM_ADDRESS_ENABLE);
177 static void bar_reset(struct pci_dev *dev, int offset, void *data)
179 struct pci_bar_info *bar = data;
184 static void bar_release(struct pci_dev *dev, int offset, void *data)
189 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value,
192 *value = (u8) dev->irq;
197 static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data)
202 err = pci_read_config_byte(dev, offset, &cur_value);
206 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START)
207 || value == PCI_BIST_START)
208 err = pci_write_config_byte(dev, offset, value);
214 static const struct config_field header_common[] = {
216 .offset = PCI_COMMAND,
218 .u.w.read = pciback_read_config_word,
219 .u.w.write = command_write,
222 .offset = PCI_INTERRUPT_LINE,
224 .u.b.read = interrupt_read,
227 .offset = PCI_INTERRUPT_PIN,
229 .u.b.read = pciback_read_config_byte,
232 /* Any side effects of letting driver domain control cache line? */
233 .offset = PCI_CACHE_LINE_SIZE,
235 .u.b.read = pciback_read_config_byte,
236 .u.b.write = pciback_write_config_byte,
239 .offset = PCI_LATENCY_TIMER,
241 .u.b.read = pciback_read_config_byte,
246 .u.b.read = pciback_read_config_byte,
247 .u.b.write = bist_write,
252 #define CFG_FIELD_BAR(reg_offset) \
254 .offset = reg_offset, \
257 .reset = bar_reset, \
258 .release = bar_release, \
259 .u.dw.read = bar_read, \
260 .u.dw.write = bar_write, \
263 #define CFG_FIELD_ROM(reg_offset) \
265 .offset = reg_offset, \
268 .reset = bar_reset, \
269 .release = bar_release, \
270 .u.dw.read = bar_read, \
271 .u.dw.write = rom_write, \
274 static const struct config_field header_0[] = {
275 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
276 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
277 CFG_FIELD_BAR(PCI_BASE_ADDRESS_2),
278 CFG_FIELD_BAR(PCI_BASE_ADDRESS_3),
279 CFG_FIELD_BAR(PCI_BASE_ADDRESS_4),
280 CFG_FIELD_BAR(PCI_BASE_ADDRESS_5),
281 CFG_FIELD_ROM(PCI_ROM_ADDRESS),
285 static const struct config_field header_1[] = {
286 CFG_FIELD_BAR(PCI_BASE_ADDRESS_0),
287 CFG_FIELD_BAR(PCI_BASE_ADDRESS_1),
288 CFG_FIELD_ROM(PCI_ROM_ADDRESS1),
292 int pciback_config_header_add_fields(struct pci_dev *dev)
296 err = pciback_config_add_fields(dev, header_common);
300 switch (dev->hdr_type) {
301 case PCI_HEADER_TYPE_NORMAL:
302 err = pciback_config_add_fields(dev, header_0);
305 case PCI_HEADER_TYPE_BRIDGE:
306 err = pciback_config_add_fields(dev, header_1);
311 printk(KERN_ERR "pciback: %s: Unsupported header type %d!\n",
312 pci_name(dev), dev->hdr_type);