1 /* This is the single file included by all MPC8xx build options.
2 * Since there are many different boards and no standard configuration,
3 * we have a unique include file for each. Rather than change every
4 * file that has to include MPC8xx configuration, they all include
5 * this one and the configuration switching is done here.
8 #ifndef __CONFIG_8xx_DEFS
9 #define __CONFIG_8xx_DEFS
11 #include <linux/config.h>
16 #include <platforms/mbx.h>
20 #include <platforms/fads.h>
24 #include <platforms/rpxlite.h>
28 #include <platforms/bseip.h>
31 #ifdef CONFIG_RPXCLASSIC
32 #include <platforms/rpxclassic.h>
35 #if defined(CONFIG_TQM8xxL)
36 #include <platforms/tqm8xx.h>
39 #if defined(CONFIG_SPD823TS)
40 #include <platforms/spd8xx.h>
43 #if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
44 #include <platforms/ivms8.h>
47 #if defined(CONFIG_HERMES_PRO)
48 #include <platforms/hermes.h>
51 #if defined(CONFIG_IP860)
52 #include <platforms/ip860.h>
55 #if defined(CONFIG_LWMON)
56 #include <platforms/lwmon.h>
59 #if defined(CONFIG_PCU_E)
60 #include <platforms/pcu_e.h>
63 #if defined(CONFIG_CCM)
64 #include <platforms/ccm.h>
67 #if defined(CONFIG_LANTEC)
68 #include <platforms/lantec.h>
71 /* Currently, all 8xx boards that support a processor to PCI/ISA bridge
72 * use the same memory map.
75 #if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR)
76 #define _IO_BASE PCI_ISA_IO_ADDR
77 #define _ISA_MEM_BASE PCI_ISA_MEM_ADDR
78 #define PCI_DRAM_OFFSET 0x80000000
81 #define _ISA_MEM_BASE 0
82 #define PCI_DRAM_OFFSET 0
85 #if !defined(_IO_BASE) /* defined in board specific header */
88 #define _ISA_MEM_BASE 0
89 #define PCI_DRAM_OFFSET 0
93 /* The "residual" data board information structure the boot loader
96 extern unsigned char __res[];
100 #endif /* !__ASSEMBLY__ */
101 #endif /* CONFIG_8xx */
102 #endif /* __CONFIG_8xx_DEFS */
103 #endif /* __KERNEL__ */