2 * include/asm-s390/pgtable.h
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
10 * Derived from "include/asm-i386/pgtable.h"
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
16 #include <asm-generic/4level-fixup.h>
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
34 #include <linux/mm_types.h>
36 #include <asm/processor.h>
38 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
41 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42 extern void paging_init(void);
43 extern void vmem_map_init(void);
46 * The S390 doesn't have any external MMU info: the kernel page
47 * tables contain all the necessary information.
49 #define update_mmu_cache(vma, address, pte) do { } while (0)
52 * ZERO_PAGE is a global shared page that is always zero: used
53 * for zero-mapped memory areas etc..
55 extern char empty_zero_page[PAGE_SIZE];
56 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
57 #endif /* !__ASSEMBLY__ */
60 * PMD_SHIFT determines the size of the area a second-level page
62 * PGDIR_SHIFT determines what a third-level page table entry can map
66 # define PGDIR_SHIFT 22
69 # define PGDIR_SHIFT 31
70 #endif /* __s390x__ */
72 #define PMD_SIZE (1UL << PMD_SHIFT)
73 #define PMD_MASK (~(PMD_SIZE-1))
74 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
75 #define PGDIR_MASK (~(PGDIR_SIZE-1))
78 * entries per page directory level: the S390 is two-level, so
79 * we don't really have any PMD directory physically.
80 * for S390 segment-table entries are combined to one PGD
81 * that leads to 1024 pte per pgd
84 # define PTRS_PER_PTE 1024
85 # define PTRS_PER_PMD 1
86 # define PTRS_PER_PGD 512
88 # define PTRS_PER_PTE 512
89 # define PTRS_PER_PMD 1024
90 # define PTRS_PER_PGD 2048
91 #endif /* __s390x__ */
93 #define FIRST_USER_ADDRESS 0
95 #define pte_ERROR(e) \
96 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
97 #define pmd_ERROR(e) \
98 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
99 #define pgd_ERROR(e) \
100 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
104 * Just any arbitrary offset to the start of the vmalloc VM area: the
105 * current 8MB value just means that there will be a 8MB "hole" after the
106 * physical memory until the kernel virtual memory starts. That means that
107 * any out-of-bounds memory accesses will hopefully be caught.
108 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
109 * area for the same reason. ;)
110 * vmalloc area starts at 4GB to prevent syscall table entry exchanging
113 extern unsigned long vmalloc_end;
116 #define VMALLOC_ADDR (max(0x100000000UL, (unsigned long) high_memory))
118 #define VMALLOC_ADDR ((unsigned long) high_memory)
120 #define VMALLOC_OFFSET (8*1024*1024)
121 #define VMALLOC_START ((VMALLOC_ADDR + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
122 #define VMALLOC_END vmalloc_end
125 * We need some free virtual space to be able to do vmalloc.
126 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
127 * area. On a machine with 2GB memory we make sure that we
128 * have at least 128MB free space for vmalloc. On a machine
129 * with 4TB we make sure we have at least 128GB.
132 #define VMALLOC_MIN_SIZE 0x8000000UL
133 #define VMALLOC_END_INIT 0x80000000UL
134 #else /* __s390x__ */
135 #define VMALLOC_MIN_SIZE 0x2000000000UL
136 #define VMALLOC_END_INIT 0x40000000000UL
137 #endif /* __s390x__ */
140 * A 31 bit pagetable entry of S390 has following format:
143 * 00000000001111111111222222222233
144 * 01234567890123456789012345678901
146 * I Page-Invalid Bit: Page is not available for address-translation
147 * P Page-Protection Bit: Store access not possible for page
149 * A 31 bit segmenttable entry of S390 has following format:
150 * | P-table origin | |PTL
152 * 00000000001111111111222222222233
153 * 01234567890123456789012345678901
155 * I Segment-Invalid Bit: Segment is not available for address-translation
156 * C Common-Segment Bit: Segment is not private (PoP 3-30)
157 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
159 * The 31 bit segmenttable origin of S390 has following format:
161 * |S-table origin | | STL |
163 * 00000000001111111111222222222233
164 * 01234567890123456789012345678901
166 * X Space-Switch event:
167 * G Segment-Invalid Bit: *
168 * P Private-Space Bit: Segment is not private (PoP 3-30)
169 * S Storage-Alteration:
170 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
172 * A 64 bit pagetable entry of S390 has following format:
174 * 0000000000111111111122222222223333333333444444444455555555556666
175 * 0123456789012345678901234567890123456789012345678901234567890123
177 * I Page-Invalid Bit: Page is not available for address-translation
178 * P Page-Protection Bit: Store access not possible for page
180 * A 64 bit segmenttable entry of S390 has following format:
181 * | P-table origin | TT
182 * 0000000000111111111122222222223333333333444444444455555555556666
183 * 0123456789012345678901234567890123456789012345678901234567890123
185 * I Segment-Invalid Bit: Segment is not available for address-translation
186 * C Common-Segment Bit: Segment is not private (PoP 3-30)
187 * P Page-Protection Bit: Store access not possible for page
190 * A 64 bit region table entry of S390 has following format:
191 * | S-table origin | TF TTTL
192 * 0000000000111111111122222222223333333333444444444455555555556666
193 * 0123456789012345678901234567890123456789012345678901234567890123
195 * I Segment-Invalid Bit: Segment is not available for address-translation
200 * The 64 bit regiontable origin of S390 has following format:
201 * | region table origon | DTTL
202 * 0000000000111111111122222222223333333333444444444455555555556666
203 * 0123456789012345678901234567890123456789012345678901234567890123
205 * X Space-Switch event:
206 * G Segment-Invalid Bit:
207 * P Private-Space Bit:
208 * S Storage-Alteration:
212 * A storage key has the following format:
216 * F : fetch protection bit
221 /* Hardware bits in the page table entry */
222 #define _PAGE_RO 0x200 /* HW read-only bit */
223 #define _PAGE_INVALID 0x400 /* HW invalid bit */
224 #define _PAGE_SWT 0x001 /* SW pte type bit t */
225 #define _PAGE_SWX 0x002 /* SW pte type bit x */
227 /* Six different types of pages. */
228 #define _PAGE_TYPE_EMPTY 0x400
229 #define _PAGE_TYPE_NONE 0x401
230 #define _PAGE_TYPE_SWAP 0x403
231 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
232 #define _PAGE_TYPE_RO 0x200
233 #define _PAGE_TYPE_RW 0x000
234 #define _PAGE_TYPE_EX_RO 0x202
235 #define _PAGE_TYPE_EX_RW 0x002
238 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
239 * pte_none and pte_file to find out the pte type WITHOUT holding the page
240 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
241 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
242 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
243 * This change is done while holding the lock, but the intermediate step
244 * of a previously valid pte with the hw invalid bit set can be observed by
245 * handle_pte_fault. That makes it necessary that all valid pte types with
246 * the hw invalid bit set must be distinguishable from the four pte types
247 * empty, none, swap and file.
250 * _PAGE_TYPE_EMPTY 1000 -> 1000
251 * _PAGE_TYPE_NONE 1001 -> 1001
252 * _PAGE_TYPE_SWAP 1011 -> 1011
253 * _PAGE_TYPE_FILE 11?1 -> 11?1
254 * _PAGE_TYPE_RO 0100 -> 1100
255 * _PAGE_TYPE_RW 0000 -> 1000
256 * _PAGE_TYPE_EX_RO 0110 -> 1110
257 * _PAGE_TYPE_EX_RW 0010 -> 1010
259 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
260 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
261 * pte_file is true for bits combinations 1101, 1111
262 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
267 /* Bits in the segment table entry */
268 #define _PAGE_TABLE_LEN 0xf /* only full page-tables */
269 #define _PAGE_TABLE_COM 0x10 /* common page-table */
270 #define _PAGE_TABLE_INV 0x20 /* invalid page-table */
271 #define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
273 /* Bits int the storage key */
274 #define _PAGE_CHANGED 0x02 /* HW changed bit */
275 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
277 #define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
278 #define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
281 * User and Kernel pagetables are identical
283 #define _PAGE_TABLE _PAGE_TABLE_LEN
284 #define _KERNPG_TABLE _PAGE_TABLE_LEN
287 * The Kernel segment-tables includes the User segment-table
290 #define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
291 #define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
293 #define USER_STD_MASK 0x00000080UL
295 #else /* __s390x__ */
297 /* Bits in the segment table entry */
298 #define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
299 #define _PMD_ENTRY 0x00
301 /* Bits in the region third table entry */
302 #define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
303 #define _PGD_ENTRY 0x07
306 * User and kernel page directory
308 #define _REGION_THIRD 0x4
309 #define _REGION_THIRD_LEN 0x3
310 #define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
311 #define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
313 #define USER_STD_MASK 0x0000000000000080UL
315 /* Bits in the storage key */
316 #define _PAGE_CHANGED 0x02 /* HW changed bit */
317 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
319 #endif /* __s390x__ */
322 * Page protection definitions.
324 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
325 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
326 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
327 #define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO)
328 #define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW)
330 #define PAGE_KERNEL PAGE_RW
331 #define PAGE_COPY PAGE_RO
334 * Dependent on the EXEC_PROTECT option s390 can do execute protection.
335 * Write permission always implies read permission. In theory with a
336 * primary/secondary page table execute only can be implemented but
337 * it would cost an additional bit in the pte to distinguish all the
338 * different pte types. To avoid that execute permission currently
339 * implies read permission as well.
342 #define __P000 PAGE_NONE
343 #define __P001 PAGE_RO
344 #define __P010 PAGE_RO
345 #define __P011 PAGE_RO
346 #define __P100 PAGE_EX_RO
347 #define __P101 PAGE_EX_RO
348 #define __P110 PAGE_EX_RO
349 #define __P111 PAGE_EX_RO
351 #define __S000 PAGE_NONE
352 #define __S001 PAGE_RO
353 #define __S010 PAGE_RW
354 #define __S011 PAGE_RW
355 #define __S100 PAGE_EX_RO
356 #define __S101 PAGE_EX_RO
357 #define __S110 PAGE_EX_RW
358 #define __S111 PAGE_EX_RW
361 # define PMD_SHADOW_SHIFT 1
362 # define PGD_SHADOW_SHIFT 1
363 #else /* __s390x__ */
364 # define PMD_SHADOW_SHIFT 2
365 # define PGD_SHADOW_SHIFT 2
366 #endif /* __s390x__ */
368 static inline struct page *get_shadow_page(struct page *page)
370 if (s390_noexec && !list_empty(&page->lru))
371 return virt_to_page(page->lru.next);
375 static inline pte_t *get_shadow_pte(pte_t *ptep)
377 unsigned long pteptr = (unsigned long) (ptep);
380 unsigned long offset = pteptr & (PAGE_SIZE - 1);
381 void *addr = (void *) (pteptr ^ offset);
382 struct page *page = virt_to_page(addr);
383 if (!list_empty(&page->lru))
384 return (pte_t *) ((unsigned long) page->lru.next |
390 static inline pmd_t *get_shadow_pmd(pmd_t *pmdp)
392 unsigned long pmdptr = (unsigned long) (pmdp);
395 unsigned long offset = pmdptr &
396 ((PAGE_SIZE << PMD_SHADOW_SHIFT) - 1);
397 void *addr = (void *) (pmdptr ^ offset);
398 struct page *page = virt_to_page(addr);
399 if (!list_empty(&page->lru))
400 return (pmd_t *) ((unsigned long) page->lru.next |
406 static inline pgd_t *get_shadow_pgd(pgd_t *pgdp)
408 unsigned long pgdptr = (unsigned long) (pgdp);
411 unsigned long offset = pgdptr &
412 ((PAGE_SIZE << PGD_SHADOW_SHIFT) - 1);
413 void *addr = (void *) (pgdptr ^ offset);
414 struct page *page = virt_to_page(addr);
415 if (!list_empty(&page->lru))
416 return (pgd_t *) ((unsigned long) page->lru.next |
423 * Certain architectures need to do special things when PTEs
424 * within a page table are directly modified. Thus, the following
425 * hook is made available.
427 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
428 pte_t *pteptr, pte_t pteval)
430 pte_t *shadow_pte = get_shadow_pte(pteptr);
434 if (!(pte_val(pteval) & _PAGE_INVALID) &&
435 (pte_val(pteval) & _PAGE_SWX))
436 pte_val(*shadow_pte) = pte_val(pteval) | _PAGE_RO;
438 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
443 * pgd/pmd/pte query functions
447 static inline int pgd_present(pgd_t pgd) { return 1; }
448 static inline int pgd_none(pgd_t pgd) { return 0; }
449 static inline int pgd_bad(pgd_t pgd) { return 0; }
451 static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
452 static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
453 static inline int pmd_bad(pmd_t pmd)
455 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
458 #else /* __s390x__ */
460 static inline int pgd_present(pgd_t pgd)
462 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
465 static inline int pgd_none(pgd_t pgd)
467 return pgd_val(pgd) & _PGD_ENTRY_INV;
470 static inline int pgd_bad(pgd_t pgd)
472 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
475 static inline int pmd_present(pmd_t pmd)
477 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
480 static inline int pmd_none(pmd_t pmd)
482 return pmd_val(pmd) & _PMD_ENTRY_INV;
485 static inline int pmd_bad(pmd_t pmd)
487 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
490 #endif /* __s390x__ */
492 static inline int pte_none(pte_t pte)
494 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
497 static inline int pte_present(pte_t pte)
499 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
500 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
501 (!(pte_val(pte) & _PAGE_INVALID) &&
502 !(pte_val(pte) & _PAGE_SWT));
505 static inline int pte_file(pte_t pte)
507 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
508 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
511 #define __HAVE_ARCH_PTE_SAME
512 #define pte_same(a,b) (pte_val(a) == pte_val(b))
515 * query functions pte_write/pte_dirty/pte_young only work if
516 * pte_present() is true. Undefined behaviour if not..
518 static inline int pte_write(pte_t pte)
520 return (pte_val(pte) & _PAGE_RO) == 0;
523 static inline int pte_dirty(pte_t pte)
525 /* A pte is neither clean nor dirty on s/390. The dirty bit
526 * is in the storage key. See page_test_and_clear_dirty for
532 static inline int pte_young(pte_t pte)
534 /* A pte is neither young nor old on s/390. The young bit
535 * is in the storage key. See page_test_and_clear_young for
542 * pgd/pmd/pte modification functions
547 static inline void pgd_clear(pgd_t * pgdp) { }
549 static inline void pmd_clear_kernel(pmd_t * pmdp)
551 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
552 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
553 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
554 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
557 static inline void pmd_clear(pmd_t * pmdp)
559 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
561 pmd_clear_kernel(pmdp);
563 pmd_clear_kernel(shadow_pmd);
566 #else /* __s390x__ */
568 static inline void pgd_clear_kernel(pgd_t * pgdp)
570 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
573 static inline void pgd_clear(pgd_t * pgdp)
575 pgd_t *shadow_pgd = get_shadow_pgd(pgdp);
577 pgd_clear_kernel(pgdp);
579 pgd_clear_kernel(shadow_pgd);
582 static inline void pmd_clear_kernel(pmd_t * pmdp)
584 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
585 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
588 static inline void pmd_clear(pmd_t * pmdp)
590 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
592 pmd_clear_kernel(pmdp);
594 pmd_clear_kernel(shadow_pmd);
597 #endif /* __s390x__ */
599 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
601 pte_t *shadow_pte = get_shadow_pte(ptep);
603 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
605 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
609 * The following pte modification functions only work if
610 * pte_present() is true. Undefined behaviour if not..
612 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
614 pte_val(pte) &= PAGE_MASK;
615 pte_val(pte) |= pgprot_val(newprot);
619 static inline pte_t pte_wrprotect(pte_t pte)
621 /* Do not clobber _PAGE_TYPE_NONE pages! */
622 if (!(pte_val(pte) & _PAGE_INVALID))
623 pte_val(pte) |= _PAGE_RO;
627 static inline pte_t pte_mkwrite(pte_t pte)
629 pte_val(pte) &= ~_PAGE_RO;
633 static inline pte_t pte_mkclean(pte_t pte)
635 /* The only user of pte_mkclean is the fork() code.
636 We must *not* clear the *physical* page dirty bit
637 just because fork() wants to clear the dirty bit in
638 *one* of the page's mappings. So we just do nothing. */
642 static inline pte_t pte_mkdirty(pte_t pte)
644 /* We do not explicitly set the dirty bit because the
645 * sske instruction is slow. It is faster to let the
646 * next instruction set the dirty bit.
651 static inline pte_t pte_mkold(pte_t pte)
653 /* S/390 doesn't keep its dirty/referenced bit in the pte.
654 * There is no point in clearing the real referenced bit.
659 static inline pte_t pte_mkyoung(pte_t pte)
661 /* S/390 doesn't keep its dirty/referenced bit in the pte.
662 * There is no point in setting the real referenced bit.
667 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
668 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
669 unsigned long addr, pte_t *ptep)
674 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
675 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
676 unsigned long address, pte_t *ptep)
678 /* No need to flush TLB; bits are in storage key */
682 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
684 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
686 /* S390 has 1mb segments, we are emulating 4MB segments */
687 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
689 /* ipte in zarch mode can do the math */
694 : "=m" (*ptep) : "m" (*ptep),
695 "a" (pto), "a" (address));
697 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
700 static inline void ptep_invalidate(unsigned long address, pte_t *ptep)
702 __ptep_ipte(address, ptep);
703 ptep = get_shadow_pte(ptep);
705 __ptep_ipte(address, ptep);
709 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
710 * both clear the TLB for the unmapped pte. The reason is that
711 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
712 * to modify an active pte. The sequence is
713 * 1) ptep_get_and_clear
716 * On s390 the tlb needs to get flushed with the modification of the pte
717 * if the pte is active. The only way how this can be implemented is to
718 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
721 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
722 #define ptep_get_and_clear(__mm, __address, __ptep) \
724 pte_t __pte = *(__ptep); \
725 if (atomic_read(&(__mm)->mm_users) > 1 || \
726 (__mm) != current->active_mm) \
727 ptep_invalidate(__address, __ptep); \
729 pte_clear((__mm), (__address), (__ptep)); \
733 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
734 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
735 unsigned long address, pte_t *ptep)
738 ptep_invalidate(address, ptep);
743 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
744 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
745 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
746 * cannot be accessed while the batched unmap is running. In this case
747 * full==1 and a simple pte_clear is enough. See tlb.h.
749 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
750 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
752 pte_t *ptep, int full)
757 pte_clear(mm, addr, ptep);
759 ptep_invalidate(addr, ptep);
763 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
764 #define ptep_set_wrprotect(__mm, __addr, __ptep) \
766 pte_t __pte = *(__ptep); \
767 if (pte_write(__pte)) { \
768 if (atomic_read(&(__mm)->mm_users) > 1 || \
769 (__mm) != current->active_mm) \
770 ptep_invalidate(__addr, __ptep); \
771 set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \
775 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
776 #define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
778 int __changed = !pte_same(*(__ptep), __entry); \
780 ptep_invalidate(__addr, __ptep); \
781 set_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \
787 * Test and clear dirty bit in storage key.
788 * We can't clear the changed bit atomically. This is a potential
789 * race against modification of the referenced bit. This function
790 * should therefore only be called if it is not mapped in any
793 #define __HAVE_ARCH_PAGE_TEST_DIRTY
794 static inline int page_test_dirty(struct page *page)
796 return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0;
799 #define __HAVE_ARCH_PAGE_CLEAR_DIRTY
800 static inline void page_clear_dirty(struct page *page)
802 page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY);
806 * Test and clear referenced bit in storage key.
808 #define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
809 static inline int page_test_and_clear_young(struct page *page)
811 unsigned long physpage = page_to_phys(page);
818 : "=d" (ccode) : "a" (physpage) : "cc" );
823 * Conversion functions: convert a page and protection to a page entry,
824 * and a page entry and page directory to the page they refer to.
826 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
829 pte_val(__pte) = physpage + pgprot_val(pgprot);
833 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
835 unsigned long physpage = page_to_phys(page);
837 return mk_pte_phys(physpage, pgprot);
840 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
842 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
844 return mk_pte_phys(physpage, pgprot);
849 static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
851 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
853 return __pmd(physpage + pgprot_val(pgprot));
856 #endif /* __s390x__ */
858 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
859 #define pte_page(x) pfn_to_page(pte_pfn(x))
861 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
863 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
865 #define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
867 #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
869 /* to find an entry in a page-table-directory */
870 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
871 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
873 /* to find an entry in a kernel page-table-directory */
874 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
878 /* Find an entry in the second-level page table.. */
879 static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
881 return (pmd_t *) dir;
884 #else /* __s390x__ */
886 /* Find an entry in the second-level page table.. */
887 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
888 #define pmd_offset(dir,addr) \
889 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
891 #endif /* __s390x__ */
893 /* Find an entry in the third-level page table.. */
894 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
895 #define pte_offset_kernel(pmd, address) \
896 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
897 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
898 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
899 #define pte_unmap(pte) do { } while (0)
900 #define pte_unmap_nested(pte) do { } while (0)
903 * 31 bit swap entry format:
904 * A page-table entry has some bits we have to treat in a special way.
905 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
906 * exception will occur instead of a page translation exception. The
907 * specifiation exception has the bad habit not to store necessary
908 * information in the lowcore.
909 * Bit 21 and bit 22 are the page invalid bit and the page protection
910 * bit. We set both to indicate a swapped page.
911 * Bit 30 and 31 are used to distinguish the different page types. For
912 * a swapped page these bits need to be zero.
913 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
914 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
915 * plus 24 for the offset.
916 * 0| offset |0110|o|type |00|
917 * 0 0000000001111111111 2222 2 22222 33
918 * 0 1234567890123456789 0123 4 56789 01
920 * 64 bit swap entry format:
921 * A page-table entry has some bits we have to treat in a special way.
922 * Bits 52 and bit 55 have to be zero, otherwise an specification
923 * exception will occur instead of a page translation exception. The
924 * specifiation exception has the bad habit not to store necessary
925 * information in the lowcore.
926 * Bit 53 and bit 54 are the page invalid bit and the page protection
927 * bit. We set both to indicate a swapped page.
928 * Bit 62 and 63 are used to distinguish the different page types. For
929 * a swapped page these bits need to be zero.
930 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
931 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
932 * plus 56 for the offset.
933 * | offset |0110|o|type |00|
934 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
935 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
938 #define __SWP_OFFSET_MASK (~0UL >> 12)
940 #define __SWP_OFFSET_MASK (~0UL >> 11)
942 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
945 offset &= __SWP_OFFSET_MASK;
946 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
947 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
951 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
952 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
953 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
955 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
956 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
959 # define PTE_FILE_MAX_BITS 26
960 #else /* __s390x__ */
961 # define PTE_FILE_MAX_BITS 59
962 #endif /* __s390x__ */
964 #define pte_to_pgoff(__pte) \
965 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
967 #define pgoff_to_pte(__off) \
968 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
971 #endif /* !__ASSEMBLY__ */
973 #define kern_addr_valid(addr) (1)
975 extern int add_shared_memory(unsigned long start, unsigned long size);
976 extern int remove_shared_memory(unsigned long start, unsigned long size);
979 * No page table caches to initialise
981 #define pgtable_cache_init() do { } while (0)
983 #define __HAVE_ARCH_MEMMAP_INIT
984 extern void memmap_init(unsigned long, int, unsigned long, unsigned long);
986 #include <asm-generic/pgtable.h>
988 #endif /* _S390_PAGE_H */