2 * include/asm-s390/system.h
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Derived from "include/asm-i386/system.h"
11 #ifndef __ASM_SYSTEM_H
12 #define __ASM_SYSTEM_H
14 #include <linux/kernel.h>
15 #include <asm/types.h>
16 #include <asm/ptrace.h>
17 #include <asm/setup.h>
18 #include <asm/processor.h>
24 extern struct task_struct *__switch_to(void *, void *);
27 #define __FLAG_SHIFT 56
28 #else /* ! __s390x__ */
29 #define __FLAG_SHIFT 24
30 #endif /* ! __s390x__ */
32 static inline void save_fp_regs(s390_fp_regs *fpregs)
39 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory" );
40 if (!MACHINE_HAS_IEEE)
56 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory" );
59 static inline void restore_fp_regs(s390_fp_regs *fpregs)
66 : : "a" (fpregs), "m" (*fpregs) );
67 if (!MACHINE_HAS_IEEE)
83 : : "a" (fpregs), "m" (*fpregs) );
86 static inline void save_access_regs(unsigned int *acrs)
88 asm volatile ("stam 0,15,0(%0)" : : "a" (acrs) : "memory" );
91 static inline void restore_access_regs(unsigned int *acrs)
93 asm volatile ("lam 0,15,0(%0)" : : "a" (acrs) );
96 #define switch_to(prev,next,last) do { \
99 save_fp_regs(&prev->thread.fp_regs); \
100 restore_fp_regs(&next->thread.fp_regs); \
101 save_access_regs(&prev->thread.acrs[0]); \
102 restore_access_regs(&next->thread.acrs[0]); \
103 prev = __switch_to(prev,next); \
107 * On SMP systems, when the scheduler does migration-cost autodetection,
108 * it needs a way to flush as much of the CPU's caches as possible.
110 * TODO: fill this in!
112 static inline void sched_cacheflush(void)
116 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
117 extern void account_vtime(struct task_struct *);
118 extern void account_tick_vtime(struct task_struct *);
119 extern void account_system_vtime(struct task_struct *);
121 #define account_vtime(x) do { /* empty */ } while (0)
124 #define finish_arch_switch(prev) do { \
125 set_fs(current->thread.mm_segment); \
126 account_vtime(prev); \
129 #define nop() __asm__ __volatile__ ("nop")
131 #define xchg(ptr,x) \
133 __typeof__(*(ptr)) __ret; \
134 __ret = (__typeof__(*(ptr))) \
135 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
139 static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
141 unsigned long addr, old;
146 addr = (unsigned long) ptr;
147 shift = (3 ^ (addr & 3)) << 3;
156 : "=&d" (old), "=m" (*(int *) addr)
157 : "d" (x << shift), "d" (~(255 << shift)), "a" (addr),
158 "m" (*(int *) addr) : "memory", "cc", "0" );
162 addr = (unsigned long) ptr;
163 shift = (2 ^ (addr & 2)) << 3;
172 : "=&d" (old), "=m" (*(int *) addr)
173 : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr),
174 "m" (*(int *) addr) : "memory", "cc", "0" );
180 "0: cs %0,%2,0(%3)\n"
182 : "=&d" (old), "=m" (*(int *) ptr)
183 : "d" (x), "a" (ptr), "m" (*(int *) ptr)
191 "0: csg %0,%2,0(%3)\n"
193 : "=&d" (old), "=m" (*(long *) ptr)
194 : "d" (x), "a" (ptr), "m" (*(long *) ptr)
198 #endif /* __s390x__ */
204 * Atomic compare and exchange. Compare OLD with MEM, if identical,
205 * store NEW in MEM. Return the initial value in MEM. Success is
206 * indicated by comparing RETURN with OLD.
209 #define __HAVE_ARCH_CMPXCHG 1
211 #define cmpxchg(ptr,o,n)\
212 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
213 (unsigned long)(n),sizeof(*(ptr))))
215 static inline unsigned long
216 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
218 unsigned long addr, prev, tmp;
223 addr = (unsigned long) ptr;
224 shift = (3 ^ (addr & 3)) << 3;
238 : "=&d" (prev), "=&d" (tmp)
239 : "d" (old << shift), "d" (new << shift), "a" (ptr),
240 "d" (~(255 << shift))
242 return prev >> shift;
244 addr = (unsigned long) ptr;
245 shift = (2 ^ (addr & 2)) << 3;
259 : "=&d" (prev), "=&d" (tmp)
260 : "d" (old << shift), "d" (new << shift), "a" (ptr),
261 "d" (~(65535 << shift))
263 return prev >> shift;
267 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
274 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
277 #endif /* __s390x__ */
283 * Force strict CPU ordering.
284 * And yes, this is required on UP too when we're talking
287 * This is very similar to the ppc eieio/sync instruction in that is
288 * does a checkpoint syncronisation & makes sure that
289 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
292 #define eieio() __asm__ __volatile__ ( "bcr 15,0" : : : "memory" )
293 # define SYNC_OTHER_CORES(x) eieio()
295 #define rmb() eieio()
296 #define wmb() eieio()
297 #define read_barrier_depends() do { } while(0)
298 #define smp_mb() mb()
299 #define smp_rmb() rmb()
300 #define smp_wmb() wmb()
301 #define smp_read_barrier_depends() read_barrier_depends()
302 #define smp_mb__before_clear_bit() smp_mb()
303 #define smp_mb__after_clear_bit() smp_mb()
306 #define set_mb(var, value) do { var = value; mb(); } while (0)
310 #define __ctl_load(array, low, high) ({ \
311 typedef struct { char _[sizeof(array)]; } addrtype; \
312 __asm__ __volatile__ ( \
314 " lctlg 0,0,0(%0)\n" \
316 : : "a" (&array), "a" (((low)<<4)+(high)), \
317 "m" (*(addrtype *)(array)) : "1" ); \
320 #define __ctl_store(array, low, high) ({ \
321 typedef struct { char _[sizeof(array)]; } addrtype; \
322 __asm__ __volatile__ ( \
324 " stctg 0,0,0(%1)\n" \
326 : "=m" (*(addrtype *)(array)) \
327 : "a" (&array), "a" (((low)<<4)+(high)) : "1" ); \
330 #define __ctl_set_bit(cr, bit) ({ \
332 __asm__ __volatile__ ( \
333 " bras 1,0f\n" /* skip indirect insns */ \
334 " stctg 0,0,0(%1)\n" \
335 " lctlg 0,0,0(%1)\n" \
336 "0: ex %2,0(1)\n" /* execute stctl */ \
338 " ogr 0,%3\n" /* set the bit */ \
340 "1: ex %2,6(1)" /* execute lctl */ \
342 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
343 "a" (cr*17), "a" (1L<<(bit)) \
344 : "cc", "0", "1" ); \
347 #define __ctl_clear_bit(cr, bit) ({ \
349 __asm__ __volatile__ ( \
350 " bras 1,0f\n" /* skip indirect insns */ \
351 " stctg 0,0,0(%1)\n" \
352 " lctlg 0,0,0(%1)\n" \
353 "0: ex %2,0(1)\n" /* execute stctl */ \
355 " ngr 0,%3\n" /* set the bit */ \
357 "1: ex %2,6(1)" /* execute lctl */ \
359 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
360 "a" (cr*17), "a" (~(1L<<(bit))) \
361 : "cc", "0", "1" ); \
364 #else /* __s390x__ */
366 #define __ctl_load(array, low, high) ({ \
367 typedef struct { char _[sizeof(array)]; } addrtype; \
368 __asm__ __volatile__ ( \
370 " lctl 0,0,0(%0)\n" \
372 : : "a" (&array), "a" (((low)<<4)+(high)), \
373 "m" (*(addrtype *)(array)) : "1" ); \
376 #define __ctl_store(array, low, high) ({ \
377 typedef struct { char _[sizeof(array)]; } addrtype; \
378 __asm__ __volatile__ ( \
380 " stctl 0,0,0(%1)\n" \
382 : "=m" (*(addrtype *)(array)) \
383 : "a" (&array), "a" (((low)<<4)+(high)): "1" ); \
386 #define __ctl_set_bit(cr, bit) ({ \
388 __asm__ __volatile__ ( \
389 " bras 1,0f\n" /* skip indirect insns */ \
390 " stctl 0,0,0(%1)\n" \
391 " lctl 0,0,0(%1)\n" \
392 "0: ex %2,0(1)\n" /* execute stctl */ \
394 " or 0,%3\n" /* set the bit */ \
396 "1: ex %2,4(1)" /* execute lctl */ \
398 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
399 "a" (cr*17), "a" (1<<(bit)) \
400 : "cc", "0", "1" ); \
403 #define __ctl_clear_bit(cr, bit) ({ \
405 __asm__ __volatile__ ( \
406 " bras 1,0f\n" /* skip indirect insns */ \
407 " stctl 0,0,0(%1)\n" \
408 " lctl 0,0,0(%1)\n" \
409 "0: ex %2,0(1)\n" /* execute stctl */ \
411 " nr 0,%3\n" /* set the bit */ \
413 "1: ex %2,4(1)" /* execute lctl */ \
415 : "a" ((((unsigned long) &__dummy) + 7) & ~7UL), \
416 "a" (cr*17), "a" (~(1<<(bit))) \
417 : "cc", "0", "1" ); \
419 #endif /* __s390x__ */
421 #include <linux/irqflags.h>
424 * Use to set psw mask except for the first byte which
425 * won't be changed by this function.
428 __set_psw_mask(unsigned long mask)
430 local_save_flags(mask);
431 __load_psw_mask(mask);
434 #define local_mcck_enable() __set_psw_mask(PSW_KERNEL_BITS)
435 #define local_mcck_disable() __set_psw_mask(PSW_KERNEL_BITS & ~PSW_MASK_MCHECK)
439 extern void smp_ctl_set_bit(int cr, int bit);
440 extern void smp_ctl_clear_bit(int cr, int bit);
441 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
442 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
446 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
447 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
449 #endif /* CONFIG_SMP */
451 extern void (*_machine_restart)(char *command);
452 extern void (*_machine_halt)(void);
453 extern void (*_machine_power_off)(void);
455 #define arch_align_stack(x) (x)
457 #endif /* __KERNEL__ */