1 /* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */
2 #ifndef _SPARC64_HEAD_H
3 #define _SPARC64_HEAD_H
5 #include <asm/pstate.h>
7 /* wrpr %g0, val, %gl */
11 #define KERNBASE 0x400000
13 #define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ)
15 #define __CHEETAH_ID 0x003e0014
16 #define __JALAPENO_ID 0x003e0016
17 #define __SERRANO_ID 0x003e0022
19 #define CHEETAH_MANUF 0x003e
20 #define CHEETAH_IMPL 0x0014 /* Ultra-III */
21 #define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */
22 #define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */
23 #define JAGUAR_IMPL 0x0018 /* Ultra-IV */
24 #define PANTHER_IMPL 0x0019 /* Ultra-IV+ */
25 #define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */
27 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
29 sethi %hi(__CHEETAH_ID), %tmp2; \
30 srlx %tmp1, 32, %tmp1; \
31 or %tmp2, %lo(__CHEETAH_ID), %tmp2;\
36 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \
38 sethi %hi(__JALAPENO_ID), %tmp2; \
39 srlx %tmp1, 32, %tmp1; \
40 or %tmp2, %lo(__JALAPENO_ID), %tmp2;\
45 #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \
47 srlx %tmp1, (32 + 16), %tmp2; \
48 cmp %tmp2, CHEETAH_MANUF; \
50 sllx %tmp1, 16, %tmp1; \
51 srlx %tmp1, (32 + 16), %tmp2; \
52 cmp %tmp2, CHEETAH_PLUS_IMPL; \
53 bgeu,pt %xcc, label; \
56 #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \
58 srlx %tmp1, (32 + 16), %tmp2; \
59 cmp %tmp2, CHEETAH_MANUF; \
61 sllx %tmp1, 16, %tmp1; \
62 srlx %tmp1, (32 + 16), %tmp2; \
63 cmp %tmp2, CHEETAH_IMPL; \
64 bgeu,pt %xcc, label; \
67 #endif /* !(_SPARC64_HEAD_H) */