1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
5 #include <linux/delay.h>
6 #include <asm/fixmap.h>
7 #include <asm/apicdef.h>
8 #include <asm/processor.h>
9 #include <asm/system.h>
11 #define ARCH_APICTIMER_STOPS_ON_C3 1
19 #define APIC_VERBOSE 1
23 * Define the default level of output to be very little
24 * This can be turned up by using apic=verbose for more
25 * information and apic=debug for _lots_ of information.
26 * apic_verbosity is defined in apic.c
28 #define apic_printk(v, s, a...) do { \
29 if ((v) <= apic_verbosity) \
34 extern void generic_apic_probe(void);
36 #ifdef CONFIG_X86_LOCAL_APIC
38 extern int apic_verbosity;
39 extern int timer_over_8254;
40 extern int local_apic_timer_c2_ok;
41 extern int local_apic_timer_disabled;
43 extern int apic_runs_main_timer;
44 extern int ioapic_force;
45 extern int disable_apic;
46 extern int disable_apic_timer;
47 extern unsigned boot_cpu_id;
50 * Basic functions accessing APICs.
52 #ifdef CONFIG_PARAVIRT
53 #include <asm/paravirt.h>
54 extern int is_vsmp_box(void);
56 #define apic_write native_apic_write
57 #define apic_write_atomic native_apic_write_atomic
58 #define apic_read native_apic_read
59 #define setup_boot_clock setup_boot_APIC_clock
60 #define setup_secondary_clock setup_secondary_APIC_clock
61 static int inline is_vsmp_box(void)
67 static inline void native_apic_write(unsigned long reg, u32 v)
69 *((volatile u32 *)(APIC_BASE + reg)) = v;
72 static inline void native_apic_write_atomic(unsigned long reg, u32 v)
74 (void) xchg((u32*)(APIC_BASE + reg), v);
77 static inline u32 native_apic_read(unsigned long reg)
79 return *((volatile u32 *)(APIC_BASE + reg));
82 extern void apic_wait_icr_idle(void);
83 extern u32 safe_apic_wait_icr_idle(void);
84 extern int get_physical_broadcast(void);
86 #ifdef CONFIG_X86_GOOD_APIC
87 # define FORCE_READ_AROUND_WRITE 0
88 # define apic_read_around(x)
89 # define apic_write_around(x, y) apic_write((x), (y))
91 # define FORCE_READ_AROUND_WRITE 1
92 # define apic_read_around(x) apic_read(x)
93 # define apic_write_around(x, y) apic_write_atomic((x), (y))
96 static inline void ack_APIC_irq(void)
99 * ack_APIC_irq() actually gets compiled as a single instruction:
100 * - a single rmw on Pentium/82489DX
101 * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
105 /* Docs say use 0 for future compatibility */
106 apic_write_around(APIC_EOI, 0);
109 extern int lapic_get_maxlvt(void);
110 extern void clear_local_APIC(void);
111 extern void connect_bsp_APIC(void);
112 extern void disconnect_bsp_APIC(int virt_wire_setup);
113 extern void disable_local_APIC(void);
114 extern void lapic_shutdown(void);
115 extern int verify_local_APIC(void);
116 extern void cache_APIC_registers(void);
117 extern void sync_Arb_IDs(void);
118 extern void init_bsp_APIC(void);
119 extern void setup_local_APIC(void);
120 extern void end_local_APIC_setup(void);
121 extern void init_apic_mappings(void);
122 extern void setup_boot_APIC_clock(void);
123 extern void setup_secondary_APIC_clock(void);
124 extern int APIC_init_uniprocessor(void);
125 extern void enable_NMI_through_LVT0(void);
128 * On 32bit this is mach-xxx local
131 extern void setup_apic_routing(void);
132 extern void early_init_lapic_mapping(void);
135 extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
136 extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
138 extern int apic_is_clustered_box(void);
140 #else /* !CONFIG_X86_LOCAL_APIC */
141 static inline void lapic_shutdown(void) { }
142 #define local_apic_timer_c2_ok 1
144 #endif /* !CONFIG_X86_LOCAL_APIC */
146 #endif /* __ASM_APIC_H */