2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef ASM_X86__I387_H
11 #define ASM_X86__I387_H
13 #include <linux/sched.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/regset.h>
17 #include <asm/processor.h>
18 #include <asm/sigcontext.h>
20 #include <asm/uaccess.h>
21 #include <asm/xsave.h>
23 extern unsigned int sig_xstate_size;
24 extern void fpu_init(void);
25 extern void mxcsr_feature_mask_init(void);
26 extern int init_fpu(struct task_struct *child);
27 extern asmlinkage void math_state_restore(void);
28 extern void init_thread_xstate(void);
30 extern user_regset_active_fn fpregs_active, xfpregs_active;
31 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
32 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
34 extern struct _fpx_sw_bytes fx_sw_reserved;
35 #ifdef CONFIG_IA32_EMULATION
36 extern unsigned int sig_xstate_ia32_size;
37 extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
40 extern int save_i387_xstate_ia32(void __user *buf);
41 extern int restore_i387_xstate_ia32(void __user *buf);
44 #define X87_FSW_ES (1 << 7) /* Exception Summary */
48 /* Ignore delayed exceptions from user space */
49 static inline void tolerant_fwait(void)
51 asm volatile("1: fwait\n"
53 _ASM_EXTABLE(1b, 2b));
56 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
60 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
62 ".section .fixup,\"ax\"\n"
63 "3: movl $-1,%[err]\n"
68 #if 0 /* See comment in __save_init_fpu() below. */
69 : [fx] "r" (fx), "m" (*fx), "0" (0));
71 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
76 static inline int restore_fpu_checking(struct task_struct *tsk)
78 if (task_thread_info(tsk)->status & TS_XSAVE)
79 return xrstor_checking(&tsk->thread.xstate->xsave);
81 return fxrstor_checking(&tsk->thread.xstate->fxsave);
84 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
85 is pending. Clear the x87 state here by setting it to fixed
86 values. The kernel data segment can be sometimes 0 and sometimes
87 new user value. Both should be ok.
88 Use the PDA as safe address because it should be already in L1. */
89 static inline void clear_fpu_state(struct task_struct *tsk)
91 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
92 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
95 * xsave header may indicate the init state of the FP.
97 if ((task_thread_info(tsk)->status & TS_XSAVE) &&
98 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
101 if (unlikely(fx->swd & X87_FSW_ES))
102 asm volatile("fnclex");
103 alternative_input(ASM_NOP8 ASM_NOP2,
104 " emms\n" /* clear stack tags */
105 " fildl %%gs:0", /* load to clear state */
106 X86_FEATURE_FXSAVE_LEAK);
109 static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
113 asm volatile("1: rex64/fxsave (%[fx])\n\t"
115 ".section .fixup,\"ax\"\n"
116 "3: movl $-1,%[err]\n"
120 : [err] "=r" (err), "=m" (*fx)
121 #if 0 /* See comment in __fxsave_clear() below. */
122 : [fx] "r" (fx), "0" (0));
124 : [fx] "cdaSDb" (fx), "0" (0));
127 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
129 /* No need to clear here because the caller clears USED_MATH */
133 static inline void fxsave(struct task_struct *tsk)
135 /* Using "rex64; fxsave %0" is broken because, if the memory operand
136 uses any extended registers for addressing, a second REX prefix
137 will be generated (to the assembler, rex64 followed by semicolon
138 is a separate instruction), and hence the 64-bitness is lost. */
140 /* Using "fxsaveq %0" would be the ideal choice, but is only supported
141 starting with gas 2.16. */
142 __asm__ __volatile__("fxsaveq %0"
143 : "=m" (tsk->thread.xstate->fxsave));
145 /* Using, as a workaround, the properly prefixed form below isn't
146 accepted by any binutils version so far released, complaining that
147 the same type of prefix is used twice if an extended register is
148 needed for addressing (fix submitted to mainline 2005-11-21). */
149 __asm__ __volatile__("rex64/fxsave %0"
150 : "=m" (tsk->thread.xstate->fxsave));
152 /* This, however, we can work around by forcing the compiler to select
153 an addressing mode that doesn't require extended registers. */
154 __asm__ __volatile__("rex64/fxsave (%1)"
155 : "=m" (tsk->thread.xstate->fxsave)
156 : "cdaSDb" (&tsk->thread.xstate->fxsave));
160 static inline void __save_init_fpu(struct task_struct *tsk)
162 if (task_thread_info(tsk)->status & TS_XSAVE)
167 clear_fpu_state(tsk);
168 task_thread_info(tsk)->status &= ~TS_USEDFPU;
171 #else /* CONFIG_X86_32 */
173 extern void finit(void);
175 static inline void tolerant_fwait(void)
177 asm volatile("fnclex ; fwait");
180 static inline void restore_fpu(struct task_struct *tsk)
182 if (task_thread_info(tsk)->status & TS_XSAVE) {
183 xrstor_checking(&tsk->thread.xstate->xsave);
187 * The "nop" is needed to make the instructions the same
194 "m" (tsk->thread.xstate->fxsave));
197 /* We need a safe address that is cheap to find and that is already
198 in L1 during context switch. The best choices are unfortunately
199 different for UP and SMP */
201 #define safe_address (__per_cpu_offset[0])
203 #define safe_address (kstat_cpu(0).cpustat.user)
207 * These must be called with preempt disabled
209 static inline void __save_init_fpu(struct task_struct *tsk)
211 if (task_thread_info(tsk)->status & TS_XSAVE) {
212 struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
213 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
218 * xsave header may indicate the init state of the FP.
220 if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
223 if (unlikely(fx->swd & X87_FSW_ES))
224 asm volatile("fnclex");
227 * we can do a simple return here or be paranoid :)
232 /* Use more nops than strictly needed in case the compiler
235 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
237 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
239 [fx] "m" (tsk->thread.xstate->fxsave),
240 [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
242 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
243 is pending. Clear the x87 state here by setting it to fixed
244 values. safe_address is a random variable that should be in L1 */
246 GENERIC_NOP8 GENERIC_NOP2,
247 "emms\n\t" /* clear stack tags */
248 "fildl %[addr]", /* set F?P to defined value */
249 X86_FEATURE_FXSAVE_LEAK,
250 [addr] "m" (safe_address));
252 task_thread_info(tsk)->status &= ~TS_USEDFPU;
255 #endif /* CONFIG_X86_64 */
258 * Signal frame handlers...
260 extern int save_i387_xstate(void __user *buf);
261 extern int restore_i387_xstate(void __user *buf);
263 static inline void __unlazy_fpu(struct task_struct *tsk)
265 if (task_thread_info(tsk)->status & TS_USEDFPU) {
266 __save_init_fpu(tsk);
269 tsk->fpu_counter = 0;
272 static inline void __clear_fpu(struct task_struct *tsk)
274 if (task_thread_info(tsk)->status & TS_USEDFPU) {
276 task_thread_info(tsk)->status &= ~TS_USEDFPU;
281 static inline void kernel_fpu_begin(void)
283 struct thread_info *me = current_thread_info();
285 if (me->status & TS_USEDFPU)
286 __save_init_fpu(me->task);
291 static inline void kernel_fpu_end(void)
299 static inline void save_init_fpu(struct task_struct *tsk)
301 __save_init_fpu(tsk);
305 #define unlazy_fpu __unlazy_fpu
306 #define clear_fpu __clear_fpu
308 #else /* CONFIG_X86_32 */
311 * These disable preemption on their own and are safe
313 static inline void save_init_fpu(struct task_struct *tsk)
316 __save_init_fpu(tsk);
321 static inline void unlazy_fpu(struct task_struct *tsk)
328 static inline void clear_fpu(struct task_struct *tsk)
335 #endif /* CONFIG_X86_64 */
338 * i387 state interaction
340 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
343 return tsk->thread.xstate->fxsave.cwd;
345 return (unsigned short)tsk->thread.xstate->fsave.cwd;
349 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
352 return tsk->thread.xstate->fxsave.swd;
354 return (unsigned short)tsk->thread.xstate->fsave.swd;
358 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
361 return tsk->thread.xstate->fxsave.mxcsr;
363 return MXCSR_DEFAULT;
367 #endif /* ASM_X86__I387_H */