1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
120 void (*write_gdt_entry)(struct desc_struct *,
121 int entrynum, const void *desc, int size);
122 void (*write_idt_entry)(gate_desc *,
123 int entrynum, const gate_desc *gate);
124 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
126 void (*set_iopl_mask)(unsigned mask);
128 void (*wbinvd)(void);
129 void (*io_delay)(void);
131 /* cpuid emulation, mostly so that caps bits can be disabled */
132 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
133 unsigned int *ecx, unsigned int *edx);
135 /* MSR, PMC and TSR operations.
136 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
137 u64 (*read_msr)(unsigned int msr, int *err);
138 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
140 u64 (*read_tsc)(void);
141 u64 (*read_pmc)(int counter);
142 unsigned long long (*read_tscp)(unsigned int *aux);
145 * Atomically enable interrupts and return to userspace. This
146 * is only ever used to return to 32-bit processes; in a
147 * 64-bit kernel, it's used for 32-on-64 compat processes, but
148 * never native 64-bit processes. (Jump, not call.)
150 void (*irq_enable_sysexit)(void);
153 * Switch to usermode gs and return to 64-bit usermode using
154 * sysret. Only used in 64-bit kernels to return to 64-bit
155 * processes. Usermode register state, including %rsp, must
156 * already be restored.
158 void (*usergs_sysret64)(void);
161 * Switch to usermode gs and return to 32-bit usermode using
162 * sysret. Used to return to 32-on-64 compat processes.
163 * Other usermode register state, including %esp, must already
166 void (*usergs_sysret32)(void);
168 /* Normal iret. Jump to this with the standard iret stack
172 void (*swapgs)(void);
174 struct pv_lazy_ops lazy_mode;
178 void (*init_IRQ)(void);
181 * Get/set interrupt state. save_fl and restore_fl are only
182 * expected to use X86_EFLAGS_IF; all other bits
183 * returned from save_fl are undefined, and may be ignored by
186 unsigned long (*save_fl)(void);
187 void (*restore_fl)(unsigned long);
188 void (*irq_disable)(void);
189 void (*irq_enable)(void);
190 void (*safe_halt)(void);
194 void (*adjust_exception_frame)(void);
199 #ifdef CONFIG_X86_LOCAL_APIC
201 * Direct APIC operations, principally for VMI. Ideally
202 * these shouldn't be in this interface.
204 void (*apic_write)(unsigned long reg, u32 v);
205 void (*apic_write_atomic)(unsigned long reg, u32 v);
206 u32 (*apic_read)(unsigned long reg);
207 void (*setup_boot_clock)(void);
208 void (*setup_secondary_clock)(void);
210 void (*startup_ipi_hook)(int phys_apicid,
211 unsigned long start_eip,
212 unsigned long start_esp);
218 * Called before/after init_mm pagetable setup. setup_start
219 * may reset %cr3, and may pre-install parts of the pagetable;
220 * pagetable setup is expected to preserve any existing
223 void (*pagetable_setup_start)(pgd_t *pgd_base);
224 void (*pagetable_setup_done)(pgd_t *pgd_base);
226 unsigned long (*read_cr2)(void);
227 void (*write_cr2)(unsigned long);
229 unsigned long (*read_cr3)(void);
230 void (*write_cr3)(unsigned long);
233 * Hooks for intercepting the creation/use/destruction of an
236 void (*activate_mm)(struct mm_struct *prev,
237 struct mm_struct *next);
238 void (*dup_mmap)(struct mm_struct *oldmm,
239 struct mm_struct *mm);
240 void (*exit_mmap)(struct mm_struct *mm);
244 void (*flush_tlb_user)(void);
245 void (*flush_tlb_kernel)(void);
246 void (*flush_tlb_single)(unsigned long addr);
247 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
250 /* Hooks for allocating and freeing a pagetable top-level */
251 int (*pgd_alloc)(struct mm_struct *mm);
252 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
255 * Hooks for allocating/releasing pagetable pages when they're
256 * attached to a pagetable
258 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
259 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
260 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
261 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
262 void (*release_pte)(u32 pfn);
263 void (*release_pmd)(u32 pfn);
264 void (*release_pud)(u32 pfn);
266 /* Pagetable manipulation functions */
267 void (*set_pte)(pte_t *ptep, pte_t pteval);
268 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
269 pte_t *ptep, pte_t pteval);
270 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
271 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
273 void (*pte_update_defer)(struct mm_struct *mm,
274 unsigned long addr, pte_t *ptep);
276 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
278 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
279 pte_t *ptep, pte_t pte);
281 pteval_t (*pte_val)(pte_t);
282 pteval_t (*pte_flags)(pte_t);
283 pte_t (*make_pte)(pteval_t pte);
285 pgdval_t (*pgd_val)(pgd_t);
286 pgd_t (*make_pgd)(pgdval_t pgd);
288 #if PAGETABLE_LEVELS >= 3
289 #ifdef CONFIG_X86_PAE
290 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
291 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
292 pte_t *ptep, pte_t pte);
293 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
295 void (*pmd_clear)(pmd_t *pmdp);
297 #endif /* CONFIG_X86_PAE */
299 void (*set_pud)(pud_t *pudp, pud_t pudval);
301 pmdval_t (*pmd_val)(pmd_t);
302 pmd_t (*make_pmd)(pmdval_t pmd);
304 #if PAGETABLE_LEVELS == 4
305 pudval_t (*pud_val)(pud_t);
306 pud_t (*make_pud)(pudval_t pud);
308 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
309 #endif /* PAGETABLE_LEVELS == 4 */
310 #endif /* PAGETABLE_LEVELS >= 3 */
312 #ifdef CONFIG_HIGHPTE
313 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
316 struct pv_lazy_ops lazy_mode;
320 /* Sometimes the physical address is a pfn, and sometimes its
321 an mfn. We can tell which is which from the index. */
322 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
323 unsigned long phys, pgprot_t flags);
326 /* This contains all the paravirt structures: we get a convenient
327 * number for each function using the offset which we use to indicate
329 struct paravirt_patch_template {
330 struct pv_init_ops pv_init_ops;
331 struct pv_time_ops pv_time_ops;
332 struct pv_cpu_ops pv_cpu_ops;
333 struct pv_irq_ops pv_irq_ops;
334 struct pv_apic_ops pv_apic_ops;
335 struct pv_mmu_ops pv_mmu_ops;
338 extern struct pv_info pv_info;
339 extern struct pv_init_ops pv_init_ops;
340 extern struct pv_time_ops pv_time_ops;
341 extern struct pv_cpu_ops pv_cpu_ops;
342 extern struct pv_irq_ops pv_irq_ops;
343 extern struct pv_apic_ops pv_apic_ops;
344 extern struct pv_mmu_ops pv_mmu_ops;
346 #define PARAVIRT_PATCH(x) \
347 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
349 #define paravirt_type(op) \
350 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
351 [paravirt_opptr] "m" (op)
352 #define paravirt_clobber(clobber) \
353 [paravirt_clobber] "i" (clobber)
356 * Generate some code, and mark it as patchable by the
357 * apply_paravirt() alternate instruction patcher.
359 #define _paravirt_alt(insn_string, type, clobber) \
360 "771:\n\t" insn_string "\n" "772:\n" \
361 ".pushsection .parainstructions,\"a\"\n" \
364 " .byte " type "\n" \
365 " .byte 772b-771b\n" \
366 " .short " clobber "\n" \
369 /* Generate patchable code, with the default asm parameters. */
370 #define paravirt_alt(insn_string) \
371 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
373 /* Simple instruction patching code. */
374 #define DEF_NATIVE(ops, name, code) \
375 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
376 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
378 unsigned paravirt_patch_nop(void);
379 unsigned paravirt_patch_ignore(unsigned len);
380 unsigned paravirt_patch_call(void *insnbuf,
381 const void *target, u16 tgt_clobbers,
382 unsigned long addr, u16 site_clobbers,
384 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
385 unsigned long addr, unsigned len);
386 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
387 unsigned long addr, unsigned len);
389 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
390 const char *start, const char *end);
392 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
393 unsigned long addr, unsigned len);
395 int paravirt_disable_iospace(void);
398 * This generates an indirect call based on the operation type number.
399 * The type number, computed in PARAVIRT_PATCH, is derived from the
400 * offset into the paravirt_patch_template structure, and can therefore be
401 * freely converted back into a structure offset.
403 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
406 * These macros are intended to wrap calls through one of the paravirt
407 * ops structs, so that they can be later identified and patched at
410 * Normally, a call to a pv_op function is a simple indirect call:
411 * (pv_op_struct.operations)(args...).
413 * Unfortunately, this is a relatively slow operation for modern CPUs,
414 * because it cannot necessarily determine what the destination
415 * address is. In this case, the address is a runtime constant, so at
416 * the very least we can patch the call to e a simple direct call, or
417 * ideally, patch an inline implementation into the callsite. (Direct
418 * calls are essentially free, because the call and return addresses
419 * are completely predictable.)
421 * For i386, these macros rely on the standard gcc "regparm(3)" calling
422 * convention, in which the first three arguments are placed in %eax,
423 * %edx, %ecx (in that order), and the remaining arguments are placed
424 * on the stack. All caller-save registers (eax,edx,ecx) are expected
425 * to be modified (either clobbered or used for return values).
426 * X86_64, on the other hand, already specifies a register-based calling
427 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
428 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
429 * special handling for dealing with 4 arguments, unlike i386.
430 * However, x86_64 also have to clobber all caller saved registers, which
431 * unfortunately, are quite a bit (r8 - r11)
433 * The call instruction itself is marked by placing its start address
434 * and size into the .parainstructions section, so that
435 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
436 * appropriate patching under the control of the backend pv_init_ops
439 * Unfortunately there's no way to get gcc to generate the args setup
440 * for the call, and then allow the call itself to be generated by an
441 * inline asm. Because of this, we must do the complete arg setup and
442 * return value handling from within these macros. This is fairly
445 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
446 * It could be extended to more arguments, but there would be little
447 * to be gained from that. For each number of arguments, there are
448 * the two VCALL and CALL variants for void and non-void functions.
450 * When there is a return value, the invoker of the macro must specify
451 * the return type. The macro then uses sizeof() on that type to
452 * determine whether its a 32 or 64 bit value, and places the return
453 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
454 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
455 * the return value size.
457 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
458 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
461 * Small structures are passed and returned in registers. The macro
462 * calling convention can't directly deal with this, so the wrapper
463 * functions must do this.
465 * These PVOP_* macros are only defined within this header. This
466 * means that all uses must be wrapped in inline functions. This also
467 * makes sure the incoming and outgoing types are always correct.
470 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
471 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
472 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
474 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
475 #define EXTRA_CLOBBERS
476 #define VEXTRA_CLOBBERS
478 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
479 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
480 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
481 "=S" (__esi), "=d" (__edx), \
484 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
486 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
487 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
490 #ifdef CONFIG_PARAVIRT_DEBUG
491 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
493 #define PVOP_TEST_NULL(op) ((void)op)
496 #define __PVOP_CALL(rettype, op, pre, post, ...) \
500 PVOP_TEST_NULL(op); \
501 /* This is 32-bit specific, but is okay in 64-bit */ \
502 /* since this condition will never hold */ \
503 if (sizeof(rettype) > sizeof(unsigned long)) { \
505 paravirt_alt(PARAVIRT_CALL) \
507 : PVOP_CALL_CLOBBERS \
508 : paravirt_type(op), \
509 paravirt_clobber(CLBR_ANY), \
511 : "memory", "cc" EXTRA_CLOBBERS); \
512 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
515 paravirt_alt(PARAVIRT_CALL) \
517 : PVOP_CALL_CLOBBERS \
518 : paravirt_type(op), \
519 paravirt_clobber(CLBR_ANY), \
521 : "memory", "cc" EXTRA_CLOBBERS); \
522 __ret = (rettype)__eax; \
526 #define __PVOP_VCALL(op, pre, post, ...) \
529 PVOP_TEST_NULL(op); \
531 paravirt_alt(PARAVIRT_CALL) \
533 : PVOP_VCALL_CLOBBERS \
534 : paravirt_type(op), \
535 paravirt_clobber(CLBR_ANY), \
537 : "memory", "cc" VEXTRA_CLOBBERS); \
540 #define PVOP_CALL0(rettype, op) \
541 __PVOP_CALL(rettype, op, "", "")
542 #define PVOP_VCALL0(op) \
543 __PVOP_VCALL(op, "", "")
545 #define PVOP_CALL1(rettype, op, arg1) \
546 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
547 #define PVOP_VCALL1(op, arg1) \
548 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
550 #define PVOP_CALL2(rettype, op, arg1, arg2) \
551 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
552 "1" ((unsigned long)(arg2)))
553 #define PVOP_VCALL2(op, arg1, arg2) \
554 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
555 "1" ((unsigned long)(arg2)))
557 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
558 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
559 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
560 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
561 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
562 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
564 /* This is the only difference in x86_64. We can make it much simpler */
566 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
567 __PVOP_CALL(rettype, op, \
568 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
569 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
570 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
571 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
573 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
574 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
575 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
577 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
578 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
579 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
580 "3"((unsigned long)(arg4)))
581 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
582 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
583 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
584 "3"((unsigned long)(arg4)))
587 static inline int paravirt_enabled(void)
589 return pv_info.paravirt_enabled;
592 static inline void load_sp0(struct tss_struct *tss,
593 struct thread_struct *thread)
595 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
598 #define ARCH_SETUP pv_init_ops.arch_setup();
599 static inline unsigned long get_wallclock(void)
601 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
604 static inline int set_wallclock(unsigned long nowtime)
606 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
609 static inline void (*choose_time_init(void))(void)
611 return pv_time_ops.time_init;
614 /* The paravirtualized CPUID instruction. */
615 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
616 unsigned int *ecx, unsigned int *edx)
618 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
622 * These special macros can be used to get or set a debugging register
624 static inline unsigned long paravirt_get_debugreg(int reg)
626 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
628 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
629 static inline void set_debugreg(unsigned long val, int reg)
631 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
634 static inline void clts(void)
636 PVOP_VCALL0(pv_cpu_ops.clts);
639 static inline unsigned long read_cr0(void)
641 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
644 static inline void write_cr0(unsigned long x)
646 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
649 static inline unsigned long read_cr2(void)
651 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
654 static inline void write_cr2(unsigned long x)
656 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
659 static inline unsigned long read_cr3(void)
661 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
664 static inline void write_cr3(unsigned long x)
666 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
669 static inline unsigned long read_cr4(void)
671 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
673 static inline unsigned long read_cr4_safe(void)
675 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
678 static inline void write_cr4(unsigned long x)
680 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
684 static inline unsigned long read_cr8(void)
686 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
689 static inline void write_cr8(unsigned long x)
691 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
695 static inline void raw_safe_halt(void)
697 PVOP_VCALL0(pv_irq_ops.safe_halt);
700 static inline void halt(void)
702 PVOP_VCALL0(pv_irq_ops.safe_halt);
705 static inline void wbinvd(void)
707 PVOP_VCALL0(pv_cpu_ops.wbinvd);
710 #define get_kernel_rpl() (pv_info.kernel_rpl)
712 static inline u64 paravirt_read_msr(unsigned msr, int *err)
714 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
716 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
718 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
721 /* These should all do BUG_ON(_err), but our headers are too tangled. */
722 #define rdmsr(msr, val1, val2) \
725 u64 _l = paravirt_read_msr(msr, &_err); \
730 #define wrmsr(msr, val1, val2) \
732 paravirt_write_msr(msr, val1, val2); \
735 #define rdmsrl(msr, val) \
738 val = paravirt_read_msr(msr, &_err); \
741 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
742 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
744 /* rdmsr with exception handling */
745 #define rdmsr_safe(msr, a, b) \
748 u64 _l = paravirt_read_msr(msr, &_err); \
754 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
758 *p = paravirt_read_msr(msr, &err);
762 static inline u64 paravirt_read_tsc(void)
764 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
767 #define rdtscl(low) \
769 u64 _l = paravirt_read_tsc(); \
773 #define rdtscll(val) (val = paravirt_read_tsc())
775 static inline unsigned long long paravirt_sched_clock(void)
777 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
779 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
781 static inline unsigned long long paravirt_read_pmc(int counter)
783 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
786 #define rdpmc(counter, low, high) \
788 u64 _l = paravirt_read_pmc(counter); \
793 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
795 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
798 #define rdtscp(low, high, aux) \
801 unsigned long __val = paravirt_rdtscp(&__aux); \
802 (low) = (u32)__val; \
803 (high) = (u32)(__val >> 32); \
807 #define rdtscpll(val, aux) \
809 unsigned long __aux; \
810 val = paravirt_rdtscp(&__aux); \
814 static inline void load_TR_desc(void)
816 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
818 static inline void load_gdt(const struct desc_ptr *dtr)
820 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
822 static inline void load_idt(const struct desc_ptr *dtr)
824 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
826 static inline void set_ldt(const void *addr, unsigned entries)
828 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
830 static inline void store_gdt(struct desc_ptr *dtr)
832 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
834 static inline void store_idt(struct desc_ptr *dtr)
836 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
838 static inline unsigned long paravirt_store_tr(void)
840 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
842 #define store_tr(tr) ((tr) = paravirt_store_tr())
843 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
845 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
848 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
851 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
854 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
855 void *desc, int type)
857 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
860 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
862 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
864 static inline void set_iopl_mask(unsigned mask)
866 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
869 /* The paravirtualized I/O functions */
870 static inline void slow_down_io(void)
872 pv_cpu_ops.io_delay();
873 #ifdef REALLY_SLOW_IO
874 pv_cpu_ops.io_delay();
875 pv_cpu_ops.io_delay();
876 pv_cpu_ops.io_delay();
880 #ifdef CONFIG_X86_LOCAL_APIC
882 * Basic functions accessing APICs.
884 static inline void apic_write(unsigned long reg, u32 v)
886 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
889 static inline void apic_write_atomic(unsigned long reg, u32 v)
891 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
894 static inline u32 apic_read(unsigned long reg)
896 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
899 static inline void setup_boot_clock(void)
901 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
904 static inline void setup_secondary_clock(void)
906 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
910 static inline void paravirt_post_allocator_init(void)
912 if (pv_init_ops.post_allocator_init)
913 (*pv_init_ops.post_allocator_init)();
916 static inline void paravirt_pagetable_setup_start(pgd_t *base)
918 (*pv_mmu_ops.pagetable_setup_start)(base);
921 static inline void paravirt_pagetable_setup_done(pgd_t *base)
923 (*pv_mmu_ops.pagetable_setup_done)(base);
927 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
928 unsigned long start_esp)
930 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
931 phys_apicid, start_eip, start_esp);
935 static inline void paravirt_activate_mm(struct mm_struct *prev,
936 struct mm_struct *next)
938 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
941 static inline void arch_dup_mmap(struct mm_struct *oldmm,
942 struct mm_struct *mm)
944 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
947 static inline void arch_exit_mmap(struct mm_struct *mm)
949 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
952 static inline void __flush_tlb(void)
954 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
956 static inline void __flush_tlb_global(void)
958 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
960 static inline void __flush_tlb_single(unsigned long addr)
962 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
965 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
968 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
971 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
973 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
976 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
978 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
981 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
983 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
985 static inline void paravirt_release_pte(unsigned pfn)
987 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
990 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
992 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
995 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
996 unsigned start, unsigned count)
998 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1000 static inline void paravirt_release_pmd(unsigned pfn)
1002 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1005 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
1007 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1009 static inline void paravirt_release_pud(unsigned pfn)
1011 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1014 #ifdef CONFIG_HIGHPTE
1015 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1018 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1023 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1026 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1029 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1032 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1035 static inline pte_t __pte(pteval_t val)
1039 if (sizeof(pteval_t) > sizeof(long))
1040 ret = PVOP_CALL2(pteval_t,
1041 pv_mmu_ops.make_pte,
1042 val, (u64)val >> 32);
1044 ret = PVOP_CALL1(pteval_t,
1045 pv_mmu_ops.make_pte,
1048 return (pte_t) { .pte = ret };
1051 static inline pteval_t pte_val(pte_t pte)
1055 if (sizeof(pteval_t) > sizeof(long))
1056 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1057 pte.pte, (u64)pte.pte >> 32);
1059 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1065 static inline pteval_t pte_flags(pte_t pte)
1069 if (sizeof(pteval_t) > sizeof(long))
1070 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1071 pte.pte, (u64)pte.pte >> 32);
1073 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1079 static inline pgd_t __pgd(pgdval_t val)
1083 if (sizeof(pgdval_t) > sizeof(long))
1084 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1085 val, (u64)val >> 32);
1087 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1090 return (pgd_t) { ret };
1093 static inline pgdval_t pgd_val(pgd_t pgd)
1097 if (sizeof(pgdval_t) > sizeof(long))
1098 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1099 pgd.pgd, (u64)pgd.pgd >> 32);
1101 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1107 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1108 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1113 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1116 return (pte_t) { .pte = ret };
1119 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1120 pte_t *ptep, pte_t pte)
1122 if (sizeof(pteval_t) > sizeof(long))
1124 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1126 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1127 mm, addr, ptep, pte.pte);
1130 static inline void set_pte(pte_t *ptep, pte_t pte)
1132 if (sizeof(pteval_t) > sizeof(long))
1133 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1134 pte.pte, (u64)pte.pte >> 32);
1136 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1140 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1141 pte_t *ptep, pte_t pte)
1143 if (sizeof(pteval_t) > sizeof(long))
1145 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1147 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1150 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1152 pmdval_t val = native_pmd_val(pmd);
1154 if (sizeof(pmdval_t) > sizeof(long))
1155 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1157 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1160 #if PAGETABLE_LEVELS >= 3
1161 static inline pmd_t __pmd(pmdval_t val)
1165 if (sizeof(pmdval_t) > sizeof(long))
1166 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1167 val, (u64)val >> 32);
1169 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1172 return (pmd_t) { ret };
1175 static inline pmdval_t pmd_val(pmd_t pmd)
1179 if (sizeof(pmdval_t) > sizeof(long))
1180 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1181 pmd.pmd, (u64)pmd.pmd >> 32);
1183 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1189 static inline void set_pud(pud_t *pudp, pud_t pud)
1191 pudval_t val = native_pud_val(pud);
1193 if (sizeof(pudval_t) > sizeof(long))
1194 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1195 val, (u64)val >> 32);
1197 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1200 #if PAGETABLE_LEVELS == 4
1201 static inline pud_t __pud(pudval_t val)
1205 if (sizeof(pudval_t) > sizeof(long))
1206 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1207 val, (u64)val >> 32);
1209 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1212 return (pud_t) { ret };
1215 static inline pudval_t pud_val(pud_t pud)
1219 if (sizeof(pudval_t) > sizeof(long))
1220 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1221 pud.pud, (u64)pud.pud >> 32);
1223 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1229 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1231 pgdval_t val = native_pgd_val(pgd);
1233 if (sizeof(pgdval_t) > sizeof(long))
1234 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1235 val, (u64)val >> 32);
1237 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1241 static inline void pgd_clear(pgd_t *pgdp)
1243 set_pgd(pgdp, __pgd(0));
1246 static inline void pud_clear(pud_t *pudp)
1248 set_pud(pudp, __pud(0));
1251 #endif /* PAGETABLE_LEVELS == 4 */
1253 #endif /* PAGETABLE_LEVELS >= 3 */
1255 #ifdef CONFIG_X86_PAE
1256 /* Special-case pte-setting operations for PAE, which can't update a
1257 64-bit pte atomically */
1258 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1260 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1261 pte.pte, pte.pte >> 32);
1264 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1265 pte_t *ptep, pte_t pte)
1268 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1271 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1274 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1277 static inline void pmd_clear(pmd_t *pmdp)
1279 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1281 #else /* !CONFIG_X86_PAE */
1282 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1287 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1288 pte_t *ptep, pte_t pte)
1293 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1296 set_pte_at(mm, addr, ptep, __pte(0));
1299 static inline void pmd_clear(pmd_t *pmdp)
1301 set_pmd(pmdp, __pmd(0));
1303 #endif /* CONFIG_X86_PAE */
1305 /* Lazy mode for batching updates / context switch */
1306 enum paravirt_lazy_mode {
1312 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1313 void paravirt_enter_lazy_cpu(void);
1314 void paravirt_leave_lazy_cpu(void);
1315 void paravirt_enter_lazy_mmu(void);
1316 void paravirt_leave_lazy_mmu(void);
1317 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1319 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1320 static inline void arch_enter_lazy_cpu_mode(void)
1322 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1325 static inline void arch_leave_lazy_cpu_mode(void)
1327 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1330 static inline void arch_flush_lazy_cpu_mode(void)
1332 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1333 arch_leave_lazy_cpu_mode();
1334 arch_enter_lazy_cpu_mode();
1339 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1340 static inline void arch_enter_lazy_mmu_mode(void)
1342 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1345 static inline void arch_leave_lazy_mmu_mode(void)
1347 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1350 static inline void arch_flush_lazy_mmu_mode(void)
1352 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1353 arch_leave_lazy_mmu_mode();
1354 arch_enter_lazy_mmu_mode();
1358 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1359 unsigned long phys, pgprot_t flags)
1361 pv_mmu_ops.set_fixmap(idx, phys, flags);
1364 void _paravirt_nop(void);
1365 #define paravirt_nop ((void *)_paravirt_nop)
1367 /* These all sit in the .parainstructions section to tell us what to patch. */
1368 struct paravirt_patch_site {
1369 u8 *instr; /* original instructions */
1370 u8 instrtype; /* type of this instruction */
1371 u8 len; /* length of original instruction */
1372 u16 clobbers; /* what registers you may clobber */
1375 extern struct paravirt_patch_site __parainstructions[],
1376 __parainstructions_end[];
1378 #ifdef CONFIG_X86_32
1379 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1380 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1381 #define PV_FLAGS_ARG "0"
1382 #define PV_EXTRA_CLOBBERS
1383 #define PV_VEXTRA_CLOBBERS
1385 /* We save some registers, but all of them, that's too much. We clobber all
1386 * caller saved registers but the argument parameter */
1387 #define PV_SAVE_REGS "pushq %%rdi;"
1388 #define PV_RESTORE_REGS "popq %%rdi;"
1389 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1390 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1391 #define PV_FLAGS_ARG "D"
1394 static inline unsigned long __raw_local_save_flags(void)
1398 asm volatile(paravirt_alt(PV_SAVE_REGS
1402 : paravirt_type(pv_irq_ops.save_fl),
1403 paravirt_clobber(CLBR_EAX)
1404 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1408 static inline void raw_local_irq_restore(unsigned long f)
1410 asm volatile(paravirt_alt(PV_SAVE_REGS
1415 paravirt_type(pv_irq_ops.restore_fl),
1416 paravirt_clobber(CLBR_EAX)
1417 : "memory", "cc" PV_EXTRA_CLOBBERS);
1420 static inline void raw_local_irq_disable(void)
1422 asm volatile(paravirt_alt(PV_SAVE_REGS
1426 : paravirt_type(pv_irq_ops.irq_disable),
1427 paravirt_clobber(CLBR_EAX)
1428 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1431 static inline void raw_local_irq_enable(void)
1433 asm volatile(paravirt_alt(PV_SAVE_REGS
1437 : paravirt_type(pv_irq_ops.irq_enable),
1438 paravirt_clobber(CLBR_EAX)
1439 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1442 static inline unsigned long __raw_local_irq_save(void)
1446 f = __raw_local_save_flags();
1447 raw_local_irq_disable();
1451 /* Make sure as little as possible of this mess escapes. */
1452 #undef PARAVIRT_CALL
1466 #else /* __ASSEMBLY__ */
1468 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1472 .pushsection .parainstructions,"a"; \
1481 #ifdef CONFIG_X86_64
1482 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1483 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1484 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1485 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1486 #define PARA_INDIRECT(addr) *addr(%rip)
1488 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1489 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1490 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1491 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1492 #define PARA_INDIRECT(addr) *%cs:addr
1495 #define INTERRUPT_RETURN \
1496 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1497 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1499 #define DISABLE_INTERRUPTS(clobbers) \
1500 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1502 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1505 #define ENABLE_INTERRUPTS(clobbers) \
1506 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1508 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1511 #define USERGS_SYSRET32 \
1512 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
1514 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1516 #ifdef CONFIG_X86_32
1517 #define GET_CR0_INTO_EAX \
1518 push %ecx; push %edx; \
1519 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1522 #define ENABLE_INTERRUPTS_SYSEXIT \
1523 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1525 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1528 #else /* !CONFIG_X86_32 */
1531 * If swapgs is used while the userspace stack is still current,
1532 * there's no way to call a pvop. The PV replacement *must* be
1533 * inlined, or the swapgs instruction must be trapped and emulated.
1535 #define SWAPGS_UNSAFE_STACK \
1536 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1540 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1542 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1546 #define GET_CR2_INTO_RCX \
1547 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1551 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1552 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1554 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1556 #define USERGS_SYSRET64 \
1557 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1559 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1561 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1562 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1564 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1565 #endif /* CONFIG_X86_32 */
1567 #endif /* __ASSEMBLY__ */
1568 #endif /* CONFIG_PARAVIRT */
1569 #endif /* __ASM_PARAVIRT_H */