1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
5 #include <asm/mpspec.h>
8 * Intel IO-APIC support for SMP and UP systems.
10 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
13 #define APIC_MISMATCH_DEBUG
15 #define IO_APIC_BASE(idx) \
16 ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
17 + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
20 * The structure of the IO-APIC:
22 union IO_APIC_reg_00 {
25 u32 __reserved_2 : 14,
30 } __attribute__ ((packed)) bits;
33 union IO_APIC_reg_01 {
41 } __attribute__ ((packed)) bits;
44 union IO_APIC_reg_02 {
47 u32 __reserved_2 : 24,
50 } __attribute__ ((packed)) bits;
53 union IO_APIC_reg_03 {
58 } __attribute__ ((packed)) bits;
62 * # of IO-APICs and # of IRQ routing registers
64 extern int nr_ioapics;
65 extern int nr_ioapic_registers[MAX_IO_APICS];
67 enum ioapic_irq_destination_types {
78 struct IO_APIC_route_entry {
80 delivery_mode : 3, /* 000: FIXED
84 dest_mode : 1, /* 0: physical, 1: logical */
88 trigger : 1, /* 0: edge, 1: level */
89 mask : 1, /* 0: enabled, 1: disabled */
92 union { struct { __u32
104 } __attribute__ ((packed));
107 * MP-BIOS irq configuration table structures:
110 /* I/O APIC entries */
111 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
113 /* # of MP IRQ source entries */
114 extern int mp_irq_entries;
116 /* MP IRQ source entries */
117 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
119 /* non-0 if default (table-less) MP configuration */
120 extern int mpc_default_type;
122 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
124 *IO_APIC_BASE(apic) = reg;
125 return *(IO_APIC_BASE(apic)+4);
128 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
130 *IO_APIC_BASE(apic) = reg;
131 *(IO_APIC_BASE(apic)+4) = value;
135 * Re-write a value: to be used for read-modify-write
136 * cycles where the read already set up the index register.
138 static inline void io_apic_modify(unsigned int apic, unsigned int value)
140 *(IO_APIC_BASE(apic)+4) = value;
144 * Synchronize the IO-APIC and the CPU by doing
145 * a dummy read from the IO-APIC
147 static inline void io_apic_sync(unsigned int apic)
149 (void) *(IO_APIC_BASE(apic)+4);
152 /* 1 if "noapic" boot option passed */
153 extern int skip_ioapic_setup;
156 * If we use the IO-APIC for IRQ routing, disable automatic
157 * assignment of PCI IRQ's.
159 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
162 extern int io_apic_get_version (int ioapic);
163 extern int io_apic_get_redir_entries (int ioapic);
164 extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
167 extern int sis_apic_bug; /* dummy */
169 void enable_NMI_through_LVT0 (void * dummy);
171 extern spinlock_t i8259A_lock;