2 * Copyright (C) 2010 Andreas Bießmann <biessmann.devel@googlemail.com>
4 * based on previous work by
6 * Ulf Samuelsson <ulf@atmel.com>
7 * Rick Bronson <rick@efn.org>
9 * Configuration settings for the AT91RM9200EK board.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #ifndef __AT91RM9200EK_CONFIG_H__
31 #define __AT91RM9200EK_CONFIG_H__
33 #include <asm/sizes.h>
36 * set some initial configurations depending on configure target
38 * at91rm9200ek_config -> boot from 0x0 in NOR Flash at CS0
39 * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel
40 * initialisation was done by some preloader
43 #define CONFIG_SKIP_LOWLEVEL_INIT
44 #define CONFIG_SYS_TEXT_BASE 0x20100000
46 #define CONFIG_SYS_TEXT_BASE 0x10000000
50 * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz
51 * AT91C_MAIN_CLOCK is the frequency of PLLA output
52 * AT91C_MASTER_CLOCK is the peripherial clock
53 * CONFIG_SYS_HZ_CLOCK is the value for CCR in tc0 (divider 2 is implicitely
54 * set in arch/arm/cpu/arm920t/at91/timer.c)
55 * CONFIG_SYS_HZ is the tick rate for timer tc0
57 #define AT91C_XTAL_CLOCK 18432000
58 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
59 #define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39)
60 #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3 )
61 #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
62 #define CONFIG_SYS_HZ 1000
64 /* CPU configuration */
65 #define CONFIG_AT91RM9200
66 #define CONFIG_AT91RM9200EK
67 #define CONFIG_CPUAT91
70 #include <asm/hardware.h> /* needed for port definitions */
72 #define CONFIG_CMDLINE_TAG
73 #define CONFIG_SETUP_MEMORY_TAGS
74 #define CONFIG_INITRD_TAG
76 #define CONFIG_BOARD_EARLY_INIT_F
78 #define CONFIG_OF_LIBFDT
81 * Memory Configuration
83 #define CONFIG_NR_DRAM_BANKS 1
84 #define CONFIG_SYS_SDRAM_BASE 0x20000000
85 #define CONFIG_SYS_SDRAM_SIZE SZ_32M
87 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
88 #define CONFIG_SYS_MEMTEST_END \
89 (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - SZ_256K)
94 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
95 #define CONFIG_SYS_USE_MAIN_OSCILLATOR
97 #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
98 #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
101 #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
102 #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
103 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
104 #define CONFIG_SYS_MCKR_VAL 0x00000202
107 #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
108 #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
109 #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
110 #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
111 #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
112 #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
113 #define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80)
114 #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
115 #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
116 #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
117 #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
118 #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
119 #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
120 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
126 * Choose a USART for serial console
127 * CONFIG_DBGU is DBGU unit on J10
128 * CONFIG_USART1 is USART1 on J14
130 #define CONFIG_ATMEL_USART
131 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
132 #define CONFIG_USART_ID 0/* ignored in arm */
134 #define CONFIG_BAUDRATE 115200
137 * Command line configuration.
139 #include <config_cmd_default.h>
141 #define CONFIG_CMD_DHCP
142 #define CONFIG_CMD_FAT
143 #define CONFIG_CMD_MII
144 #define CONFIG_CMD_PING
145 #define CONFIG_CMD_USB
146 #undef CONFIG_CMD_FPGA
149 * Network Driver Setting
151 #define CONFIG_DRIVER_AT91EMAC
152 #define CONFIG_SYS_RX_ETH_BUFFER 16
159 #define CONFIG_FLASH_CFI_DRIVER
160 #define CONFIG_SYS_FLASH_CFI
161 #define CONFIG_SYS_FLASH_BASE 0x10000000
162 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
163 #define PHYS_FLASH_SIZE SZ_8M
164 #define CONFIG_SYS_MAX_FLASH_BANKS 1
165 #define CONFIG_SYS_MAX_FLASH_SECT 256
166 #define CONFIG_SYS_FLASH_PROTECTION
171 #define CONFIG_USB_ATMEL 1
172 #define CONFIG_USB_OHCI_NEW 1
173 #define CONFIG_USB_KEYBOARD 1
174 #define CONFIG_USB_STORAGE 1
175 #define CONFIG_DOS_PARTITION 1
177 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
178 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_USB_HOST_BASE
179 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
180 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
183 * Environment Settings
185 #define CONFIG_ENV_IS_IN_FLASH
190 #define CONFIG_ENV_ADDR \
191 (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
192 #define CONFIG_ENV_SIZE SZ_64K /* sectors are 64K here */
193 /* The following #defines are needed to get flash environment right */
194 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
195 #define CONFIG_SYS_MONITOR_LEN SZ_256K
200 #define CONFIG_BOOTDELAY 3
202 /* default load address */
203 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_16M
204 #define CONFIG_ENV_OVERWRITE
209 #define CONFIG_CMDLINE_EDITING
210 #define CONFIG_SYS_LONGHELP
211 #define CONFIG_AUTO_COMPLETE
212 #define CONFIG_SYS_HUSH_PARSER
213 #define CONFIG_SYS_PROMPT "U-Boot> "
214 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
215 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
216 /* Print Buffer Size */
217 #define CONFIG_SYS_PBSIZE \
218 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
221 * Size of malloc() pool
223 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, \
226 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
227 - GENERATED_GBL_DATA_SIZE)
229 #endif /* __AT91RM9200EK_CONFIG_H__ */