2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
4 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_SYS_NAND_LARGEPAGE
15 #define CONFIG_SYS_USE_NAND
16 #define MACH_TYPE_SCHMOOGIE 1255
17 #define CONFIG_MACH_TYPE MACH_TYPE_SCHMOOGIE
19 /*===================*/
20 /* SoC Configuration */
21 /*===================*/
22 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
23 #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
27 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
28 #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
29 #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
30 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
31 #define PHYS_SDRAM_1 0x80000000 /* DDR Start */
32 #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
33 #define DDR_4BANKS /* 4-bank DDR2 (128MB) */
34 /*====================*/
35 /* Serial Driver info */
36 /*====================*/
37 #define CONFIG_SYS_NS16550
38 #define CONFIG_SYS_NS16550_SERIAL
39 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
40 #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
41 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
42 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
43 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
44 /*===================*/
45 /* I2C Configuration */
46 /*===================*/
47 #define CONFIG_SYS_I2C
48 #define CONFIG_SYS_I2C_DAVINCI
49 #define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
50 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
51 /*==================================*/
52 /* Network & Ethernet Configuration */
53 /*==================================*/
54 #define CONFIG_DRIVER_TI_EMAC
56 #define CONFIG_BOOTP_DNS
57 #define CONFIG_BOOTP_DNS2
58 #define CONFIG_BOOTP_SEND_HOSTNAME
59 #define CONFIG_NET_RETRY_COUNT 10
60 #define CONFIG_OVERWRITE_ETHADDR_ONCE
61 /*=====================*/
62 /* Flash & Environment */
63 /*=====================*/
64 #undef CONFIG_ENV_IS_IN_FLASH
65 #define CONFIG_SYS_NO_FLASH
66 #define CONFIG_NAND_DAVINCI
67 #define CONFIG_SYS_NAND_CS 2
68 #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
69 #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
70 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
71 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
72 #define CONFIG_SYS_NAND_BASE 0x02000000
73 #define CONFIG_SYS_NAND_HW_ECC
74 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
75 #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
76 /*=====================*/
77 /* Board related stuff */
78 /*=====================*/
79 #define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */
80 #define CONFIG_SYS_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */
81 #define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */
82 #define CONFIG_SYS_UID_ADDR 0x50 /* UID chip I2C address */
83 /*==============================*/
84 /* U-Boot general configuration */
85 /*==============================*/
86 #define CONFIG_MISC_INIT_R
87 #undef CONFIG_BOOTDELAY
88 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
89 #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
90 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
91 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
92 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
93 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
94 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
95 #define CONFIG_VERSION_VARIABLE
96 #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
97 #define CONFIG_SYS_HUSH_PARSER
98 #define CONFIG_CMDLINE_EDITING
99 #define CONFIG_SYS_LONGHELP
100 #define CONFIG_CRC32_VERIFY
101 #define CONFIG_MX_CYCLIC
102 /*===================*/
103 /* Linux Information */
104 /*===================*/
105 #define LINUX_BOOT_PARAM_ADDR 0x80000100
106 #define CONFIG_CMDLINE_TAG
107 #define CONFIG_SETUP_MEMORY_TAGS
108 #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
109 #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
110 /*=================*/
111 /* U-Boot commands */
112 /*=================*/
113 #include <config_cmd_default.h>
114 #define CONFIG_CMD_ASKENV
115 #define CONFIG_CMD_DHCP
116 #define CONFIG_CMD_DIAG
117 #define CONFIG_CMD_I2C
118 #define CONFIG_CMD_MII
119 #define CONFIG_CMD_PING
120 #define CONFIG_CMD_SAVES
121 #define CONFIG_CMD_DATE
122 #define CONFIG_CMD_NAND
123 #undef CONFIG_CMD_EEPROM
124 #undef CONFIG_CMD_BDI
125 #undef CONFIG_CMD_FPGA
126 #undef CONFIG_CMD_SETGETDCR
127 #undef CONFIG_CMD_FLASH
128 #undef CONFIG_CMD_IMLS
130 #ifdef CONFIG_CMD_BDI
131 #define CONFIG_CLOCKS
134 #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
136 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
137 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
138 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
139 CONFIG_SYS_INIT_RAM_SIZE - \
140 GENERATED_GBL_DATA_SIZE)
142 #endif /* __CONFIG_H */