3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * This file contains the configuration parameters for the dbau1x00 board.
15 #define CONFIG_DBAU1X00 1
17 #define CONFIG_DISPLAY_BOARDINFO
19 #ifdef CONFIG_DBAU1000
20 /* Also known as Merlot */
22 #ifdef CONFIG_DBAU1100
24 #ifdef CONFIG_DBAU1500
26 #ifdef CONFIG_DBAU1550
29 #error "No valid board set"
35 #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
37 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
39 #define CONFIG_BAUDRATE 115200
43 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
44 #undef CONFIG_BOOTARGS
46 #define CONFIG_EXTRA_ENV_SETTINGS \
47 "addmisc=setenv bootargs ${bootargs} " \
48 "console=ttyS0,${baudrate} " \
50 "bootfile=/tftpboot/vmlinux.srec\0" \
51 "load=tftp 80500000 ${u-boot}\0" \
54 #ifdef CONFIG_DBAU1550
55 /* Boot from flash by default, revert to bootp */
56 #define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
57 #else /* CONFIG_DBAU1550 */
58 #define CONFIG_BOOTCOMMAND "bootp;bootm"
59 #endif /* CONFIG_DBAU1550 */
65 #define CONFIG_BOOTP_BOOTFILESIZE
66 #define CONFIG_BOOTP_BOOTPATH
67 #define CONFIG_BOOTP_GATEWAY
68 #define CONFIG_BOOTP_HOSTNAME
72 * Command line configuration.
74 #include <config_cmd_default.h>
77 #undef CONFIG_CMD_BEDBUG
79 #undef CONFIG_CMD_SAVEENV
81 #undef CONFIG_CMD_FPGA
86 #ifdef CONFIG_DBAU1550
88 #define CONFIG_CMD_FLASH
89 #define CONFIG_CMD_LOADB
90 #define CONFIG_CMD_NET
95 #undef CONFIG_CMD_PCMCIA
99 #define CONFIG_CMD_IDE
100 #define CONFIG_CMD_DHCP
102 #undef CONFIG_CMD_FLASH
103 #undef CONFIG_CMD_LOADB
104 #undef CONFIG_CMD_LOADS
110 * Miscellaneous configurable options
112 #define CONFIG_SYS_LONGHELP /* undef to save memory */
114 #define CONFIG_SYS_PROMPT "DbAu1xx0 # " /* Monitor Command Prompt */
116 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
117 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
118 #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
120 #define CONFIG_SYS_MALLOC_LEN 128*1024
122 #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
124 #define CONFIG_SYS_MHZ 396
126 #if (CONFIG_SYS_MHZ % 12) != 0
127 #error "Invalid CPU frequency - must be multiple of 12!"
130 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
132 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
134 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
136 #define CONFIG_SYS_MEMTEST_START 0x80100000
137 #define CONFIG_SYS_MEMTEST_END 0x80800000
139 /*-----------------------------------------------------------------------
140 * FLASH and environment organization
142 #ifdef CONFIG_DBAU1550
144 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
145 #define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */
147 #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
148 #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
150 #else /* CONFIG_DBAU1550 */
152 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
153 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
155 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
156 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
158 #endif /* CONFIG_DBAU1550 */
160 #define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
162 #define CONFIG_SYS_FLASH_CFI 1
163 #define CONFIG_FLASH_CFI_DRIVER 1
165 /* The following #defines are needed to get flash environment right */
166 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
167 #define CONFIG_SYS_MONITOR_LEN (192 << 10)
169 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
171 /* We boot from this flash, selected with dip switch */
172 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
174 /* timeout values are in ticks */
175 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
176 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
178 #define CONFIG_ENV_IS_NOWHERE 1
180 /* Address and size of Primary Environment Sector */
181 #define CONFIG_ENV_ADDR 0xB0030000
182 #define CONFIG_ENV_SIZE 0x10000
184 #define CONFIG_FLASH_16BIT
186 #define CONFIG_NR_DRAM_BANKS 2
189 #ifdef CONFIG_DBAU1550
195 #define CONFIG_MEMSIZE_IN_BYTES
197 #ifndef CONFIG_DBAU1550
198 /*---ATA PCMCIA ------------------------------------*/
199 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
200 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
201 #define CONFIG_PCMCIA_SLOT_A
203 #define CONFIG_ATAPI 1
204 #define CONFIG_MAC_PARTITION 1
206 /* We run CF in "true ide" mode or a harddrive via pcmcia */
207 #define CONFIG_IDE_PCMCIA 1
209 /* We only support one slot for now */
210 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
211 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
213 #undef CONFIG_IDE_LED /* LED for ide not supported */
214 #undef CONFIG_IDE_RESET /* reset for ide not supported */
216 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
218 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
220 /* Offset for data I/O */
221 #define CONFIG_SYS_ATA_DATA_OFFSET 8
223 /* Offset for normal register accesses */
224 #define CONFIG_SYS_ATA_REG_OFFSET 0
226 /* Offset for alternate registers */
227 #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
228 #endif /* CONFIG_DBAU1550 */
230 /*-----------------------------------------------------------------------
231 * Cache Configuration
233 #define CONFIG_SYS_DCACHE_SIZE 16384
234 #define CONFIG_SYS_ICACHE_SIZE 16384
235 #define CONFIG_SYS_CACHELINE_SIZE 32
237 #endif /* __CONFIG_H */