2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include "mx6_common.h"
18 #define CONFIG_MXC_UART_BASE UART2_BASE
19 #define CONFIG_CONSOLE_DEV "ttymxc1"
20 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
22 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
24 #define CONFIG_CMDLINE_TAG
25 #define CONFIG_SETUP_MEMORY_TAGS
26 #define CONFIG_INITRD_TAG
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_IMX6_THERMAL
30 /* Size of malloc() pool */
31 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_BOARD_LATE_INIT
35 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
39 #define CONFIG_CMD_FUSE
40 #ifdef CONFIG_CMD_FUSE
41 #define CONFIG_MXC_OCOTP
45 #define CONFIG_CMD_I2C
46 #define CONFIG_SYS_I2C
47 #define CONFIG_SYS_I2C_MXC
48 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
49 #define CONFIG_SYS_I2C_SPEED 100000
52 #define CONFIG_CMD_USB
53 #define CONFIG_USB_EHCI
54 #define CONFIG_USB_EHCI_MX6
55 #define CONFIG_USB_STORAGE
56 #define CONFIG_USB_HOST_ETHER
57 #define CONFIG_USB_ETHER_ASIX
58 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
59 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
61 #define CONFIG_MXC_USB_FLAGS 0
64 #define CONFIG_FSL_ESDHC
65 #define CONFIG_FSL_USDHC
66 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
69 #define CONFIG_CMD_MMC
70 #define CONFIG_GENERIC_MMC
71 #define CONFIG_BOUNCE_BUFFER
73 #define CONFIG_FEC_MXC
75 #define IMX_FEC_BASE ENET_BASE_ADDR
76 #define CONFIG_FEC_XCV_TYPE RGMII
77 #define CONFIG_ETHPRIME "FEC"
78 #define CONFIG_FEC_MXC_PHYADDR 4
81 #define CONFIG_PHY_ATHEROS
85 #define CONFIG_SPI_FLASH
86 #define CONFIG_SPI_FLASH_SST
87 #define CONFIG_MXC_SPI
88 #define CONFIG_SF_DEFAULT_BUS 0
89 #define CONFIG_SF_DEFAULT_CS 0
90 #define CONFIG_SF_DEFAULT_SPEED 20000000
91 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
94 /* allow to overwrite serial and ethaddr */
95 #define CONFIG_ENV_OVERWRITE
96 #define CONFIG_CONS_INDEX 1
97 #define CONFIG_BAUDRATE 115200
99 /* Command definition */
100 #undef CONFIG_CMD_FPGA
102 #define CONFIG_CMD_BMODE
103 #define CONFIG_CMD_SETEXPR
105 #define CONFIG_LOADADDR 0x12000000
106 #define CONFIG_SYS_TEXT_BASE 0x17800000
108 #ifdef CONFIG_SUPPORT_EMMC_BOOT
111 "update_emmc_firmware=" \
112 "if test ${ip_dyn} = yes; then " \
113 "setenv get_cmd dhcp; " \
115 "setenv get_cmd tftp; " \
117 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
118 "if mmc dev ${emmcdev}; then " \
119 "setexpr fw_sz ${filesize} / 0x200; " \
120 "setexpr fw_sz ${fw_sz} + 1; " \
121 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
130 "update_spi_firmware=" \
131 "if test ${ip_dyn} = yes; then " \
132 "setenv get_cmd dhcp; " \
134 "setenv get_cmd tftp; " \
136 "if ${get_cmd} ${update_spi_firmware_filename}; then " \
137 "if sf probe; then " \
138 "sf erase 0 0xc0000; " \
139 "sf write ${loadaddr} 0x400 ${filesize}; " \
146 #define CONFIG_EXTRA_ENV_SETTINGS \
147 "script=boot.scr\0" \
149 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
150 "fdt_addr=0x18000000\0" \
153 "console=" CONFIG_CONSOLE_DEV "\0" \
154 "fdt_high=0xffffffff\0" \
155 "initrd_high=0xffffffff\0" \
156 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
158 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
159 "update_sd_firmware=" \
160 "if test ${ip_dyn} = yes; then " \
161 "setenv get_cmd dhcp; " \
163 "setenv get_cmd tftp; " \
165 "if mmc dev ${mmcdev}; then " \
166 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
167 "setexpr fw_sz ${filesize} / 0x200; " \
168 "setexpr fw_sz ${fw_sz} + 1; " \
169 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
174 "mmcargs=setenv bootargs console=${console},${baudrate} " \
175 "root=${mmcroot}\0" \
177 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
178 "bootscript=echo Running bootscript from mmc ...; " \
180 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
181 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
182 "mmcboot=echo Booting from mmc ...; " \
184 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
185 "if run loadfdt; then " \
186 "bootz ${loadaddr} - ${fdt_addr}; " \
188 "if test ${boot_fdt} = try; then " \
191 "echo WARN: Cannot load the DT; " \
197 "netargs=setenv bootargs console=${console},${baudrate} " \
199 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
200 "netboot=echo Booting from net ...; " \
202 "if test ${ip_dyn} = yes; then " \
203 "setenv get_cmd dhcp; " \
205 "setenv get_cmd tftp; " \
207 "${get_cmd} ${image}; " \
208 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
209 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
210 "bootz ${loadaddr} - ${fdt_addr}; " \
212 "if test ${boot_fdt} = try; then " \
215 "echo WARN: Cannot load the DT; " \
222 #define CONFIG_BOOTCOMMAND \
223 "mmc dev ${mmcdev};" \
224 "if mmc rescan; then " \
225 "if run loadbootscript; then " \
228 "if run loadimage; then " \
230 "else run netboot; " \
233 "else run netboot; fi"
235 #define CONFIG_ARP_TIMEOUT 200UL
237 /* Miscellaneous configurable options */
238 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
239 #define CONFIG_SYS_CBSIZE 256
241 /* Print Buffer Size */
242 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
243 #define CONFIG_SYS_MAXARGS 16
244 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
246 #define CONFIG_SYS_MEMTEST_START 0x10000000
247 #define CONFIG_SYS_MEMTEST_END 0x10010000
248 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
250 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
252 #define CONFIG_STACKSIZE (128 * 1024)
254 /* Physical Memory Map */
255 #define CONFIG_NR_DRAM_BANKS 1
256 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
258 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
259 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
260 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
262 #define CONFIG_SYS_INIT_SP_OFFSET \
263 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
264 #define CONFIG_SYS_INIT_SP_ADDR \
265 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
267 /* Environment organization */
268 #define CONFIG_ENV_SIZE (8 * 1024)
270 #if defined(CONFIG_ENV_IS_IN_MMC)
272 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-riotboard.dtb"
273 #define CONFIG_SYS_FSL_USDHC_NUM 3
274 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
275 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
276 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
277 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
279 #define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb"
280 #define CONFIG_SYS_FSL_USDHC_NUM 2
281 #define CONFIG_ENV_OFFSET (768 * 1024)
282 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
283 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
284 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
285 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
286 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
289 #ifndef CONFIG_SYS_DCACHE_OFF
290 #define CONFIG_CMD_CACHE
295 #define CONFIG_VIDEO_IPUV3
296 #define CONFIG_CFB_CONSOLE
297 #define CONFIG_VGA_AS_SINGLE_DEVICE
298 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
299 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
300 #define CONFIG_VIDEO_BMP_RLE8
301 #define CONFIG_SPLASH_SCREEN
302 #define CONFIG_SPLASH_SCREEN_ALIGN
303 #define CONFIG_BMP_16BPP
304 #define CONFIG_VIDEO_LOGO
305 #define CONFIG_VIDEO_BMP_LOGO
306 #define CONFIG_IPUV3_CLK 260000000
307 #define CONFIG_IMX_HDMI
308 #define CONFIG_IMX_VIDEO_SKIP
310 #include <config_distro_defaults.h>
312 #endif /* __RIOTBOARD_CONFIG_H */