2 * Common configuration header file for all Keystone II EVM platforms
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_KS2_EVM_H
11 #define __CONFIG_KS2_EVM_H
14 /* U-Boot Build Configuration */
15 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
16 #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
17 #define CONFIG_SYS_CONSOLE_INFO_QUIET
18 #define CONFIG_BOARD_EARLY_INIT_F
19 #define CONFIG_SYS_THUMB_BUILD
21 /* SoC Configuration */
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_SYS_ARCH_TIMER
24 #define CONFIG_SYS_TEXT_BASE 0x0c001000
25 #define CONFIG_SPL_TARGET "u-boot-spi.gph"
26 #define CONFIG_SYS_DCACHE_OFF
28 /* Memory Configuration */
29 #define CONFIG_NR_DRAM_BANKS 2
30 #define CONFIG_SYS_SDRAM_BASE 0x80000000
31 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
32 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
33 #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
34 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */
35 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
36 GENERATED_GBL_DATA_SIZE)
38 /* SPL SPI Loader Configuration */
39 #define CONFIG_SPL_PAD_TO 65536
40 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
41 #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
43 #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
44 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
45 CONFIG_SPL_BSS_MAX_SIZE)
46 #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
47 #define CONFIG_SPL_STACK_SIZE (8 * 1024)
48 #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
49 CONFIG_SYS_SPL_MALLOC_SIZE + \
50 CONFIG_SPL_STACK_SIZE - 4)
51 #define CONFIG_SPL_LIBCOMMON_SUPPORT
52 #define CONFIG_SPL_LIBGENERIC_SUPPORT
53 #define CONFIG_SPL_SERIAL_SUPPORT
54 #define CONFIG_SPL_SPI_FLASH_SUPPORT
55 #define CONFIG_SPL_SPI_SUPPORT
56 #define CONFIG_SPL_BOARD_INIT
57 #define CONFIG_SPL_SPI_LOAD
58 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
59 #define CONFIG_SPL_FRAMEWORK
61 /* UART Configuration */
62 #define CONFIG_SYS_NS16550
63 #define CONFIG_SYS_NS16550_SERIAL
64 #define CONFIG_SYS_NS16550_MEM32
65 #define CONFIG_SYS_NS16550_REG_SIZE -4
66 #define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
67 #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
68 #define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
69 #define CONFIG_CONS_INDEX 1
70 #define CONFIG_BAUDRATE 115200
72 /* SPI Configuration */
74 #define CONFIG_SPI_FLASH_STMICRO
75 #define CONFIG_DAVINCI_SPI
76 #define CONFIG_CMD_SPI
77 #define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6)
78 #define CONFIG_SF_DEFAULT_SPEED 30000000
79 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
80 #define CONFIG_SYS_SPI0
81 #define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
82 #define CONFIG_SYS_SPI0_NUM_CS 4
83 #define CONFIG_SYS_SPI1
84 #define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
85 #define CONFIG_SYS_SPI1_NUM_CS 4
86 #define CONFIG_SYS_SPI2
87 #define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
88 #define CONFIG_SYS_SPI2_NUM_CS 4
90 /* Network Configuration */
92 #define CONFIG_PHY_MARVELL
94 #define CONFIG_BOOTP_DEFAULT
95 #define CONFIG_BOOTP_DNS
96 #define CONFIG_BOOTP_DNS2
97 #define CONFIG_BOOTP_SEND_HOSTNAME
98 #define CONFIG_NET_RETRY_COUNT 32
99 #define CONFIG_SYS_SGMII_REFCLK_MHZ 312
100 #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
101 #define CONFIG_SYS_SGMII_RATESCALE 2
103 /* Keyston Navigator Configuration */
104 #define CONFIG_TI_KSNAV
105 #define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
106 #define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
107 #define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
108 #define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
109 #define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
110 #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
111 #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
112 #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
113 #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
114 #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
115 #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
116 #define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
117 #define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
118 #define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
121 #define CONFIG_KSNAV_PKTDMA_NETCP
122 #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
123 #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
124 #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
125 #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
126 #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
127 #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
128 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
129 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
130 #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
131 #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
132 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
135 #define CONFIG_DRIVER_TI_KEYSTONE_NET
136 #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
137 #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
138 #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
139 #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
140 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
143 #define CONFIG_TI_KEYSTONE_SERDES
146 #define CONFIG_TI_AEMIF
147 #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
149 /* I2C Configuration */
150 #define CONFIG_SYS_I2C
151 #define CONFIG_SYS_I2C_DAVINCI
152 #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
153 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
154 #define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
155 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
156 #define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
157 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
158 #define I2C_BUS_MAX 3
160 /* EEPROM definitions */
161 #define CONFIG_SYS_I2C_MULTI_EEPROMS
162 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
163 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
164 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
165 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
166 #define CONFIG_ENV_EEPROM_IS_ON_I2C
168 /* NAND Configuration */
169 #define CONFIG_NAND_DAVINCI
170 #define CONFIG_KEYSTONE_RBL_NAND
171 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
172 #define CONFIG_SYS_NAND_MASK_CLE 0x4000
173 #define CONFIG_SYS_NAND_MASK_ALE 0x2000
174 #define CONFIG_SYS_NAND_CS 2
175 #define CONFIG_SYS_NAND_USE_FLASH_BBT
176 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
178 #define CONFIG_SYS_NAND_LARGEPAGE
179 #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
180 #define CONFIG_SYS_MAX_NAND_DEVICE 1
181 #define CONFIG_SYS_NAND_MAX_CHIPS 1
182 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
183 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
184 #define CONFIG_ENV_IS_IN_NAND
185 #define CONFIG_ENV_OFFSET 0x100000
186 #define CONFIG_MTD_PARTITIONS
187 #define CONFIG_MTD_DEVICE
188 #define CONFIG_RBTREE
190 #define MTDIDS_DEFAULT "nand0=davinci_nand.0"
191 #define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
192 "1024k(bootloader)ro,512k(params)ro," \
195 /* USB Configuration */
196 #define CONFIG_USB_XHCI
197 #define CONFIG_USB_XHCI_DWC3
198 #define CONFIG_USB_XHCI_KEYSTONE
199 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
200 #define CONFIG_USB_STORAGE
201 #define CONFIG_DOS_PARTITION
202 #define CONFIG_EFI_PARTITION
203 #define CONFIG_FS_FAT
204 #define CONFIG_SYS_CACHELINE_SIZE 64
205 #define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
206 #define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
207 #define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
208 #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
210 /* U-Boot command configuration */
211 #define CONFIG_CMD_ASKENV
212 #define CONFIG_CMD_DHCP
213 #define CONFIG_CMD_I2C
214 #define CONFIG_CMD_PING
215 #define CONFIG_CMD_SAVES
216 #define CONFIG_CMD_MTDPARTS
217 #define CONFIG_CMD_NAND
218 #define CONFIG_CMD_UBI
219 #define CONFIG_CMD_UBIFS
220 #define CONFIG_CMD_SF
221 #define CONFIG_CMD_EEPROM
222 #define CONFIG_CMD_USB
223 #define CONFIG_CMD_FAT
224 #define CONFIG_CMD_FS_GENERIC
226 /* U-Boot general configuration */
227 #define CONFIG_SYS_GENERIC_BOARD
228 #define CONFIG_MISC_INIT_R
229 #define CONFIG_SYS_CBSIZE 1024
230 #define CONFIG_SYS_PBSIZE 2048
231 #define CONFIG_SYS_MAXARGS 16
232 #define CONFIG_SYS_HUSH_PARSER
233 #define CONFIG_SYS_LONGHELP
234 #define CONFIG_CRC32_VERIFY
235 #define CONFIG_MX_CYCLIC
236 #define CONFIG_CMDLINE_EDITING
237 #define CONFIG_VERSION_VARIABLE
238 #define CONFIG_TIMESTAMP
241 #define CONFIG_TI_EDMA3
243 #define CONFIG_BOOTDELAY 3
244 #define CONFIG_BOOTFILE "uImage"
245 #define CONFIG_EXTRA_ENV_SETTINGS \
246 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
249 "nfs_root=/export\0" \
251 "mem_reserve=512M\0" \
252 "addr_fdt=0x87000000\0" \
253 "addr_kern=0x88000000\0" \
254 "addr_uboot=0x87000000\0" \
255 "addr_fs=0x82000000\0" \
256 "addr_ubi=0x82000000\0" \
257 "addr_secdb_key=0xc000000\0" \
258 "fdt_high=0xffffffff\0" \
259 "name_kern=uImage-keystone-evm.bin\0" \
260 "run_mon=mon_install ${addr_mon}\0" \
261 "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
262 "init_net=run args_all args_net\0" \
263 "init_ubi=run args_all args_ubi; " \
264 "ubi part ubifs; ubifsmount ubi:boot;" \
265 "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
266 "get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
267 "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
268 "get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
269 "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
270 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
271 "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
272 "get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0" \
273 "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
274 "sf write ${addr_uboot} 0 ${filesize}\0" \
275 "burn_uboot_nand=nand erase 0 0x100000; " \
276 "nand write ${addr_uboot} 0 ${filesize}\0" \
277 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
278 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
279 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
280 "${nfs_options} ip=dhcp\0" \
281 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
282 "get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0" \
283 "get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0" \
284 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
285 "get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0" \
286 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
287 "burn_ubi=nand erase.part ubifs; " \
288 "nand write ${addr_ubi} ubifs ${filesize}\0" \
289 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
290 "args_ramfs=setenv bootargs ${bootargs} " \
291 "rdinit=/sbin/init rw root=/dev/ram0 " \
292 "initrd=0x802000000,9M\0" \
294 "mtdparts=mtdparts=davinci_nand.0:" \
295 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
297 #define CONFIG_BOOTCOMMAND \
298 "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
299 "get_kern_${boot} run_mon run_kern"
301 #define CONFIG_BOOTARGS \
303 /* Linux interfacing */
304 #define CONFIG_CMDLINE_TAG
305 #define CONFIG_SETUP_MEMORY_TAGS
306 #define CONFIG_OF_LIBFDT 1
307 #define CONFIG_OF_BOARD_SETUP
308 #define CONFIG_SYS_BARGSIZE 1024
309 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
310 #define CONFIG_LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
312 #define CONFIG_SUPPORT_RAW_INITRD
314 /* we may include files below only after all above definitions */
315 #include <asm/arch/hardware.h>
316 #include <asm/arch/clock.h>
317 #define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
319 #endif /* __CONFIG_KS2_EVM_H */