2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_MX51 /* in a mx51 */
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DISPLAY_BOARDINFO
21 #define CONFIG_SYS_FSL_CLK
22 #define CONFIG_SYS_TEXT_BASE 0x97800000
24 #include <asm/arch/imx-regs.h>
26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_REVISION_TAG
31 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
33 * Size of malloc() pool
35 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
37 #define CONFIG_BOARD_LATE_INIT
42 #define CONFIG_FSL_IIM
43 #define CONFIG_CMD_FUSE
45 #define CONFIG_MXC_UART
46 #define CONFIG_MXC_UART_BASE UART1_BASE
47 #define CONFIG_MXC_GPIO
53 #define CONFIG_MXC_SPI
57 #define CONFIG_POWER_SPI
58 #define CONFIG_POWER_FSL
59 #define CONFIG_FSL_PMIC_BUS 0
60 #define CONFIG_FSL_PMIC_CS 0
61 #define CONFIG_FSL_PMIC_CLK 2500000
62 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
63 #define CONFIG_FSL_PMIC_BITLEN 32
64 #define CONFIG_RTC_MC13XXX
69 #define CONFIG_FSL_ESDHC
70 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
71 #define CONFIG_SYS_FSL_ESDHC_NUM 2
75 #define CONFIG_GENERIC_MMC
76 #define CONFIG_DOS_PARTITION
83 #define CONFIG_FEC_MXC
84 #define IMX_FEC_BASE FEC_BASE_ADDR
85 #define CONFIG_FEC_MXC_PHYADDR 0x1F
88 #define CONFIG_USB_EHCI
89 #define CONFIG_USB_EHCI_MX5
90 #define CONFIG_USB_STORAGE
91 #define CONFIG_USB_HOST_ETHER
92 #define CONFIG_USB_ETHER_ASIX
93 #define CONFIG_USB_ETHER_SMSC95XX
94 #define CONFIG_MXC_USB_PORT 1
95 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
96 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
98 /* Framebuffer and LCD */
99 #define CONFIG_PREBOOT
101 #define CONFIG_VIDEO_IPUV3
102 #define CONFIG_CFB_CONSOLE
103 #define CONFIG_VGA_AS_SINGLE_DEVICE
104 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
105 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
106 #define CONFIG_VIDEO_BMP_RLE8
107 #define CONFIG_SPLASH_SCREEN
108 #define CONFIG_BMP_16BPP
109 #define CONFIG_VIDEO_LOGO
110 #define CONFIG_IPUV3_CLK 133000000
112 /* allow to overwrite serial and ethaddr */
113 #define CONFIG_ENV_OVERWRITE
114 #define CONFIG_CONS_INDEX 1
115 #define CONFIG_BAUDRATE 115200
117 /***********************************************************
119 ***********************************************************/
121 #define CONFIG_CMD_DATE
123 #define CONFIG_BOOTDELAY 1
125 #define CONFIG_ETHPRIME "FEC0"
127 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
129 #define CONFIG_EXTRA_ENV_SETTINGS \
130 "script=boot.scr\0" \
132 "fdt_file=imx51-babbage.dtb\0" \
133 "fdt_addr=0x91000000\0" \
138 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
139 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
140 "root=${mmcroot}\0" \
142 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
143 "bootscript=echo Running bootscript from mmc ...; " \
145 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
146 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
147 "mmcboot=echo Booting from mmc ...; " \
149 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
150 "if run loadfdt; then " \
151 "bootz ${loadaddr} - ${fdt_addr}; " \
153 "if test ${boot_fdt} = try; then " \
156 "echo WARN: Cannot load the DT; " \
162 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
164 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
165 "netboot=echo Booting from net ...; " \
167 "if test ${ip_dyn} = yes; then " \
168 "setenv get_cmd dhcp; " \
170 "setenv get_cmd tftp; " \
172 "${get_cmd} ${image}; " \
173 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
174 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
175 "bootz ${loadaddr} - ${fdt_addr}; " \
177 "if test ${boot_fdt} = try; then " \
180 "echo ERROR: Cannot load the DT; " \
188 #define CONFIG_BOOTCOMMAND \
189 "mmc dev ${mmcdev}; if mmc rescan; then " \
190 "if run loadbootscript; then " \
193 "if run loadimage; then " \
195 "else run netboot; " \
198 "else run netboot; fi"
200 #define CONFIG_ARP_TIMEOUT 200UL
203 * Miscellaneous configurable options
205 #define CONFIG_SYS_LONGHELP /* undef to save memory */
206 #define CONFIG_AUTO_COMPLETE
207 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
208 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
209 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
211 #define CONFIG_SYS_MEMTEST_START 0x90000000
212 #define CONFIG_SYS_MEMTEST_END 0x90010000
214 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
216 #define CONFIG_CMDLINE_EDITING
218 /*-----------------------------------------------------------------------
219 * Physical Memory Map
221 #define CONFIG_NR_DRAM_BANKS 1
222 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
223 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
225 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
226 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
227 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
229 #define CONFIG_BOARD_EARLY_INIT_F
231 #define CONFIG_SYS_INIT_SP_OFFSET \
232 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
233 #define CONFIG_SYS_INIT_SP_ADDR \
234 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
236 #define CONFIG_SYS_DDR_CLKSEL 0
237 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
238 #define CONFIG_SYS_MAIN_PWR_ON
240 /*-----------------------------------------------------------------------
241 * FLASH and environment organization
243 #define CONFIG_SYS_NO_FLASH
245 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
246 #define CONFIG_ENV_SIZE (8 * 1024)
247 #define CONFIG_ENV_IS_IN_MMC
248 #define CONFIG_SYS_MMC_ENV_DEV 0