2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53-ARM2-DDR3 Freescale board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx53.h>
27 /* High Level Configuration Options */
28 #define CONFIG_ARMV7 /* This is armv7 Cortex-A8 CPU core */
31 #define CONFIG_MX53_ARM2_DDR3
32 #define CONFIG_FLASH_HEADER
33 #define CONFIG_FLASH_HEADER_OFFSET 0x400
35 #define CONFIG_SKIP_RELOCATE_UBOOT
37 #define CONFIG_ARCH_CPU_INIT
38 #define CONFIG_ARCH_MMU
40 #define CONFIG_MX53_HCLK_FREQ 24000000
41 #define CONFIG_SYS_PLL2_FREQ 400
42 #define CONFIG_SYS_AHB_PODF 2
43 #define CONFIG_SYS_AXIA_PODF 0
44 #define CONFIG_SYS_AXIB_PODF 1
46 #define CONFIG_DISPLAY_CPUINFO
47 #define CONFIG_DISPLAY_BOARDINFO
49 #define CONFIG_SYS_64BIT_VSPRINTF
51 #define BOARD_LATE_INIT
53 * Disabled for now due to build problems under Debian and a significant
54 * increase in the final file size: 144260 vs. 109536 Bytes.
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_REVISION_TAG 1
59 #define CONFIG_SETUP_MEMORY_TAGS 1
60 #define CONFIG_INITRD_TAG 1
63 * Size of malloc() pool
65 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
66 /* size in bytes reserved for initial data */
67 #define CONFIG_SYS_GBL_DATA_SIZE 128
72 #define CONFIG_MX53_UART 1
73 #define CONFIG_MX53_UART1 1
75 /* allow to overwrite serial and ethaddr */
76 #define CONFIG_ENV_OVERWRITE
77 #define CONFIG_CONS_INDEX 1
78 #define CONFIG_BAUDRATE 115200
79 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
81 /***********************************************************
83 ***********************************************************/
85 #include <config_cmd_default.h>
87 #define CONFIG_CMD_PING
88 #define CONFIG_CMD_DHCP
89 #define CONFIG_CMD_MII
90 #define CONFIG_CMD_NET
91 #define CONFIG_NET_RETRY_COUNT 100
92 #define CONFIG_NET_MULTI 1
93 #define CONFIG_BOOTP_SUBNETMASK
94 #define CONFIG_BOOTP_GATEWAY
95 #define CONFIG_BOOTP_DNS
97 #define CONFIG_CMD_MMC
98 #define CONFIG_CMD_ENV
100 #define CONFIG_CMD_IIM
102 #define CONFIG_CMD_CLOCK
103 #define CONFIG_REF_CLK_FREQ CONFIG_MX53_HCLK_FREQ
105 #undef CONFIG_CMD_IMLS
107 #define CONFIG_BOOTDELAY 3
109 #define CONFIG_PRIME "FEC0"
111 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
112 #define CONFIG_RD_LOADADDR (CONFIG_LOADADDR + 0x300000)
114 #define CONFIG_EXTRA_ENV_SETTINGS \
117 "uboot=u-boot.bin\0" \
119 "nfsroot=/opt/eldk/arm\0" \
120 "bootargs_base=setenv bootargs console=ttymxc0,115200\0"\
121 "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
122 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
123 "bootcmd_net=run bootargs_base bootargs_nfs; " \
124 "tftpboot ${loadaddr} ${kernel}; bootm\0" \
125 "bootargs_mmc=setenv bootargs ${bootargs} ip=dhcp " \
126 "root=/dev/mmcblk0p2 rootwait\0" \
127 "bootcmd_mmc=run bootargs_base bootargs_mmc; bootm\0" \
128 "bootcmd=run bootcmd_net\0" \
131 #define CONFIG_ARP_TIMEOUT 200UL
134 * Miscellaneous configurable options
136 #define CONFIG_SYS_LONGHELP /* undef to save memory */
137 #define CONFIG_SYS_PROMPT "ARM2-DDR3 U-Boot > "
138 #define CONFIG_AUTO_COMPLETE
139 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
140 /* Print Buffer Size */
141 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
142 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
143 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
145 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
146 #define CONFIG_SYS_MEMTEST_END 0x10000
148 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
150 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152 #define CONFIG_SYS_HZ 1000
154 #define CONFIG_CMDLINE_EDITING 1
156 #define CONFIG_FEC0_IOBASE FEC_BASE_ADDR
157 #define CONFIG_FEC0_PINMUX -1
158 #define CONFIG_FEC0_PHY_ADDR -1
159 #define CONFIG_FEC0_MIIBASE -1
161 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
162 #define CONFIG_IIM_MAC_ADDR_OFFSET 0x24
164 #define CONFIG_MXC_FEC
166 #define CONFIG_MII_GASKET
167 #define CONFIG_DISCOVER_PHY
172 #ifdef CONFIG_CMD_MMC
173 #define CONFIG_IMX_IIM
174 #define IMX_IIM_BASE IIM_BASE_ADDR
175 #define CONFIG_IIM_MAC_BANK 1
176 #define CONFIG_IIM_MAC_ROW 9
182 #define CONFIG_CMD_I2C 1
183 #define CONFIG_HARD_I2C 1
184 #define CONFIG_I2C_MXC 1
185 #define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
186 #define CONFIG_SYS_I2C_SPEED 100000
187 #define CONFIG_SYS_I2C_SLAVE 0xfe
193 #define CONFIG_FSL_SF 1
194 #define CONFIG_CMD_SPI
195 #define CONFIG_CMD_SF
196 #define CONFIG_SPI_FLASH_IMX_ATMEL 1
197 #define CONFIG_SPI_FLASH_CS 1
198 #define CONFIG_IMX_ECSPI
199 #define IMX_CSPI_VER_2_3 1
200 #define MAX_SPI_BYTES (64 * 4)
205 #ifdef CONFIG_CMD_MMC
207 #define CONFIG_GENERIC_MMC
208 #define CONFIG_IMX_MMC
209 #define CONFIG_SYS_FSL_ESDHC_NUM 2
210 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
211 #define CONFIG_SYS_MMC_ENV_DEV 1
212 #define CONFIG_DOS_PARTITION 1
213 #define CONFIG_CMD_FAT 1
214 #define CONFIG_CMD_EXT2 1
216 /*-----------------------------------------------------------------------
219 * The stack sizes are set up in start.S using the settings below
221 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
223 /*-----------------------------------------------------------------------
224 * Physical Memory Map
226 #define CONFIG_NR_DRAM_BANKS 1
227 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
228 #define PHYS_SDRAM_1_SIZE (1024 * 1024 * 1024)
229 #define iomem_valid_addr(addr, size) \
230 (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
232 /*-----------------------------------------------------------------------
233 * FLASH and environment organization
235 #define CONFIG_SYS_NO_FLASH
237 /* Monitor at beginning of flash */
238 #define CONFIG_FSL_ENV_IN_MMC
240 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
241 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
243 #if defined(CONFIG_FSL_ENV_IN_NAND)
244 #define CONFIG_ENV_IS_IN_NAND 1
245 #define CONFIG_ENV_OFFSET 0x100000
246 #elif defined(CONFIG_FSL_ENV_IN_MMC)
247 #define CONFIG_ENV_IS_IN_MMC 1
248 #define CONFIG_ENV_OFFSET (768 * 1024)
249 #elif defined(CONFIG_FSL_ENV_IN_SF)
250 #define CONFIG_ENV_IS_IN_SPI_FLASH 1
251 #define CONFIG_ENV_SPI_CS 1
252 #define CONFIG_ENV_OFFSET (768 * 1024)
254 #define CONFIG_ENV_IS_NOWHERE 1
256 #endif /* __CONFIG_H */