2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __MX6QSABRESD_CONFIG_H
10 #define __MX6QSABRESD_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
16 #define CONFIG_SPL_LIBCOMMON_SUPPORT
17 #define CONFIG_SPL_MMC_SUPPORT
21 #define CONFIG_MACH_TYPE 3980
22 #define CONFIG_MXC_UART_BASE UART1_BASE
23 #define CONFIG_CONSOLE_DEV "ttymxc0"
24 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
25 #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
26 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
28 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
30 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
32 #include "mx6sabre_common.h"
34 #define CONFIG_SYS_FSL_USDHC_NUM 3
35 #if defined(CONFIG_ENV_IS_IN_MMC)
36 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
39 #define CONFIG_CMD_PCI
42 #define CONFIG_PCI_PNP
43 #define CONFIG_PCI_SCAN_SHOW
44 #define CONFIG_PCIE_IMX
45 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
46 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
50 #define CONFIG_CMD_I2C
51 #define CONFIG_SYS_I2C
52 #define CONFIG_SYS_I2C_MXC
53 #define CONFIG_SYS_I2C_SPEED 100000
57 #define CONFIG_POWER_I2C
58 #define CONFIG_POWER_PFUZE100
59 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
62 #define CONFIG_CMD_USB
64 #define CONFIG_USB_EHCI
65 #define CONFIG_USB_EHCI_MX6
66 #define CONFIG_USB_STORAGE
67 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
68 #define CONFIG_USB_HOST_ETHER
69 #define CONFIG_USB_ETHER_ASIX
70 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
71 #define CONFIG_MXC_USB_FLAGS 0
72 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
75 #endif /* __MX6QSABRESD_CONFIG_H */