2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SX Sabresd board.
6 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
14 #include <linux/sizes.h>
15 #include "mx6_common.h"
17 #define CONFIG_DISPLAY_CPUINFO
18 #define CONFIG_DISPLAY_BOARDINFO
20 #define CONFIG_CMDLINE_TAG
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
24 #define CONFIG_SYS_GENERIC_BOARD
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_MXC_GPIO
32 #define CONFIG_MXC_UART
33 #define CONFIG_MXC_UART_BASE UART1_BASE
35 /* allow to overwrite serial and ethaddr */
36 #define CONFIG_ENV_OVERWRITE
37 #define CONFIG_CONS_INDEX 1
38 #define CONFIG_BAUDRATE 115200
40 /* Command definition */
41 #include <config_cmd_default.h>
43 #undef CONFIG_CMD_IMLS
45 #define CONFIG_BOOTDELAY 3
47 #define CONFIG_LOADADDR 0x80800000
48 #define CONFIG_SYS_TEXT_BASE 0x87800000
50 #define CONFIG_EXTRA_ENV_SETTINGS \
54 "fdt_high=0xffffffff\0" \
55 "initrd_high=0xffffffff\0" \
56 "fdt_file=imx6sx-sdb.dtb\0" \
57 "fdt_addr=0x88000000\0" \
62 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
63 "mmcargs=setenv bootargs console=${console},${baudrate} " \
66 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
67 "bootscript=echo Running bootscript from mmc ...; " \
69 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
70 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
71 "mmcboot=echo Booting from mmc ...; " \
73 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
74 "if run loadfdt; then " \
75 "bootz ${loadaddr} - ${fdt_addr}; " \
77 "if test ${boot_fdt} = try; then " \
80 "echo WARN: Cannot load the DT; " \
86 "netargs=setenv bootargs console=${console},${baudrate} " \
88 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
89 "netboot=echo Booting from net ...; " \
91 "if test ${ip_dyn} = yes; then " \
92 "setenv get_cmd dhcp; " \
94 "setenv get_cmd tftp; " \
96 "${get_cmd} ${image}; " \
97 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
98 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
99 "bootz ${loadaddr} - ${fdt_addr}; " \
101 "if test ${boot_fdt} = try; then " \
104 "echo WARN: Cannot load the DT; " \
111 #define CONFIG_BOOTCOMMAND \
112 "mmc dev ${mmcdev};" \
113 "mmc dev ${mmcdev}; if mmc rescan; then " \
114 "if run loadbootscript; then " \
117 "if run loadimage; then " \
119 "else run netboot; " \
122 "else run netboot; fi"
124 /* Miscellaneous configurable options */
125 #define CONFIG_SYS_LONGHELP
126 #define CONFIG_SYS_HUSH_PARSER
127 #define CONFIG_AUTO_COMPLETE
128 #define CONFIG_SYS_CBSIZE 1024
130 /* Print Buffer Size */
131 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
132 #define CONFIG_SYS_MAXARGS 256
133 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
135 #define CONFIG_SYS_MEMTEST_START 0x80000000
136 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
138 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
140 #define CONFIG_CMDLINE_EDITING
141 #define CONFIG_STACKSIZE SZ_128K
143 /* Physical Memory Map */
144 #define CONFIG_NR_DRAM_BANKS 1
145 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
146 #define PHYS_SDRAM_SIZE SZ_1G
148 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
149 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
150 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
152 #define CONFIG_SYS_INIT_SP_OFFSET \
153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154 #define CONFIG_SYS_INIT_SP_ADDR \
155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
157 /* MMC Configuration */
158 #define CONFIG_FSL_ESDHC
159 #define CONFIG_FSL_USDHC
160 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
163 #define CONFIG_CMD_MMC
164 #define CONFIG_GENERIC_MMC
165 #define CONFIG_BOUNCE_BUFFER
166 #define CONFIG_CMD_EXT2
167 #define CONFIG_CMD_FAT
168 #define CONFIG_DOS_PARTITION
171 #define CONFIG_CMD_I2C
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_I2C_MXC
174 #define CONFIG_SYS_I2C_SPEED 100000
178 #define CONFIG_POWER_I2C
179 #define CONFIG_POWER_PFUZE100
180 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
183 #define CONFIG_CMD_PING
184 #define CONFIG_CMD_DHCP
185 #define CONFIG_CMD_MII
186 #define CONFIG_CMD_NET
187 #define CONFIG_FEC_MXC
190 #define IMX_FEC_BASE ENET_BASE_ADDR
191 #define CONFIG_FEC_MXC_PHYADDR 0x1
193 #define CONFIG_FEC_XCV_TYPE RGMII
194 #define CONFIG_ETHPRIME "FEC"
196 #define CONFIG_PHYLIB
197 #define CONFIG_PHY_ATHEROS
200 #define CONFIG_CMD_USB
201 #ifdef CONFIG_CMD_USB
202 #define CONFIG_USB_EHCI
203 #define CONFIG_USB_EHCI_MX6
204 #define CONFIG_USB_STORAGE
205 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
206 #define CONFIG_USB_HOST_ETHER
207 #define CONFIG_USB_ETHER_ASIX
208 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
209 #define CONFIG_MXC_USB_FLAGS 0
210 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
213 #define CONFIG_CMD_PCI
214 #ifdef CONFIG_CMD_PCI
216 #define CONFIG_PCI_PNP
217 #define CONFIG_PCI_SCAN_SHOW
218 #define CONFIG_PCIE_IMX
219 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
220 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
224 #define CONFIG_DM_THERMAL
225 #define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
226 #define CONFIG_IMX6_THERMAL
228 #define CONFIG_CMD_FUSE
229 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
230 #define CONFIG_MXC_OCOTP
233 /* FLASH and environment organization */
234 #define CONFIG_SYS_NO_FLASH
236 #define CONFIG_CMD_TIME
238 #define CONFIG_FSL_QSPI
240 #ifdef CONFIG_FSL_QSPI
241 #define CONFIG_CMD_SF
242 #define CONFIG_SPI_FLASH
243 #define CONFIG_SPI_FLASH_BAR
244 #define CONFIG_SPI_FLASH_SPANSION
245 #define CONFIG_SPI_FLASH_STMICRO
246 #define CONFIG_SYS_FSL_QSPI_LE
247 #define CONFIG_SYS_FSL_QSPI_AHB
248 #ifdef CONFIG_MX6SX_SABRESD_REVA
249 #define FSL_QSPI_FLASH_SIZE SZ_16M
251 #define FSL_QSPI_FLASH_SIZE SZ_32M
253 #define FSL_QSPI_FLASH_NUM 2
256 #define CONFIG_ENV_OFFSET (6 * SZ_64K)
257 #define CONFIG_ENV_SIZE SZ_8K
258 #define CONFIG_ENV_IS_IN_MMC
260 #define CONFIG_OF_LIBFDT
261 #define CONFIG_CMD_BOOTZ
263 #ifndef CONFIG_SYS_DCACHE_OFF
264 #define CONFIG_CMD_CACHE
267 #define CONFIG_SYS_FSL_USDHC_NUM 3
268 #if defined(CONFIG_ENV_IS_IN_MMC)
269 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/
272 #endif /* __CONFIG_H */