2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 #ifndef __CONFIGS_MXS_H__
20 #define __CONFIGS_MXS_H__
26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
32 #include <asm/arch/regs-base.h>
34 #if defined(CONFIG_MX23)
35 #include <asm/arch/iomux-mx23.h>
36 #elif defined(CONFIG_MX28)
37 #include <asm/arch/iomux-mx28.h>
44 /* Ticks per second */
45 #define CONFIG_SYS_HZ 1000
48 #define CONFIG_OF_LIBFDT
51 #define CONFIG_BOARD_EARLY_INIT_F
52 #define CONFIG_ARCH_MISC_INIT
56 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
57 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
58 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
59 #define CONFIG_SPL_LIBCOMMON_SUPPORT
60 #define CONFIG_SPL_LIBGENERIC_SUPPORT
61 #define CONFIG_SPL_GPIO_SUPPORT
64 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
65 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
66 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
67 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
69 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
70 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
71 #if defined(CONFIG_MX23)
72 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
73 #elif defined(CONFIG_MX28)
74 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
77 /* Point initial SP in SRAM so SPL can use it too. */
78 #define CONFIG_SYS_INIT_SP_OFFSET \
79 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
80 #define CONFIG_SYS_INIT_SP_ADDR \
81 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
85 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
86 * binary. In case there was more of this mess, 0x100 bytes are skipped.
88 #define CONFIG_SYS_TEXT_BASE 0x40000100
90 /* U-Boot general configuration */
91 #define CONFIG_SYS_LONGHELP
92 #ifndef CONFIG_SYS_PROMPT
94 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
95 #define CONFIG_SYS_PBSIZE \
96 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
97 /* Print buffer size */
98 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
99 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
100 /* Boot argument buffer size */
101 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
102 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
103 #define CONFIG_CMDLINE_EDITING /* Command history etc */
104 #define CONFIG_SYS_HUSH_PARSER
105 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
108 #define CONFIG_CMDLINE_TAG
109 #define CONFIG_SETUP_MEMORY_TAGS
116 #define CONFIG_APBH_DMA
119 #define CONFIG_MXS_GPIO
122 * DUART Serial Driver.
123 * Conflicts with AUART driver which can be set by board.
125 #ifndef CONFIG_MXS_AUART
126 #define CONFIG_PL011_SERIAL
127 #define CONFIG_PL011_CLOCK 24000000
128 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
129 #define CONFIG_CONS_INDEX 0
131 /* Default baudrate can be overriden by board! */
132 #ifndef CONFIG_BAUDRATE
133 #define CONFIG_BAUDRATE 115200
136 /* FEC Ethernet on SoC */
137 #ifdef CONFIG_FEC_MXC
139 #ifndef CONFIG_ETHPRIME
140 #define CONFIG_ETHPRIME "FEC0"
142 #ifndef CONFIG_FEC_XCV_TYPE
143 #define CONFIG_FEC_XCV_TYPE RMII
148 #ifdef CONFIG_CMD_I2C
149 #define CONFIG_I2C_MXS
150 #define CONFIG_HARD_I2C
151 #ifndef CONFIG_SYS_I2C_SPEED
152 #define CONFIG_SYS_I2C_SPEED 400000
158 #define CONFIG_CFB_CONSOLE
159 #define CONFIG_VIDEO_MXS
160 #define CONFIG_VIDEO_SW_CURSOR
161 #define CONFIG_VGA_AS_SINGLE_DEVICE
162 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
166 #ifdef CONFIG_CMD_MMC
168 #define CONFIG_GENERIC_MMC
169 #define CONFIG_BOUNCE_BUFFER
170 #define CONFIG_MXS_MMC
174 #ifdef CONFIG_CMD_NAND
175 #define CONFIG_NAND_MXS
176 #define CONFIG_SYS_MAX_NAND_DEVICE 1
177 #define CONFIG_SYS_NAND_BASE 0x60000000
178 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
182 #ifdef CONFIG_CMD_SPI
183 #define CONFIG_HARD_SPI
184 #define CONFIG_MXS_SPI
185 #define CONFIG_SPI_HALF_DUPLEX
189 #ifdef CONFIG_CMD_USB
190 #define CONFIG_USB_EHCI
191 #define CONFIG_USB_EHCI_MXS
192 #define CONFIG_EHCI_IS_TDI
195 #endif /* __CONFIGS_MXS_H__ */