2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
12 #define CONFIG_DISPLAY_CPUINFO
13 #define CONFIG_DISPLAY_BOARDINFO
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
18 #define CONFIG_CMDLINE_TAG
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
22 #define CONFIG_SYS_GENERIC_BOARD
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_MISC_INIT_R
29 #define CONFIG_MXC_GPIO
32 #define CONFIG_CMD_FUSE
33 #define CONFIG_MXC_OCOTP
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_BASE
42 #define CONFIG_SPI_FLASH
43 #define CONFIG_SPI_FLASH_STMICRO
44 #define CONFIG_SPI_FLASH_WINBOND
45 #define CONFIG_SPI_FLASH_MACRONIX
46 #define CONFIG_SPI_FLASH_SST
47 #define CONFIG_MXC_SPI
48 #define CONFIG_SF_DEFAULT_BUS 2
49 #define CONFIG_SF_DEFAULT_CS 0
50 #define CONFIG_SF_DEFAULT_SPEED 25000000
51 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
54 #define CONFIG_PCA953X
55 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
56 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
57 #define CONFIG_CMD_PCA953X
58 #define CONFIG_CMD_PCA953X_INFO
61 #define CONFIG_CMD_I2C
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_I2C_MXC
64 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
65 #define CONFIG_SYS_I2C_SPEED 100000
68 #define CONFIG_CMD_IMXOTP
69 #define CONFIG_IMX_OTP
70 #define IMX_OTP_BASE OCOTP_BASE_ADDR
71 #define IMX_OTP_ADDR_MAX 0x7F
72 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
73 #define IMX_OTPWRITE_ENABLED
76 #define CONFIG_FSL_ESDHC
77 #define CONFIG_FSL_USDHC
78 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
79 #define CONFIG_SYS_FSL_USDHC_NUM 2
82 #define CONFIG_CMD_MMC
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_BOUNCE_BUFFER
87 #define CONFIG_CMD_USB
88 #define CONFIG_USB_STORAGE
89 #define CONFIG_USB_EHCI
90 #define CONFIG_USB_EHCI_MX6
91 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
92 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
94 #define CONFIG_CMD_SATA
100 #ifdef CONFIG_CMD_SATA
101 #define CONFIG_DWC_AHSATA
102 #define CONFIG_SYS_SATA_MAX_DEVICE 1
103 #define CONFIG_DWC_AHSATA_PORT_ID 0
104 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
106 #define CONFIG_LIBATA
112 #include "imx6_spl.h"
113 #define CONFIG_SPL_SPI_SUPPORT
114 #define CONFIG_SPL_LIBCOMMON_SUPPORT
115 #define CONFIG_SPL_SPI_FLASH_SUPPORT
116 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
117 #define CONFIG_SPL_SPI_LOAD
120 #define CONFIG_CMD_PING
121 #define CONFIG_CMD_DHCP
122 #define CONFIG_CMD_MII
123 #define CONFIG_CMD_NET
124 #define CONFIG_FEC_MXC
126 #define IMX_FEC_BASE ENET_BASE_ADDR
127 #define CONFIG_FEC_XCV_TYPE MII100
128 #define CONFIG_ETHPRIME "FEC"
129 #define CONFIG_FEC_MXC_PHYADDR 0x5
130 #define CONFIG_PHYLIB
131 #define CONFIG_PHY_SMSC
134 #define CONFIG_CMD_EEPROM
135 #define CONFIG_ENV_EEPROM_IS_ON_I2C
136 #define CONFIG_SYS_I2C_EEPROM_BUS 1
137 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
138 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
139 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
140 #define CONFIG_SYS_I2C_MULTI_EEPROMS
143 /* Miscellaneous commands */
144 #define CONFIG_CMD_BMODE
145 #define CONFIG_CMD_SETEXPR
147 /* allow to overwrite serial and ethaddr */
148 #define CONFIG_ENV_OVERWRITE
149 #define CONFIG_CONS_INDEX 1
150 #define CONFIG_BAUDRATE 115200
152 /* Command definition */
153 #include <config_cmd_default.h>
155 #undef CONFIG_CMD_IMLS
157 #define CONFIG_BOOTDELAY 2
159 #define CONFIG_PREBOOT ""
161 #define CONFIG_LOADADDR 0x12000000
162 #define CONFIG_SYS_TEXT_BASE 0x17800000
164 /* Miscellaneous configurable options */
165 #define CONFIG_SYS_LONGHELP
166 #define CONFIG_SYS_HUSH_PARSER
167 #define CONFIG_SYS_CBSIZE 1024
169 /* Print Buffer Size */
170 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
171 #define CONFIG_SYS_MAXARGS 16
172 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
174 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
176 #define CONFIG_CMDLINE_EDITING
178 /* Physical Memory Map */
179 #define CONFIG_NR_DRAM_BANKS 1
180 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
182 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
183 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
184 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
186 #define CONFIG_SYS_INIT_SP_OFFSET \
187 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
188 #define CONFIG_SYS_INIT_SP_ADDR \
189 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
191 /* FLASH and environment organization */
192 #define CONFIG_SYS_NO_FLASH
194 #define CONFIG_ENV_IS_IN_SPI_FLASH
195 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
196 #define CONFIG_ENV_OFFSET (1024 * 1024)
197 /* M25P16 has an erase size of 64 KiB */
198 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
199 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
200 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
201 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
202 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
204 #define CONFIG_OF_LIBFDT
205 #define CONFIG_CMD_BOOTZ
207 #ifndef CONFIG_SYS_DCACHE_OFF
208 #define CONFIG_CMD_CACHE
211 #define CONFIG_CMD_BOOTZ
212 #define CONFIG_SUPPORT_RAW_INITRD
215 #define CONFIG_CMD_EXT3
216 #define CONFIG_CMD_EXT4
217 #define CONFIG_DOS_PARTITION
218 #define CONFIG_CMD_FS_GENERIC
219 #define CONFIG_LIB_UUID
220 #define CONFIG_CMD_FS_UUID
222 #define CONFIG_BOOTP_SERVERIP
223 #define CONFIG_BOOTP_BOOTFILE
225 #endif /* __CONFIG_H */