2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
12 #define CONFIG_DISPLAY_CPUINFO
13 #define CONFIG_DISPLAY_BOARDINFO
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
18 #define CONFIG_CMDLINE_TAG
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
22 #define CONFIG_SYS_GENERIC_BOARD
24 /* Size of malloc() pool */
25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_MISC_INIT_R
29 #define CONFIG_MXC_GPIO
32 #define CONFIG_CMD_FUSE
33 #define CONFIG_MXC_OCOTP
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_BASE
42 #define CONFIG_SPI_FLASH
43 #define CONFIG_SPI_FLASH_STMICRO
44 #define CONFIG_SPI_FLASH_WINBOND
45 #define CONFIG_SPI_FLASH_MACRONIX
46 #define CONFIG_SPI_FLASH_SST
47 #define CONFIG_MXC_SPI
48 #define CONFIG_SF_DEFAULT_BUS 2
49 #define CONFIG_SF_DEFAULT_CS 0
50 #define CONFIG_SF_DEFAULT_SPEED 25000000
51 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
54 #define CONFIG_PCA953X
55 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
56 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
57 #define CONFIG_CMD_PCA953X
58 #define CONFIG_CMD_PCA953X_INFO
61 #define CONFIG_CMD_I2C
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_I2C_MXC
64 #define CONFIG_SYS_I2C_SPEED 100000
67 #define CONFIG_CMD_IMXOTP
68 #define CONFIG_IMX_OTP
69 #define IMX_OTP_BASE OCOTP_BASE_ADDR
70 #define IMX_OTP_ADDR_MAX 0x7F
71 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
72 #define IMX_OTPWRITE_ENABLED
75 #define CONFIG_FSL_ESDHC
76 #define CONFIG_FSL_USDHC
77 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
78 #define CONFIG_SYS_FSL_USDHC_NUM 2
81 #define CONFIG_CMD_MMC
82 #define CONFIG_GENERIC_MMC
83 #define CONFIG_BOUNCE_BUFFER
86 #define CONFIG_CMD_USB
87 #define CONFIG_USB_STORAGE
88 #define CONFIG_USB_EHCI
89 #define CONFIG_USB_EHCI_MX6
90 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
91 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
93 #define CONFIG_CMD_SATA
99 #ifdef CONFIG_CMD_SATA
100 #define CONFIG_DWC_AHSATA
101 #define CONFIG_SYS_SATA_MAX_DEVICE 1
102 #define CONFIG_DWC_AHSATA_PORT_ID 0
103 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
105 #define CONFIG_LIBATA
111 #include "imx6_spl.h"
112 #define CONFIG_SPL_SPI_SUPPORT
113 #define CONFIG_SPL_LIBCOMMON_SUPPORT
114 #define CONFIG_SPL_SPI_FLASH_SUPPORT
115 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
116 #define CONFIG_SPL_SPI_LOAD
119 #define CONFIG_CMD_PING
120 #define CONFIG_CMD_DHCP
121 #define CONFIG_CMD_MII
122 #define CONFIG_CMD_NET
123 #define CONFIG_FEC_MXC
125 #define IMX_FEC_BASE ENET_BASE_ADDR
126 #define CONFIG_FEC_XCV_TYPE MII100
127 #define CONFIG_ETHPRIME "FEC"
128 #define CONFIG_FEC_MXC_PHYADDR 0x5
129 #define CONFIG_PHYLIB
130 #define CONFIG_PHY_SMSC
133 #define CONFIG_CMD_EEPROM
134 #define CONFIG_ENV_EEPROM_IS_ON_I2C
135 #define CONFIG_SYS_I2C_EEPROM_BUS 1
136 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
137 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
138 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
139 #define CONFIG_SYS_I2C_MULTI_EEPROMS
142 /* Miscellaneous commands */
143 #define CONFIG_CMD_BMODE
144 #define CONFIG_CMD_SETEXPR
146 /* allow to overwrite serial and ethaddr */
147 #define CONFIG_ENV_OVERWRITE
148 #define CONFIG_CONS_INDEX 1
149 #define CONFIG_BAUDRATE 115200
151 /* Command definition */
152 #include <config_cmd_default.h>
154 #undef CONFIG_CMD_IMLS
156 #define CONFIG_BOOTDELAY 2
158 #define CONFIG_PREBOOT ""
160 #define CONFIG_LOADADDR 0x12000000
161 #define CONFIG_SYS_TEXT_BASE 0x17800000
163 /* Miscellaneous configurable options */
164 #define CONFIG_SYS_LONGHELP
165 #define CONFIG_SYS_HUSH_PARSER
166 #define CONFIG_SYS_CBSIZE 1024
168 /* Print Buffer Size */
169 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
170 #define CONFIG_SYS_MAXARGS 16
171 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
173 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
175 #define CONFIG_CMDLINE_EDITING
177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 1
179 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
181 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
182 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
183 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
185 #define CONFIG_SYS_INIT_SP_OFFSET \
186 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
187 #define CONFIG_SYS_INIT_SP_ADDR \
188 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
190 /* FLASH and environment organization */
191 #define CONFIG_SYS_NO_FLASH
193 #define CONFIG_ENV_IS_IN_SPI_FLASH
194 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
195 #define CONFIG_ENV_OFFSET (1024 * 1024)
196 /* M25P16 has an erase size of 64 KiB */
197 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
198 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
199 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
200 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
201 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
203 #define CONFIG_OF_LIBFDT
204 #define CONFIG_CMD_BOOTZ
206 #ifndef CONFIG_SYS_DCACHE_OFF
207 #define CONFIG_CMD_CACHE
210 #define CONFIG_CMD_BOOTZ
211 #define CONFIG_SUPPORT_RAW_INITRD
214 #define CONFIG_CMD_EXT3
215 #define CONFIG_CMD_EXT4
216 #define CONFIG_DOS_PARTITION
217 #define CONFIG_CMD_FS_GENERIC
218 #define CONFIG_LIB_UUID
219 #define CONFIG_CMD_FS_UUID
221 #define CONFIG_BOOTP_SERVERIP
222 #define CONFIG_BOOTP_BOOTFILE
224 #endif /* __CONFIG_H */