2 * Copyright (C) 2014 Soeren Moch <smoch@web.de>
4 * Configuration settings for the TBS2910 MatrixARM board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
12 #include "mx6_common.h"
13 #include <asm/arch/imx-regs.h>
14 #include <asm/imx-common/gpio.h>
16 /* General configuration */
17 #define CONFIG_DISPLAY_CPUINFO
18 #define CONFIG_DISPLAY_BOARDINFO_LATE
19 #define CONFIG_SYS_THUMB_BUILD
21 #define CONFIG_MACH_TYPE 3980
23 #define CONFIG_CMDLINE_TAG
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_REVISION_TAG
27 #define CONFIG_SYS_GENERIC_BOARD
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_MXC_GPIO
31 #define CONFIG_CMD_GPIO
33 #define CONFIG_SYS_LONGHELP
34 #define CONFIG_SYS_HUSH_PARSER
35 #define CONFIG_SYS_PROMPT "Matrix U-Boot> "
36 #define CONFIG_BOOTDELAY 3
37 #define CONFIG_AUTO_COMPLETE
38 #define CONFIG_CMDLINE_EDITING
39 #define CONFIG_SYS_MAXARGS 16
40 #define CONFIG_SYS_CBSIZE 1024
41 #define CONFIG_SYS_HZ 1000
43 /* Physical Memory Map */
44 #define CONFIG_NR_DRAM_BANKS 1
45 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
47 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
48 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
49 #define CONFIG_SYS_INIT_SP_OFFSET \
50 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
51 #define CONFIG_SYS_INIT_SP_ADDR \
52 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
54 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
56 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
57 #define CONFIG_SYS_MEMTEST_END \
58 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
60 #define CONFIG_SYS_TEXT_BASE 0x80000000
61 #define CONFIG_SYS_BOOTMAPSZ 0x6C000000
62 #define CONFIG_SYS_LOAD_ADDR 0x10800000
65 #define CONFIG_MXC_UART
66 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
67 #define CONFIG_BAUDRATE 115200
69 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
70 #define CONFIG_CONSOLE_MUX
71 #define CONFIG_CONS_INDEX 1
73 /* *** Command definition *** */
74 #include <config_cmd_default.h>
76 #undef CONFIG_CMD_IMLS
78 #define CONFIG_CMD_BMODE
79 #define CONFIG_CMD_SETEXPR
80 #define CONFIG_CMD_MEMTEST
81 #define CONFIG_CMD_TIME
83 /* Filesystems / image support */
84 #define CONFIG_CMD_EXT4
85 #define CONFIG_CMD_FAT
86 #define CONFIG_DOS_PARTITION
87 #define CONFIG_EFI_PARTITION
88 #define CONFIG_CMD_FS_GENERIC
90 #define CONFIG_OF_LIBFDT
91 #define CONFIG_CMD_BOOTZ
92 #define CONFIG_SUPPORT_RAW_INITRD
96 #define CONFIG_FSL_ESDHC
97 #define CONFIG_FSL_USDHC
98 #define CONFIG_SYS_FSL_USDHC_NUM 3
99 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
102 #define CONFIG_CMD_MMC
103 #define CONFIG_GENERIC_MMC
104 #define CONFIG_SUPPORT_EMMC_BOOT
105 #define CONFIG_BOUNCE_BUFFER
108 #define CONFIG_FEC_MXC
109 #define CONFIG_CMD_PING
110 #define CONFIG_CMD_DHCP
111 #define CONFIG_CMD_MII
112 #define CONFIG_CMD_NET
113 #define CONFIG_FEC_MXC
115 #define IMX_FEC_BASE ENET_BASE_ADDR
116 #define CONFIG_FEC_XCV_TYPE RGMII
117 #define CONFIG_ETHPRIME "FEC"
118 #define CONFIG_FEC_MXC_PHYADDR 4
119 #define CONFIG_PHYLIB
120 #define CONFIG_PHY_ATHEROS
125 #define CONFIG_VIDEO_IPUV3
126 #define CONFIG_IPUV3_CLK 260000000
127 #define CONFIG_CFB_CONSOLE
128 #define CONFIG_CFB_CONSOLE_ANSI
129 #define CONFIG_VIDEO_SW_CURSOR
130 #define CONFIG_VGA_AS_SINGLE_DEVICE
131 #define CONFIG_VIDEO_BMP_RLE8
132 #define CONFIG_IMX_HDMI
133 #define CONFIG_IMX_VIDEO_SKIP
134 #define CONFIG_CMD_HDMIDETECT
138 #define CONFIG_CMD_PCI
139 #ifdef CONFIG_CMD_PCI
141 #define CONFIG_PCI_PNP
142 #define CONFIG_PCI_SCAN_SHOW
143 #define CONFIG_PCIE_IMX
144 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
148 #define CONFIG_CMD_SATA
149 #ifdef CONFIG_CMD_SATA
150 #define CONFIG_DWC_AHSATA
151 #define CONFIG_SYS_SATA_MAX_DEVICE 1
152 #define CONFIG_DWC_AHSATA_PORT_ID 0
153 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
155 #define CONFIG_LIBATA
159 #define CONFIG_CMD_USB
160 #ifdef CONFIG_CMD_USB
161 #define CONFIG_USB_EHCI
162 #define CONFIG_USB_EHCI_MX6
163 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
164 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
165 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
166 #define CONFIG_USB_STORAGE
167 #define CONFIG_CMD_USB_MASS_STORAGE
168 #ifdef CONFIG_CMD_USB_MASS_STORAGE
169 #define CONFIG_CI_UDC
170 #define CONFIG_USBD_HS
171 #define CONFIG_USB_GADGET
172 #define CONFIG_USB_GADGET_MASS_STORAGE
173 #define CONFIG_USB_GADGET_DUALSPEED
174 #define CONFIG_USB_GADGET_VBUS_DRAW 0
175 #define CONFIG_USBDOWNLOAD_GADGET
176 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
177 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
178 #define CONFIG_G_DNL_MANUFACTURER "TBS"
179 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
180 #define CONFIG_USB_KEYBOARD
181 #ifdef CONFIG_USB_KEYBOARD
182 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
183 #define CONFIG_SYS_STDIO_DEREGISTER
184 #define CONFIG_PREBOOT \
185 "if hdmidet; then " \
187 "run set_con_usb_hdmi; " \
189 "run set_con_serial; " \
191 #endif /* CONFIG_USB_KEYBOARD */
192 #endif /* CONFIG_CMD_USB */
195 #define CONFIG_CMD_DATE
196 #ifdef CONFIG_CMD_DATE
197 #define CONFIG_CMD_I2C
198 #define CONFIG_RTC_DS1307
199 #define CONFIG_SYS_RTC_BUS_NUM 2
203 #define CONFIG_CMD_I2C
204 #ifdef CONFIG_CMD_I2C
205 #define CONFIG_SYS_I2C
206 #define CONFIG_SYS_I2C_MXC
207 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
208 #define CONFIG_SYS_I2C_SPEED 100000
209 #define CONFIG_I2C_EDID
213 #define CONFIG_CMD_FUSE
214 #ifdef CONFIG_CMD_FUSE
215 #define CONFIG_MXC_OCOTP
218 #ifndef CONFIG_SYS_DCACHE_OFF
219 #define CONFIG_CMD_CACHE
222 /* Flash and environment organization */
223 #define CONFIG_SYS_NO_FLASH
225 #define CONFIG_ENV_IS_IN_MMC
226 #define CONFIG_SYS_MMC_ENV_DEV 2
227 #define CONFIG_SYS_MMC_ENV_PART 1
228 #define CONFIG_ENV_SIZE (8 * 1024)
229 #define CONFIG_ENV_OFFSET (384 * 1024)
230 #define CONFIG_ENV_OVERWRITE
232 #define CONFIG_EXTRA_ENV_SETTINGS \
233 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
234 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
235 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
236 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
237 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
238 "${bootargs_mmc3}\0" \
239 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
240 "rdinit=/sbin/init enable_wait_mode=off\0" \
241 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
242 "mmc read 0x10800000 0x800 0x4000; bootm\0" \
243 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
244 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
245 "run bootargs_upd; " \
246 "bootm 0x10800000 0x10d00000\0" \
247 "console=ttymxc0\0" \
248 "fan=gpio set 92\0" \
249 "set_con_serial=setenv stdin serial; " \
250 "setenv stdout serial; " \
251 "setenv stderr serial;\0" \
252 "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
253 "setenv stdout serial,vga; " \
254 "setenv stderr serial,vga;\0"
256 #define CONFIG_BOOTCOMMAND \
258 "if run bootcmd_up1; then " \
259 "run bootcmd_up2; " \
261 "run bootcmd_mmc; " \
264 #endif /* __TBS2910_CONFIG_H * */