2 * Common configuration header file for all Keystone II EVM platforms
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_KS2_EVM_H
11 #define __CONFIG_KS2_EVM_H
14 /* U-Boot Build Configuration */
15 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
16 #define CONFIG_BOARD_EARLY_INIT_F
18 /* SoC Configuration */
19 #define CONFIG_ARCH_CPU_INIT
20 #define CONFIG_SYS_ARCH_TIMER
21 #define CONFIG_SYS_TEXT_BASE 0x0c001000
22 #define CONFIG_SPL_TARGET "u-boot-spi.gph"
23 #define CONFIG_SYS_DCACHE_OFF
25 /* Memory Configuration */
26 #define CONFIG_NR_DRAM_BANKS 2
27 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
28 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
29 #define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
30 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
31 GENERATED_GBL_DATA_SIZE)
33 /* SPL SPI Loader Configuration */
34 #define CONFIG_SPL_PAD_TO 65536
35 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
36 #define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
38 #define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
39 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
40 CONFIG_SPL_BSS_MAX_SIZE)
41 #define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
42 #define CONFIG_SPL_STACK_SIZE (8 * 1024)
43 #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
44 CONFIG_SYS_SPL_MALLOC_SIZE + \
45 CONFIG_SPL_STACK_SIZE - 4)
46 #define CONFIG_SPL_SPI_FLASH_SUPPORT
47 #define CONFIG_SPL_SPI_SUPPORT
48 #define CONFIG_SPL_SPI_LOAD
49 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
51 /* UART Configuration */
52 #define CONFIG_SYS_NS16550
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_MEM32
55 #define CONFIG_SYS_NS16550_REG_SIZE -4
56 #define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
57 #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
58 #define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
59 #define CONFIG_CONS_INDEX 1
61 /* SPI Configuration */
62 #define CONFIG_SPI_FLASH_STMICRO
63 #define CONFIG_DAVINCI_SPI
64 #define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6)
65 #define CONFIG_SF_DEFAULT_SPEED 30000000
66 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
67 #define CONFIG_SYS_SPI0
68 #define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
69 #define CONFIG_SYS_SPI0_NUM_CS 4
70 #define CONFIG_SYS_SPI1
71 #define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
72 #define CONFIG_SYS_SPI1_NUM_CS 4
73 #define CONFIG_SYS_SPI2
74 #define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
75 #define CONFIG_SYS_SPI2_NUM_CS 4
77 /* Network Configuration */
79 #define CONFIG_PHY_MARVELL
81 #define CONFIG_BOOTP_DEFAULT
82 #define CONFIG_BOOTP_DNS
83 #define CONFIG_BOOTP_DNS2
84 #define CONFIG_BOOTP_SEND_HOSTNAME
85 #define CONFIG_NET_RETRY_COUNT 32
86 #define CONFIG_SYS_SGMII_REFCLK_MHZ 312
87 #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
88 #define CONFIG_SYS_SGMII_RATESCALE 2
90 /* Keyston Navigator Configuration */
91 #define CONFIG_TI_KSNAV
92 #define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
93 #define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
94 #define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
95 #define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
96 #define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
97 #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
98 #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
99 #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
100 #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
101 #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
102 #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
103 #define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
104 #define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
105 #define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
108 #define CONFIG_KSNAV_PKTDMA_NETCP
109 #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
110 #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
111 #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
112 #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
113 #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
114 #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
115 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
116 #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
117 #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
118 #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
119 #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
122 #define CONFIG_DRIVER_TI_KEYSTONE_NET
123 #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
124 #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
125 #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
126 #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
127 #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
130 #define CONFIG_TI_KEYSTONE_SERDES
133 #define CONFIG_TI_AEMIF
134 #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
136 /* I2C Configuration */
137 #define CONFIG_SYS_I2C_DAVINCI
138 #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
139 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
140 #define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
141 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
142 #define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
143 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
144 #define I2C_BUS_MAX 3
146 /* EEPROM definitions */
147 #define CONFIG_SYS_I2C_MULTI_EEPROMS
148 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
149 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
150 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
151 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
152 #define CONFIG_ENV_EEPROM_IS_ON_I2C
154 /* NAND Configuration */
155 #define CONFIG_NAND_DAVINCI
156 #define CONFIG_KEYSTONE_RBL_NAND
157 #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
158 #define CONFIG_SYS_NAND_MASK_CLE 0x4000
159 #define CONFIG_SYS_NAND_MASK_ALE 0x2000
160 #define CONFIG_SYS_NAND_CS 2
161 #define CONFIG_SYS_NAND_USE_FLASH_BBT
162 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
164 #define CONFIG_SYS_NAND_LARGEPAGE
165 #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
166 #define CONFIG_SYS_MAX_NAND_DEVICE 1
167 #define CONFIG_SYS_NAND_MAX_CHIPS 1
168 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
169 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
170 #define CONFIG_ENV_IS_IN_NAND
171 #define CONFIG_ENV_OFFSET 0x100000
172 #define CONFIG_MTD_PARTITIONS
173 #define CONFIG_RBTREE
175 #define MTDIDS_DEFAULT "nand0=davinci_nand.0"
176 #define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
177 "1024k(bootloader)ro,512k(params)ro," \
180 /* USB Configuration */
181 #define CONFIG_USB_XHCI
182 #define CONFIG_USB_XHCI_DWC3
183 #define CONFIG_USB_XHCI_KEYSTONE
184 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
185 #define CONFIG_EFI_PARTITION
186 #define CONFIG_FS_FAT
187 #define CONFIG_SYS_CACHELINE_SIZE 64
188 #define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
189 #define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
190 #define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
191 #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
193 /* U-Boot command configuration */
194 #define CONFIG_CMD_DHCP
195 #define CONFIG_CMD_PING
196 #define CONFIG_CMD_SAVES
197 #define CONFIG_CMD_NAND
198 #define CONFIG_CMD_UBI
199 #define CONFIG_CMD_UBIFS
200 #define CONFIG_CMD_SF
201 #define CONFIG_CMD_EEPROM
202 #define CONFIG_CMD_USB
204 /* U-Boot general configuration */
205 #define CONFIG_MISC_INIT_R
206 #define CONFIG_CRC32_VERIFY
207 #define CONFIG_MX_CYCLIC
208 #define CONFIG_TIMESTAMP
211 #define CONFIG_TI_EDMA3
213 #define CONFIG_EXTRA_ENV_SETTINGS \
214 DEFAULT_LINUX_BOOT_ENV \
215 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
218 "nfs_root=/export\0" \
220 "mem_reserve=512M\0" \
221 "addr_ubi=0x82000000\0" \
222 "addr_secdb_key=0xc000000\0" \
223 "name_kern=zImage\0" \
224 "run_mon=mon_install ${addr_mon}\0" \
225 "run_kern=bootz ${loadaddr} - ${fdtaddr}\0" \
226 "init_net=run args_all args_net\0" \
227 "init_ubi=run args_all args_ubi; " \
228 "ubi part ubifs; ubifsmount ubi:boot;" \
229 "ubifsload ${addr_secdb_key} securedb.key.bin;\0" \
230 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
231 "get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0" \
232 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
233 "get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0" \
234 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
235 "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
236 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \
237 "burn_uboot_spi=sf probe; sf erase 0 0x100000; " \
238 "sf write ${loadaddr} 0 ${filesize}\0" \
239 "burn_uboot_nand=nand erase 0 0x100000; " \
240 "nand write ${loadaddr} 0 ${filesize}\0" \
241 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
242 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
243 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
244 "${nfs_options} ip=dhcp\0" \
245 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
246 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
247 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
248 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
249 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
250 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
251 "burn_ubi=nand erase.part ubifs; " \
252 "nand write ${addr_ubi} ubifs ${filesize}\0" \
253 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
254 "args_ramfs=setenv bootargs ${bootargs} " \
255 "rdinit=/sbin/init rw root=/dev/ram0 " \
256 "initrd=0x802000000,9M\0" \
258 "mtdparts=mtdparts=davinci_nand.0:" \
259 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
261 #define CONFIG_BOOTCOMMAND \
262 "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
263 "get_kern_${boot} run_mon run_kern"
265 #define CONFIG_BOOTARGS \
267 /* Linux interfacing */
268 #define CONFIG_OF_BOARD_SETUP
270 /* Now for the remaining common defines */
271 #include <configs/ti_armv7_common.h>
273 /* We wont be loading up OS from SPL for now.. */
274 #undef CONFIG_SPL_OS_BOOT
276 /* We do not have MMC support.. yet.. */
277 #undef CONFIG_SPL_LIBDISK_SUPPORT
278 #undef CONFIG_SPL_MMC_SUPPORT
279 #undef CONFIG_SPL_FAT_SUPPORT
280 #undef CONFIG_SPL_EXT_SUPPORT
282 #undef CONFIG_GENERIC_MMC
283 #undef CONFIG_CMD_MMC
285 /* And no support for GPIO, yet.. */
286 #undef CONFIG_SPL_GPIO_SUPPORT
287 #undef CONFIG_CMD_GPIO
289 /* we may include files below only after all above definitions */
290 #include <asm/arch/hardware.h>
291 #include <asm/arch/clock.h>
292 #define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
294 #endif /* __CONFIG_KS2_EVM_H */