2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #define CONFIG_MX28 /* must be defined before including regs-base.h */
13 #include <linux/sizes.h>
14 #include <asm/arch/regs-base.h>
17 * Ka-Ro TX28 board - SoC configuration
19 #define CONFIG_MXS_GPIO /* GPIO control */
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define PHYS_SDRAM_1_SIZE CONFIG_SDRAM_SIZE
23 #define TX28_MOD_SUFFIX "1"
25 #define CONFIG_SYS_SPL_FIXED_BATT_SUPPLY
26 #define TX28_MOD_SUFFIX "0"
28 #define IRAM_BASE_ADDR 0x00000000
30 #ifndef CONFIG_SPL_BUILD
31 #define CONFIG_SKIP_LOWLEVEL_INIT
32 #define CONFIG_SHOW_ACTIVITY
33 #define CONFIG_ARCH_CPU_INIT
34 #define CONFIG_ARCH_MISC_INIT /* init vector table after relocation */
35 #define CONFIG_DISPLAY_CPUINFO
36 #define CONFIG_DISPLAY_BOARDINFO
37 #define CONFIG_BOARD_LATE_INIT
38 #define CONFIG_BOARD_EARLY_INIT_F
39 #define CONFIG_SYS_GENERIC_BOARD
41 /* LCD Logo and Splash screen support */
43 #define CONFIG_SPLASH_SCREEN
44 #define CONFIG_SPLASH_SCREEN_ALIGN
45 #define CONFIG_VIDEO_MXS
46 #define CONFIG_LCD_LOGO
47 #define LCD_BPP LCD_COLOR32
48 #define CONFIG_CMD_BMP
49 #define CONFIG_VIDEO_BMP_RLE8
50 #endif /* CONFIG_LCD */
51 #endif /* CONFIG_SPL_BUILD */
54 * Memory configuration options
56 #define CONFIG_NR_DRAM_BANKS 0x1 /* 1 bank of SDRAM */
57 #define PHYS_SDRAM_1 0x40000000 /* SDRAM Bank #1 */
58 #define CONFIG_STACKSIZE SZ_64K
59 #define CONFIG_SYS_MALLOC_LEN SZ_4M
60 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
61 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
64 * U-Boot general configurations
66 #define CONFIG_SYS_LONGHELP
67 #define CONFIG_SYS_PROMPT "TX28 U-Boot > "
68 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
69 #define CONFIG_SYS_PBSIZE \
70 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
71 /* Print buffer size */
72 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
73 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
74 /* Boot argument buffer size */
75 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
76 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
77 #define CONFIG_CMDLINE_EDITING /* Command history etc */
79 #define CONFIG_SYS_64BIT_VSPRINTF
82 * Flattened Device Tree (FDT) support
84 #ifdef CONFIG_OF_LIBFDT
90 #define xstr(s) str(s)
92 #define __pfx(x, s) (x##s)
93 #define _pfx(x, s) __pfx(x, s)
95 #define CONFIG_CMDLINE_TAG
96 #define CONFIG_SETUP_MEMORY_TAGS
97 #define CONFIG_BOOTDELAY 3
98 #define CONFIG_ZERO_BOOTDELAY_CHECK
99 #define CONFIG_SYS_AUTOLOAD "no"
100 #define CONFIG_BOOTFILE "uImage"
101 #define CONFIG_BOOTARGS "init=/linuxrc console=ttyAMA0,115200 ro debug panic=1"
102 #define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
104 #define CONFIG_LOADADDR 41000000
106 #define CONFIG_LOADADDR 43000000
108 #define CONFIG_FDTADDR 41000000
109 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
110 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
111 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
114 * Extra Environment Settings
116 #ifdef CONFIG_ENV_IS_NOWHERE
117 #define CONFIG_EXTRA_ENV_SETTINGS \
121 "mtdids=" MTDIDS_DEFAULT "\0" \
122 "mtdparts=" MTDPARTS_DEFAULT "\0"
124 #define CONFIG_EXTRA_ENV_SETTINGS \
126 "baseboard=stk5-v3\0" \
127 "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
128 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
129 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
130 " root=/dev/mmcblk0p3 rootwait\0" \
131 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
132 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
134 "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
135 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
136 "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
138 "bootcmd_mmc=set autostart no;run bootargs_mmc" \
139 ";fatload mmc 0 ${loadaddr} uImage\0" \
140 "bootcmd_nand=set autostart no;run bootargs_ubifs;nboot linux\0"\
141 "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
143 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
145 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
146 " ${append_bootargs}\0" \
147 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
148 "fdtsave=fdt resize;nand erase.part dtb" \
149 ";nand write ${fdtaddr} dtb ${fdtsize}\0" \
150 "mtdids=" MTDIDS_DEFAULT "\0" \
151 "mtdparts=" MTDPARTS_DEFAULT "\0" \
152 "nfsroot=/tftpboot/rootfs\0" \
153 "otg_mode=device\0" \
154 "touchpanel=tsc2007\0" \
156 #endif /* CONFIG_ENV_IS_NOWHERE */
158 #define MTD_NAME "gpmi-nand"
159 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
164 #include <config_cmd_default.h>
169 #define CONFIG_PL011_SERIAL
170 #define CONFIG_PL011_CLOCK 24000000
171 #define CONFIG_PL01x_PORTS { \
172 (void *)MXS_UARTDBG_BASE, \
174 #define CONFIG_CONS_INDEX 0 /* do not change! */
175 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
176 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
177 #define CONFIG_SYS_CONSOLE_INFO_QUIET
182 #ifdef CONFIG_FEC_MXC
183 /* This is required for the FEC driver to work with cache enabled */
184 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
185 #define CONFIG_SYS_CACHELINE_SIZE 32
187 #ifdef CONFIG_FEC_MXC_PHYADDR
188 #define IMX_FEC_BASE MXS_ENET0_BASE
191 #define CONFIG_FEC_XCV_TYPE RMII
192 /* Add for working with "strict" DHCP server */
193 #define CONFIG_BOOTP_SUBNETMASK
194 #define CONFIG_BOOTP_GATEWAY
195 #define CONFIG_BOOTP_DNS
196 #define CONFIG_BOOTP_RANDOM_ID
199 #ifndef CONFIG_ENV_IS_NOWHERE
200 /* define one of the following options:
203 #define CONFIG_ENV_OVERWRITE
209 #define CONFIG_SYS_NAND_BLOCK_SIZE SZ_128K
210 #define CONFIG_NAND_MXS
211 #define CONFIG_APBH_DMA
212 #define CONFIG_APBH_DMA_BURST
213 #define CONFIG_APBH_DMA_BURST8
214 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SYS_NAND_BLOCK_SIZE
215 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
216 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
217 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
218 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
219 #define CONFIG_SYS_NAND_BASE 0x00000000
221 #undef CONFIG_ENV_IS_IN_NAND
222 #endif /* CONFIG_CMD_NAND */
224 #ifdef CONFIG_ENV_IS_IN_NAND
225 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
226 #define CONFIG_ENV_SIZE SZ_128K
227 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
228 #endif /* CONFIG_ENV_IS_IN_NAND */
230 #ifdef CONFIG_ENV_OFFSET_REDUND
231 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
233 xstr(CONFIG_SYS_ENV_PART_SIZE) \
235 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
237 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
239 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
240 #endif /* CONFIG_ENV_OFFSET_REDUND */
245 #ifdef CONFIG_CMD_MMC
246 #define CONFIG_MXS_MMC
247 #define CONFIG_BOUNCE_BUFFER
249 #define CONFIG_DOS_PARTITION
250 #define CONFIG_CMD_FAT
251 #define CONFIG_FAT_WRITE
252 #define CONFIG_CMD_EXT2
255 * Environments on MMC
257 #ifdef CONFIG_ENV_IS_IN_MMC
258 #define CONFIG_SYS_MMC_ENV_DEV 0
259 /* Associated with the MMC layout defined in mmcops.c */
260 #define CONFIG_ENV_OFFSET SZ_1K
261 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
262 #define CONFIG_DYNAMIC_MMC_DEVNO
263 #endif /* CONFIG_ENV_IS_IN_MMC */
265 #undef CONFIG_ENV_IS_IN_MMC
266 #endif /* CONFIG_CMD_MMC */
268 #ifdef CONFIG_ENV_IS_NOWHERE
269 #undef CONFIG_ENV_SIZE
270 #define CONFIG_ENV_SIZE SZ_4K
273 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
274 "1m@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) "(u-boot)," \
275 CONFIG_SYS_ENV_PART_STR \
276 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR \
277 ",512k@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)" \
278 ",512k@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
280 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
281 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
282 GENERATED_GBL_DATA_SIZE)
284 /* Defines for SPL */
285 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
286 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
287 #define CONFIG_SPL_LIBCOMMON_SUPPORT
288 #define CONFIG_SPL_LIBGENERIC_SUPPORT
289 #define CONFIG_SPL_SERIAL_SUPPORT
290 #define CONFIG_SPL_GPIO_SUPPORT
291 #define CONFIG_SYS_SPL_VDDD_VAL 1500
292 #define CONFIG_SYS_SPL_BATT_BO_LEVEL 2800
293 #define CONFIG_SYS_SPL_VDDMEM_VAL 0 /* VDDMEM is not utilized on TX28 */
295 #endif /* __CONFIGS_TX28_H */