include/configs/tx51.h

   1 /*
   2  * Copyright (C) 2012 <LW@KARO-electronics.de>
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation version 2.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 #ifndef __CONFIGS_TX51_H
  14 #define __CONFIGS_TX51_H
  15
  16 #include <asm/sizes.h>
  17
  18 /*
  19  * Ka-Ro TX51 board - SoC configuration
  20  */
  21 #define CONFIG_MX51                             /* i.MX51 SoC */
  22 #define CONFIG_SYS_MX5_IOMUX_V3
  23 #define CONFIG_MXC_GPIO                         /* GPIO control */
  24 #define CONFIG_SYS_MX5_HCLK             24000000
  25 #define CONFIG_SYS_MX5_CLK32            32768
  26 #define CONFIG_SYS_DDR_CLKSEL           0
  27 #define CONFIG_SYS_HZ                   1000    /* Ticks per second */
  28 #define CONFIG_SHOW_ACTIVITY
  29 #define CONFIG_DISPLAY_BOARDINFO
  30 #define CONFIG_BOARD_LATE_INIT
  31 #define CONFIG_BOARD_EARLY_INIT_F
  32
  33 #if CONFIG_SYS_CPU_CLK == 600
  34 #define TX51_MOD_PREFIX                 "6"
  35 #elif CONFIG_SYS_CPU_CLK == 800
  36 #define TX51_MOD_PREFIX                 "8"
  37 #define CONFIG_MX51_PLL_ERRATA
  38 #else
  39 #error Invalid CPU clock
  40 #endif
  41
  42 /* LCD Logo and Splash screen support */
  43 #define CONFIG_LCD
  44 #ifdef CONFIG_LCD
  45 #define CONFIG_SPLASH_SCREEN
  46 #define CONFIG_SPLASH_SCREEN_ALIGN
  47 #define CONFIG_VIDEO_IPUV3
  48 #define CONFIG_IPUV3_CLK                200000000
  49 #define CONFIG_LCD_LOGO
  50 #define LCD_BPP                         LCD_COLOR24
  51 #define CONFIG_CMD_BMP
  52 #define CONFIG_VIDEO_BMP_RLE8
  53 #endif /* CONFIG_LCD */
  54
  55 /*
  56  * Memory configurations
  57  */
  58 #define PHYS_SDRAM_1                    0x90000000      /* Base address of bank 1 */
  59 #define PHYS_SDRAM_1_SIZE               SZ_128M
  60 #if CONFIG_NR_DRAM_BANKS > 1
  61 #define PHYS_SDRAM_2                    0x98000000      /* Base address of bank 2 */
  62 #define PHYS_SDRAM_2_SIZE               SZ_128M
  63 #else
  64 #define TX51_MOD_SUFFIX                 "0"
  65 #endif
  66 #define CONFIG_STACKSIZE                SZ_128K
  67 #define CONFIG_SYS_MALLOC_LEN           SZ_8M
  68 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1    /* Memtest start address */
  69 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1 + SZ_4M)  /* 4 MB RAM test */
  70 #if CONFIG_SYS_SDRAM_CLK == 200
  71 #define CONFIG_SYS_CLKTL_CBCDR          0x59e35180
  72 #define TX51_MOD_SUFFIX                 "1"
  73 #elif CONFIG_SYS_SDRAM_CLK == 166
  74 #define CONFIG_SYS_CLKTL_CBCDR          0x01e35180
  75 #ifndef TX51_MOD_SUFFIX
  76 #define TX51_MOD_SUFFIX                 "2"
  77 #endif
  78 #else
  79 #error Invalid SDRAM clock
  80 #endif
  81
  82 /*
  83  * U-Boot general configurations
  84  */
  85 #define CONFIG_SYS_LONGHELP
  86 #define CONFIG_SYS_PROMPT               "TX51 U-Boot > "
  87 #define CONFIG_SYS_CBSIZE               2048    /* Console I/O buffer size */
  88 #define CONFIG_SYS_PBSIZE \
  89         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  90                                                 /* Print buffer size */
  91 #define CONFIG_SYS_MAXARGS              64      /* Max number of command args */
  92 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  93                                                 /* Boot argument buffer size */
  94 #define CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
  95 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
  96 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
  97
  98 #define CONFIG_SYS_64BIT_VSPRINTF
  99 #define CONFIG_SYS_NO_FLASH
 100
 101 /*
 102  * Flattened Device Tree (FDT) support
 103 */
 104 #define CONFIG_OF_LIBFDT
 105 #define CONFIG_OF_EMBED
 106 #define CONFIG_OF_BOARD_SETUP
 107 #define CONFIG_DEFAULT_DEVICE_TREE      tx51
 108 #define CONFIG_ARCH_DEVICE_TREE         mx51
 109 #define CONFIG_SYS_FDT_ADDR             (PHYS_SDRAM_1 + SZ_16M)
 110
 111 /*
 112  * Boot Linux
 113  */
 114 #define xstr(s)                         str(s)
 115 #define str(s)                          #s
 116 #define __pfx(x, s)                     (x##s)
 117 #define _pfx(x, s)                      __pfx(x, s)
 118
 119 #define CONFIG_CMDLINE_TAG
 120 #define CONFIG_SETUP_MEMORY_TAGS
 121 #define CONFIG_BOOTDELAY                3
 122 #define CONFIG_ZERO_BOOTDELAY_CHECK
 123 #define CONFIG_SYS_AUTOLOAD             "no"
 124 #define CONFIG_BOOTFILE                 "uImage"
 125 #define CONFIG_BOOTARGS                 "console=ttymxc0,115200 ro debug panic=1"
 126 #define CONFIG_BOOTCOMMAND              "run bootcmd_nand"
 127 #define CONFIG_LOADADDR                 94000000
 128 #define CONFIG_SYS_LOAD_ADDR            _pfx(0x, CONFIG_LOADADDR)
 129 #define CONFIG_U_BOOT_IMG_SIZE          SZ_1M
 130 #define CONFIG_HW_WATCHDOG
 131
 132 /*
 133  * Extra Environments
 134  */
 135 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 136         "autostart=no\0"                                                \
 137         "baseboard=stk5-v3\0"                                           \
 138         "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}"    \
 139         " root=/dev/mmcblk0p3 rootwait\0"                               \
 140         "bootargs_nand=run default_bootargs;set bootargs ${bootargs}"   \
 141         " root=/dev/mtdblock3 rootfstype=jffs2\0"                       \
 142         "nfsroot=/tftpboot/rootfs\0"                                    \
 143         "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}"    \
 144         " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
 145         "bootcmd_mmc=set autostart no;run bootargs_mmc;"                \
 146         "mmc read ${loadaddr} 100 3000;run bootm_cmd\0"                 \
 147         "bootcmd_nand=set autostart no;run bootargs_nand;"              \
 148         "nboot linux;run bootm_cmd\0"                                   \
 149         "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;"           \
 150         "run bootm_cmd\0"                                               \
 151         "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0"                    \
 152         "default_bootargs=set bootargs " CONFIG_BOOTARGS                \
 153         " video=${video_mode} ${append_bootargs}\0"                     \
 154         "cpu_clk=" xstr(CONFIG_SYS_CPU_CLK) "\0"                        \
 155         "fdtaddr=91000000\0"                                            \
 156         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 157         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 158         "otg_mode=device\0"                                             \
 159         "touchpanel=tsc2007\0"                                          \
 160         "video_mode=VGA-1:640x480MR-24@60\0"
 161
 162 #define MTD_NAME                        "mxc_nand"
 163 #define MTDIDS_DEFAULT                  "nand0=" MTD_NAME
 164 #define CONFIG_FDT_FIXUP_PARTITIONS
 165
 166 /*
 167  * U-Boot Commands
 168  */
 169 #include <config_cmd_default.h>
 170 #define CONFIG_CMD_CACHE
 171 #define CONFIG_CMD_IIM
 172 #define CONFIG_CMD_MMC
 173 #define CONFIG_CMD_NAND
 174 #define CONFIG_CMD_MTDPARTS
 175 #define CONFIG_CMD_BOOTCE
 176 #define CONFIG_CMD_TIME
 177
 178 /*
 179  * Serial Driver
 180  */
 181 #define CONFIG_MXC_UART
 182 #define CONFIG_MXC_UART_BASE            UART1_BASE
 183 #define CONFIG_MXC_GPIO
 184 #define CONFIG_BAUDRATE                 115200          /* Default baud rate */
 185 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200, }
 186 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 187
 188 /*
 189  * Ethernet Driver
 190  */
 191 #define CONFIG_FEC_MXC
 192 #ifdef CONFIG_FEC_MXC
 193 #define IMX_FEC_BASE                    FEC_BASE_ADDR
 194 #define CONFIG_FEC_MXC_PHYADDR          0x1f
 195 #define CONFIG_PHYLIB
 196 #define CONFIG_PHY_SMSC
 197 #define CONFIG_MII
 198 #define CONFIG_FEC_XCV_TYPE             MII100
 199 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 200 #define CONFIG_CMD_MII
 201 #define CONFIG_CMD_DHCP
 202 #define CONFIG_CMD_PING
 203 /* Add for working with "strict" DHCP server */
 204 #define CONFIG_BOOTP_SUBNETMASK
 205 #define CONFIG_BOOTP_GATEWAY
 206 #define CONFIG_BOOTP_DNS
 207 #endif
 208
 209 /*
 210  * NAND flash driver
 211  */
 212 #ifdef CONFIG_CMD_NAND
 213 #define CONFIG_MTD_DEVICE
 214 #define CONFIG_ENV_IS_IN_NAND
 215 #define CONFIG_NAND_MXC
 216 #define CONFIG_MXC_NAND_REGS_BASE       0xcfff0000
 217 #define CONFIG_MXC_NAND_IP_BASE         0x83fdb000
 218 #define CONFIG_MXC_NAND_HWECC
 219 #define CONFIG_CMD_NAND_TRIMFFS
 220 #define CONFIG_SYS_MAX_FLASH_SECT       1024
 221 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 222 #define CONFIG_SYS_NAND_MAX_CHIPS       1
 223 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 224 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 225 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 226 #ifdef CONFIG_ENV_IS_IN_NAND
 227 #define CONFIG_ENV_OVERWRITE
 228 #define CONFIG_ENV_OFFSET               CONFIG_U_BOOT_IMG_SIZE
 229 #define CONFIG_ENV_SIZE                 0x20000 /* 128 KiB */
 230 #define CONFIG_ENV_RANGE                0x60000
 231 #endif
 232 #ifndef CONFIG_SYS_NO_FLASH
 233 #define CONFIG_CMD_FLASH
 234 #define CONFIG_SYS_NAND_BASE            0xa0000000
 235 #define CONFIG_FIT
 236 #else
 237 #define CONFIG_SYS_NAND_BASE            0x00000000
 238 #define CONFIG_CMD_ROMUPDATE
 239 #endif
 240 #endif /* CONFIG_CMD_NAND */
 241
 242 /*
 243  * MMC Driver
 244  */
 245 #ifdef CONFIG_CMD_MMC
 246 #ifndef CONFIG_ENV_IS_IN_NAND
 247 #define CONFIG_ENV_IS_IN_MMC
 248 #endif
 249 #define CONFIG_MMC
 250 #define CONFIG_GENERIC_MMC
 251 #define CONFIG_FSL_ESDHC
 252 #define CONFIG_SYS_FSL_ESDHC_USE_PIO
 253 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 254 #define CONFIG_SYS_FSL_ESDHC_NUM        2
 255
 256 #define CONFIG_DOS_PARTITION
 257 #define CONFIG_CMD_FAT
 258 #define CONFIG_CMD_EXT2
 259
 260 /*
 261  * Environments on MMC
 262  */
 263 #ifdef CONFIG_ENV_IS_IN_MMC
 264 #define CONFIG_SYS_MMC_ENV_DEV          0
 265 #define CONFIG_ENV_OVERWRITE
 266 /* Associated with the MMC layout defined in mmcops.c */
 267 #define CONFIG_ENV_OFFSET               SZ_1K
 268 #define CONFIG_ENV_SIZE                 (SZ_128K - CONFIG_ENV_OFFSET)
 269 #define CONFIG_DYNAMIC_MMC_DEVNO
 270 #endif /* CONFIG_ENV_IS_IN_MMC */
 271 #endif /* CONFIG_CMD_MMC */
 272
 273 #ifdef CONFIG_ENV_OFFSET_REDUND
 274 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 275         "1m(u-boot),"                                                   \
 276         xstr(CONFIG_ENV_RANGE)                                          \
 277         "(env),"                                                        \
 278         xstr(CONFIG_ENV_RANGE)                                          \
 279         "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
 280 #else
 281 #define MTDPARTS_DEFAULT                "mtdparts=" MTD_NAME ":"        \
 282         "1m(u-boot),"                                                   \
 283         xstr(CONFIG_ENV_RANGE)                                          \
 284         "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
 285 #endif
 286
 287 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 288 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
 289                                         GENERATED_GBL_DATA_SIZE)
 290
 291 #ifdef CONFIG_CMD_IIM
 292 #define CONFIG_IMX_IIM
 293 #endif
 294
 295 #endif /* __CONFIGS_TX51_H */