2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
43 * Memory configuration options
45 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
46 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
47 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
48 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
50 #define PHYS_SDRAM_1_WIDTH 64
52 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
55 #define CONFIG_SYS_SDRAM_CLK 528
57 #define CONFIG_SYS_SDRAM_CLK 400
59 #define CONFIG_STACKSIZE SZ_128K
60 #define CONFIG_SYS_MALLOC_LEN SZ_8M
61 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
62 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
65 * U-Boot general configurations
67 #define CONFIG_SYS_LONGHELP
69 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
71 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
73 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
74 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
75 sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */
76 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
77 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
78 /* Boot argument buffer size */
79 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
80 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
81 #define CONFIG_CMDLINE_EDITING /* Command history etc */
83 #define CONFIG_SYS_64BIT_VSPRINTF
84 #define CONFIG_SYS_NO_FLASH
87 * Flattened Device Tree (FDT) support
90 #define CONFIG_OF_LIBFDT
91 #ifdef CONFIG_OF_LIBFDT
92 #define CONFIG_FDT_FIXUP_PARTITIONS
93 #define CONFIG_OF_BOARD_SETUP
95 #define CONFIG_DEFAULT_DEVICE_TREE tx6q
96 #define CONFIG_ARCH_DEVICE_TREE mx6q
98 #define CONFIG_DEFAULT_DEVICE_TREE tx6dl
99 #define CONFIG_ARCH_DEVICE_TREE mx6dl
101 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
102 #endif /* CONFIG_OF_LIBFDT */
103 #endif /* CONFIG_MFG */
108 #define xstr(s) str(s)
110 #define __pfx(x, s) (x##s)
111 #define _pfx(x, s) __pfx(x, s)
113 #define CONFIG_CMDLINE_TAG
114 #define CONFIG_INITRD_TAG
115 #define CONFIG_SETUP_MEMORY_TAGS
116 #define CONFIG_SERIAL_TAG
118 #define CONFIG_BOOTDELAY 1
120 #define CONFIG_BOOTDELAY 0
122 #define CONFIG_ZERO_BOOTDELAY_CHECK
123 #define CONFIG_SYS_AUTOLOAD "no"
125 #define CONFIG_BOOTFILE "uImage"
126 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
127 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
129 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
130 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
131 #define CONFIG_DELAY_ENVIRONMENT
132 #endif /* CONFIG_MFG */
133 #define CONFIG_LOADADDR 18000000
134 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
135 #define CONFIG_IMX_WATCHDOG
136 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
142 #ifdef CONFIG_ENV_IS_NOWHERE
143 #define CONFIG_EXTRA_ENV_SETTINGS \
147 "fdtaddr=11000000\0" \
148 "mtdids=" MTDIDS_DEFAULT "\0" \
149 "mtdparts=" MTDPARTS_DEFAULT "\0"
151 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "baseboard=stk5-v3\0" \
154 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
155 " root=/dev/mmcblk0p3 rootwait\0" \
156 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
157 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
158 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
159 " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
160 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
161 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
162 "bootcmd_nand=set autostart no;run bootargs_nand;" \
163 "nboot linux;run bootm_cmd\0" \
164 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
166 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
169 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
170 " video=${video_mode} ${append_bootargs}\0" \
171 "fdtaddr=11000000\0" \
172 "mtdids=" MTDIDS_DEFAULT "\0" \
173 "mtdparts=" MTDPARTS_DEFAULT "\0" \
174 "nfsroot=/tftpboot/rootfs\0" \
175 "otg_mode=device\0" \
176 "touchpanel=tsc2007\0" \
178 #endif /* CONFIG_ENV_IS_NOWHERE */
179 #endif /* CONFIG_MFG */
181 #define MTD_NAME "gpmi-nand"
182 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
183 #define CONFIG_SYS_NAND_ONFI_DETECTION
188 #include <config_cmd_default.h>
189 #define CONFIG_CMD_CACHE
190 #define CONFIG_CMD_MMC
191 #define CONFIG_CMD_NAND
192 #define CONFIG_CMD_MTDPARTS
193 #define CONFIG_CMD_BOOTCE
194 #define CONFIG_CMD_TIME
195 #define CONFIG_CMD_I2C
196 #define CONFIG_CMD_MEMTEST
201 #define CONFIG_MXC_UART
202 #define CONFIG_MXC_UART_BASE UART1_BASE
203 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
204 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
205 #define CONFIG_SYS_CONSOLE_INFO_QUIET
210 #define CONFIG_MXC_GPIO
215 #define CONFIG_FEC_MXC
216 #ifdef CONFIG_FEC_MXC
217 /* This is required for the FEC driver to work with cache enabled */
218 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
219 #define CONFIG_SYS_CACHELINE_SIZE 64
221 #define IMX_FEC_BASE ENET_BASE_ADDR
222 #define CONFIG_FEC_MXC_PHYADDR 0
223 #define CONFIG_PHYLIB
224 #define CONFIG_PHY_SMSC
226 #define CONFIG_FEC_XCV_TYPE RMII
227 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
228 #define CONFIG_CMD_MII
229 #define CONFIG_CMD_DHCP
230 #define CONFIG_CMD_PING
231 /* Add for working with "strict" DHCP server */
232 #define CONFIG_BOOTP_SUBNETMASK
233 #define CONFIG_BOOTP_GATEWAY
234 #define CONFIG_BOOTP_DNS
240 #ifdef CONFIG_CMD_I2C
241 #define CONFIG_HARD_I2C
242 #define CONFIG_I2C_MXC
243 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
244 #define CONFIG_SYS_I2C_MX6_PORT1
245 #define CONFIG_SYS_I2C_SPEED 400000
246 #define CONFIG_SYS_I2C_SLAVE 0x3c
249 #ifndef CONFIG_ENV_IS_NOWHERE
250 /* define one of the following options:
251 #define CONFIG_ENV_IS_IN_NAND
252 #define CONFIG_ENV_IS_IN_MMC
254 #define CONFIG_ENV_IS_IN_NAND
256 #define CONFIG_ENV_OVERWRITE
261 #ifdef CONFIG_CMD_NAND
262 #define CONFIG_MTD_DEVICE
264 #define CONFIG_MTD_DEBUG
265 #define CONFIG_MTD_DEBUG_VERBOSE 4
267 #define CONFIG_NAND_MXS
268 #define CONFIG_NAND_MXS_NO_BBM_SWAP
269 #define CONFIG_APBH_DMA
270 #define CONFIG_APBH_DMA_BURST
271 #define CONFIG_APBH_DMA_BURST8
272 #define CONFIG_CMD_NAND_TRIMFFS
273 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
274 #define CONFIG_SYS_MAX_FLASH_BANKS 1
275 #define CONFIG_SYS_NAND_MAX_CHIPS 1
276 #define CONFIG_SYS_MAX_NAND_DEVICE 1
277 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
278 #define CONFIG_SYS_NAND_USE_FLASH_BBT
279 #define CONFIG_SYS_NAND_BASE 0x00000000
280 #define CONFIG_CMD_ROMUPDATE
282 #undef CONFIG_ENV_IS_IN_NAND
283 #endif /* CONFIG_CMD_NAND */
285 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
286 #define CONFIG_ENV_SIZE SZ_128K
287 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
288 #ifdef CONFIG_ENV_OFFSET_REDUND
289 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
291 xstr(CONFIG_SYS_ENV_PART_SIZE) \
293 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
295 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
297 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
298 #endif /* CONFIG_ENV_OFFSET_REDUND */
303 #ifdef CONFIG_CMD_MMC
305 #define CONFIG_GENERIC_MMC
306 #define CONFIG_FSL_ESDHC
307 #define CONFIG_FSL_USDHC
308 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
309 #define CONFIG_SYS_FSL_ESDHC_NUM 2
311 #define CONFIG_DOS_PARTITION
312 #define CONFIG_CMD_FAT
313 #define CONFIG_CMD_EXT2
316 * Environments on MMC
318 #ifdef CONFIG_ENV_IS_IN_MMC
319 #define CONFIG_SYS_MMC_ENV_DEV 0
320 #undef CONFIG_ENV_OFFSET
321 #undef CONFIG_ENV_SIZE
322 /* Associated with the MMC layout defined in mmcops.c */
323 #define CONFIG_ENV_OFFSET SZ_1K
324 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
325 #define CONFIG_DYNAMIC_MMC_DEVNO
326 #endif /* CONFIG_ENV_IS_IN_MMC */
328 #undef CONFIG_ENV_IS_IN_MMC
329 #endif /* CONFIG_CMD_MMC */
331 #ifdef CONFIG_ENV_IS_NOWHERE
332 #undef CONFIG_ENV_SIZE
333 #define CONFIG_ENV_SIZE SZ_4K
336 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
337 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
338 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
340 CONFIG_SYS_ENV_PART_STR \
341 "4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
342 xstr(CONFIG_SYS_DTB_PART_SIZE) \
344 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
345 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
347 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
348 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
349 GENERATED_GBL_DATA_SIZE)
351 #endif /* __CONFIG_H */