2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
42 #ifdef CONFIG_SYS_LVDS_IF
49 * Memory configuration options
51 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
52 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
53 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
54 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
56 #define PHYS_SDRAM_1_WIDTH 64
58 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
61 #define CONFIG_SYS_SDRAM_CLK 528
63 #define CONFIG_SYS_SDRAM_CLK 400
65 #define CONFIG_STACKSIZE SZ_128K
66 #define CONFIG_SYS_MALLOC_LEN SZ_8M
67 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
68 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
71 * U-Boot general configurations
73 #define CONFIG_SYS_LONGHELP
75 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
77 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
79 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
80 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
81 sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */
82 #define CONFIG_SYS_MAXARGS 64 /* Max number of command args */
83 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
84 /* Boot argument buffer size */
85 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
86 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
87 #define CONFIG_CMDLINE_EDITING /* Command history etc */
89 #define CONFIG_SYS_64BIT_VSPRINTF
90 #define CONFIG_SYS_NO_FLASH
93 * Flattened Device Tree (FDT) support
96 #define CONFIG_OF_LIBFDT
97 #ifdef CONFIG_OF_LIBFDT
98 #define CONFIG_FDT_FIXUP_PARTITIONS
99 #define CONFIG_OF_BOARD_SETUP
101 #define CONFIG_DEFAULT_DEVICE_TREE tx6q
102 #define CONFIG_ARCH_DEVICE_TREE mx6q
104 #define CONFIG_DEFAULT_DEVICE_TREE tx6dl
105 #define CONFIG_ARCH_DEVICE_TREE mx6dl
107 #define CONFIG_SYS_FDT_ADDR (PHYS_SDRAM_1 + SZ_16M)
108 #endif /* CONFIG_OF_LIBFDT */
109 #endif /* CONFIG_MFG */
114 #define xstr(s) str(s)
116 #define __pfx(x, s) (x##s)
117 #define _pfx(x, s) __pfx(x, s)
119 #define CONFIG_CMDLINE_TAG
120 #define CONFIG_INITRD_TAG
121 #define CONFIG_SETUP_MEMORY_TAGS
122 #define CONFIG_SERIAL_TAG
124 #define CONFIG_BOOTDELAY 1
126 #define CONFIG_BOOTDELAY 0
128 #define CONFIG_ZERO_BOOTDELAY_CHECK
129 #define CONFIG_SYS_AUTOLOAD "no"
131 #define CONFIG_BOOTFILE "uImage"
132 #define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
133 #define CONFIG_BOOTCOMMAND "run bootcmd_nand"
135 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
136 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
137 #define CONFIG_DELAY_ENVIRONMENT
138 #endif /* CONFIG_MFG */
139 #define CONFIG_LOADADDR 18000000
140 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
141 #define CONFIG_IMX_WATCHDOG
142 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
148 #ifdef CONFIG_ENV_IS_NOWHERE
149 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "fdtaddr=11000000\0" \
154 "mtdids=" MTDIDS_DEFAULT "\0" \
155 "mtdparts=" MTDPARTS_DEFAULT "\0"
157 #define CONFIG_EXTRA_ENV_SETTINGS \
159 "baseboard=stk5-v3\0" \
160 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
161 " root=/dev/mmcblk0p3 rootwait\0" \
162 "bootargs_nand=run default_bootargs;set bootargs ${bootargs}" \
163 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
164 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
165 " root=/dev/nfs ip=dhcp nfsroot=${nfs_server}:${nfsroot},nolock\0"\
166 "bootcmd_mmc=set autostart no;run bootargs_mmc;" \
167 "fatload mmc 0 ${loadaddr} uImage;run bootm_cmd\0" \
168 "bootcmd_nand=set autostart no;run bootargs_nand;" \
169 "nboot linux;run bootm_cmd\0" \
170 "bootcmd_net=set autostart no;run bootargs_nfs;dhcp;" \
172 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
175 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
176 " ${append_bootargs}\0" \
177 "fdtaddr=11000000\0" \
178 "fdtsave=nand erase.part dtb;nand write ${fdtaddr} dtb ${fdtsize}\0" \
179 "mtdids=" MTDIDS_DEFAULT "\0" \
180 "mtdparts=" MTDPARTS_DEFAULT "\0" \
181 "nfsroot=/tftpboot/rootfs\0" \
182 "otg_mode=device\0" \
183 "touchpanel=tsc2007\0" \
185 #endif /* CONFIG_ENV_IS_NOWHERE */
186 #endif /* CONFIG_MFG */
188 #define MTD_NAME "gpmi-nand"
189 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
190 #define CONFIG_SYS_NAND_ONFI_DETECTION
195 #include <config_cmd_default.h>
196 #define CONFIG_CMD_CACHE
197 #define CONFIG_CMD_MMC
198 #define CONFIG_CMD_NAND
199 #define CONFIG_CMD_MTDPARTS
200 #define CONFIG_CMD_BOOTCE
201 #define CONFIG_CMD_TIME
202 #define CONFIG_CMD_I2C
203 #define CONFIG_CMD_MEMTEST
208 #define CONFIG_MXC_UART
209 #define CONFIG_MXC_UART_BASE UART1_BASE
210 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
211 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
212 #define CONFIG_SYS_CONSOLE_INFO_QUIET
217 #define CONFIG_MXC_GPIO
222 #define CONFIG_FEC_MXC
223 #ifdef CONFIG_FEC_MXC
224 /* This is required for the FEC driver to work with cache enabled */
225 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
226 #define CONFIG_SYS_CACHELINE_SIZE 64
228 #define IMX_FEC_BASE ENET_BASE_ADDR
229 #define CONFIG_FEC_MXC_PHYADDR 0
230 #define CONFIG_PHYLIB
231 #define CONFIG_PHY_SMSC
233 #define CONFIG_FEC_XCV_TYPE RMII
234 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
235 #define CONFIG_CMD_MII
236 #define CONFIG_CMD_DHCP
237 #define CONFIG_CMD_PING
238 /* Add for working with "strict" DHCP server */
239 #define CONFIG_BOOTP_SUBNETMASK
240 #define CONFIG_BOOTP_GATEWAY
241 #define CONFIG_BOOTP_DNS
247 #ifdef CONFIG_CMD_I2C
248 #define CONFIG_HARD_I2C
249 #define CONFIG_I2C_MXC
250 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
251 #define CONFIG_SYS_I2C_MX6_PORT1
252 #define CONFIG_SYS_I2C_SPEED 400000
253 #define CONFIG_SYS_I2C_SLAVE 0x3c
256 #ifndef CONFIG_ENV_IS_NOWHERE
257 /* define one of the following options:
258 #define CONFIG_ENV_IS_IN_NAND
259 #define CONFIG_ENV_IS_IN_MMC
261 #define CONFIG_ENV_IS_IN_NAND
263 #define CONFIG_ENV_OVERWRITE
268 #ifdef CONFIG_CMD_NAND
269 #define CONFIG_MTD_DEVICE
271 #define CONFIG_MTD_DEBUG
272 #define CONFIG_MTD_DEBUG_VERBOSE 4
274 #define CONFIG_NAND_MXS
275 #define CONFIG_NAND_MXS_NO_BBM_SWAP
276 #define CONFIG_APBH_DMA
277 #define CONFIG_APBH_DMA_BURST
278 #define CONFIG_APBH_DMA_BURST8
279 #define CONFIG_CMD_NAND_TRIMFFS
280 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
281 #define CONFIG_SYS_MAX_FLASH_BANKS 1
282 #define CONFIG_SYS_NAND_MAX_CHIPS 1
283 #define CONFIG_SYS_MAX_NAND_DEVICE 1
284 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
285 #define CONFIG_SYS_NAND_USE_FLASH_BBT
286 #define CONFIG_SYS_NAND_BASE 0x00000000
287 #define CONFIG_CMD_ROMUPDATE
289 #undef CONFIG_ENV_IS_IN_NAND
290 #endif /* CONFIG_CMD_NAND */
292 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
293 #define CONFIG_ENV_SIZE SZ_128K
294 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
295 #ifdef CONFIG_ENV_OFFSET_REDUND
296 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
298 xstr(CONFIG_SYS_ENV_PART_SIZE) \
300 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
302 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
304 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
305 #endif /* CONFIG_ENV_OFFSET_REDUND */
310 #ifdef CONFIG_CMD_MMC
312 #define CONFIG_GENERIC_MMC
313 #define CONFIG_FSL_ESDHC
314 #define CONFIG_FSL_USDHC
315 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
316 #define CONFIG_SYS_FSL_ESDHC_NUM 2
318 #define CONFIG_DOS_PARTITION
319 #define CONFIG_CMD_FAT
320 #define CONFIG_CMD_EXT2
323 * Environments on MMC
325 #ifdef CONFIG_ENV_IS_IN_MMC
326 #define CONFIG_SYS_MMC_ENV_DEV 0
327 #undef CONFIG_ENV_OFFSET
328 #undef CONFIG_ENV_SIZE
329 /* Associated with the MMC layout defined in mmcops.c */
330 #define CONFIG_ENV_OFFSET SZ_1K
331 #define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
332 #define CONFIG_DYNAMIC_MMC_DEVNO
333 #endif /* CONFIG_ENV_IS_IN_MMC */
335 #undef CONFIG_ENV_IS_IN_MMC
336 #endif /* CONFIG_CMD_MMC */
338 #ifdef CONFIG_ENV_IS_NOWHERE
339 #undef CONFIG_ENV_SIZE
340 #define CONFIG_ENV_SIZE SZ_4K
343 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
344 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
345 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
347 CONFIG_SYS_ENV_PART_STR \
348 "4m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
349 xstr(CONFIG_SYS_DTB_PART_SIZE) \
351 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
352 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
354 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
355 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
356 GENERATED_GBL_DATA_SIZE)
358 #endif /* __CONFIG_H */