2 * Copyright (C) 2012-2015 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <linux/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
17 #define CONFIG_SYS_MX6_HCLK 24000000
18 #define CONFIG_SYS_MX6_CLK32 32768
19 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
20 #define CONFIG_SHOW_ACTIVITY
21 #define CONFIG_ARCH_CPU_INIT
22 #define CONFIG_DISPLAY_BOARDINFO
23 #define CONFIG_BOARD_LATE_INIT
24 #define CONFIG_BOARD_EARLY_INIT_F
25 #define CONFIG_SYS_GENERIC_BOARD
27 #ifndef CONFIG_TX6_UBOOT_MFG
28 /* LCD Logo and Splash screen support */
30 #define CONFIG_SPLASH_SCREEN
31 #define CONFIG_SPLASH_SCREEN_ALIGN
32 #define CONFIG_VIDEO_IPUV3
33 #define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
34 #define CONFIG_LCD_LOGO
35 #define LCD_BPP LCD_COLOR32
36 #define CONFIG_CMD_BMP
37 #define CONFIG_VIDEO_BMP_RLE8
38 #endif /* CONFIG_LCD */
39 #endif /* CONFIG_TX6_UBOOT_MFG */
42 * Memory configuration options
44 #define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
45 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
46 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
47 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
48 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
49 #define PHYS_SDRAM_1_WIDTH 32
50 #elif defined(CONFIG_SYS_SDRAM_BUS_WIDTH_16)
51 #define PHYS_SDRAM_1_WIDTH 16
53 #define PHYS_SDRAM_1_WIDTH 64
55 #define PHYS_SDRAM_1_SIZE (SZ_512M / 32 * PHYS_SDRAM_1_WIDTH)
56 #ifdef CONFIG_SOC_MX6Q
57 #define CONFIG_SYS_SDRAM_CLK 528
59 #define CONFIG_SYS_SDRAM_CLK 400
61 #define CONFIG_STACKSIZE SZ_128K
62 #define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
63 #define CONFIG_SYS_MALLOC_LEN SZ_8M
64 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
65 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
68 * U-Boot general configurations
70 #define CONFIG_SYS_LONGHELP
71 #if defined(CONFIG_SOC_MX6Q)
72 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
73 #elif defined(CONFIG_SOC_MX6DL)
74 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
75 #elif defined(CONFIG_SOC_MX6S)
76 #define CONFIG_SYS_PROMPT "TX6S U-Boot > "
78 #error Unsupported i.MX6 processor variant
80 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
81 #define CONFIG_SYS_PBSIZE \
82 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
83 /* Print buffer size */
84 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
85 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
86 /* Boot argument buffer size */
87 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
88 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
89 #define CONFIG_CMDLINE_EDITING /* Command history etc */
91 #define CONFIG_SYS_64BIT_VSPRINTF
94 * Flattened Device Tree (FDT) support
96 #ifdef CONFIG_OF_LIBFDT
97 #ifdef CONFIG_TX6_NAND
99 #endif /* CONFIG_OF_LIBFDT */
104 #define xstr(s) str(s)
106 #define __pfx(x, s) (x##s)
107 #define _pfx(x, s) __pfx(x, s)
109 #define CONFIG_CMDLINE_TAG
110 #define CONFIG_INITRD_TAG
111 #define CONFIG_SETUP_MEMORY_TAGS
112 #ifndef CONFIG_TX6_UBOOT_MFG
113 #define CONFIG_BOOTDELAY 1
115 #define CONFIG_BOOTDELAY 0
117 #define CONFIG_ZERO_BOOTDELAY_CHECK
118 #define CONFIG_SYS_AUTOLOAD "no"
119 #define DEFAULT_BOOTCMD "run bootcmd_${boot_mode} bootm_cmd"
120 #define CONFIG_BOOTFILE "uImage"
121 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
122 #ifndef CONFIG_TX6_UBOOT_MFG
123 #define CONFIG_BOOTCOMMAND DEFAULT_BOOTCMD
125 #define CONFIG_BOOTCOMMAND "set bootcmd '" DEFAULT_BOOTCMD "';" \
126 "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
127 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
128 #define CONFIG_DELAY_ENVIRONMENT
129 #endif /* CONFIG_TX6_UBOOT_MFG */
130 #define CONFIG_LOADADDR 18000000
131 #define CONFIG_FDTADDR 11000000
132 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
133 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
134 #ifndef CONFIG_SYS_LVDS_IF
135 #define DEFAULT_VIDEO_MODE "VGA"
137 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
143 #ifdef CONFIG_TX6_UBOOT_NOENV
144 #define CONFIG_EXTRA_ENV_SETTINGS \
148 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
149 "mtdids=" MTDIDS_DEFAULT "\0" \
150 "mtdparts=" MTDPARTS_DEFAULT "\0"
152 #define CONFIG_EXTRA_ENV_SETTINGS \
154 "baseboard=stk5-v3\0" \
155 "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
156 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
157 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
159 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
160 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
162 "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
163 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
164 "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
166 "bootcmd_mmc=set autostart no;run bootargs_mmc" \
167 ";fatload mmc 0 ${loadaddr} uImage\0" \
168 CONFIG_SYS_BOOT_CMD_NAND \
169 "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
171 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
172 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
174 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
175 " ${append_bootargs}\0" \
178 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
179 CONFIG_SYS_FDTSAVE_CMD \
180 "mtdids=" MTDIDS_DEFAULT "\0" \
181 "mtdparts=" MTDPARTS_DEFAULT "\0" \
182 "nfsroot=/tftpboot/rootfs\0" \
183 "otg_mode=device\0" \
185 "touchpanel=tsc2007\0" \
186 "video_mode=" DEFAULT_VIDEO_MODE "\0"
187 #endif /* CONFIG_ENV_IS_NOWHERE */
189 #ifdef CONFIG_TX6_NAND
190 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
191 #define CONFIG_SYS_BOOT_CMD_NAND \
192 "bootcmd_nand=set autostart no;run bootargs_ubifs;nboot linux\0"
193 #define CONFIG_SYS_FDTSAVE_CMD \
194 "fdtsave=fdt resize;nand erase.part dtb" \
195 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
196 #define MTD_NAME "gpmi-nand"
197 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
198 #define CONFIG_SYS_NAND_ONFI_DETECTION
199 #define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
200 #define ROOTPART_UUID_STR ""
201 #define EMMC_BOOT_ACK_STR ""
202 #define EMMC_BOOT_PART_STR ""
204 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
205 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
206 #define CONFIG_SYS_BOOT_CMD_NAND ""
207 #define CONFIG_SYS_FDTSAVE_CMD \
208 "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} ${emmc_boot_part}" \
209 ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
210 ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
212 #define MTDIDS_DEFAULT ""
213 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
214 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
215 #define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
216 #define EMMC_BOOT_PART_STR "emmc_boot_part=" \
217 xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
218 #endif /* CONFIG_TX6_NAND */
223 #define CONFIG_MXC_UART
224 #define CONFIG_MXC_UART_BASE UART1_BASE
225 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
226 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
227 #define CONFIG_SYS_CONSOLE_INFO_QUIET
232 #define CONFIG_MXC_GPIO
237 #ifdef CONFIG_FEC_MXC
238 /* This is required for the FEC driver to work with cache enabled */
239 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
241 #define IMX_FEC_BASE ENET_BASE_ADDR
242 #define CONFIG_FEC_XCV_TYPE RMII
248 #ifdef CONFIG_SYS_I2C
249 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
250 #define CONFIG_SYS_I2C_SPEED 400000
251 #if defined(CONFIG_TX6_REV)
252 #if CONFIG_TX6_REV == 0x1
253 #define CONFIG_SYS_I2C_SLAVE 0x3c
254 #define CONFIG_LTC3676
255 #elif CONFIG_TX6_REV == 0x2
256 #define CONFIG_SYS_I2C_SLAVE 0x32
257 #define CONFIG_RN5T618
258 #elif CONFIG_TX6_REV == 0x3
259 #define CONFIG_SYS_I2C_SLAVE 0x33
260 #define CONFIG_RN5T567
262 #error Unsupported TX6 module revision
264 #endif /* CONFIG_TX6_REV */
265 /* autodetect which PMIC is present to derive TX6_REV */
266 #define CONFIG_LTC3676 /* TX6_REV == 1 */
267 #define CONFIG_RN5T567 /* TX6_REV == 3 */
268 #endif /* CONFIG_CMD_I2C */
270 #define CONFIG_ENV_OVERWRITE
275 #ifdef CONFIG_TX6_NAND
276 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
277 #define CONFIG_SYS_MAX_FLASH_BANKS 0x1
278 #define CONFIG_SYS_NAND_MAX_CHIPS 0x1
279 #define CONFIG_SYS_MAX_NAND_DEVICE 0x1
280 #define CONFIG_SYS_NAND_BASE 0x00000000
281 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
283 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
284 #define CONFIG_ENV_SIZE SZ_128K
285 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
287 #undef CONFIG_ENV_IS_IN_NAND
288 #endif /* CONFIG_TX6_NAND */
290 #ifdef CONFIG_ENV_OFFSET_REDUND
291 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
293 xstr(CONFIG_SYS_ENV_PART_SIZE) \
295 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
297 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
299 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
300 #endif /* CONFIG_ENV_OFFSET_REDUND */
305 #ifdef CONFIG_FSL_ESDHC
306 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
308 #ifdef CONFIG_CMD_MMC
309 #define CONFIG_CMD_FAT
310 #define CONFIG_FAT_WRITE
311 #define CONFIG_CMD_EXT2
314 * Environments on MMC
316 #ifdef CONFIG_ENV_IS_IN_MMC
317 #define CONFIG_SYS_MMC_ENV_DEV 0
318 #define CONFIG_SYS_MMC_ENV_PART 0x1
319 #define CONFIG_DYNAMIC_MMC_DEVNO
320 #endif /* CONFIG_ENV_IS_IN_MMC */
322 #undef CONFIG_ENV_IS_IN_MMC
323 #endif /* CONFIG_CMD_MMC */
325 #ifdef CONFIG_ENV_IS_NOWHERE
326 #undef CONFIG_ENV_SIZE
327 #define CONFIG_ENV_SIZE SZ_4K
330 #ifdef CONFIG_TX6_NAND
331 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
332 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
333 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
335 CONFIG_SYS_ENV_PART_STR \
336 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
337 xstr(CONFIG_SYS_DTB_PART_SIZE) \
338 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
339 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
340 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
342 #define MTDPARTS_DEFAULT ""
345 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
346 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
347 GENERATED_GBL_DATA_SIZE)
349 #endif /* __CONFIG_H */