2 * Copyright (C) 2012 <LW@KARO-electronics.de>
4 * SPDX-License-Identifier: GPL-2.0
11 #include <asm/sizes.h>
12 #include <asm/arch/imx-regs.h>
15 * Ka-Ro TX6 board - SoC configuration
18 #define CONFIG_SYS_MX6_HCLK 24000000
19 #define CONFIG_SYS_MX6_CLK32 32768
20 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
21 #define CONFIG_SHOW_ACTIVITY
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_BOARDINFO
24 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_BOARD_EARLY_INIT_F
28 /* LCD Logo and Splash screen support */
31 #define CONFIG_SPLASH_SCREEN
32 #define CONFIG_SPLASH_SCREEN_ALIGN
33 #define CONFIG_VIDEO_IPUV3
34 #define CONFIG_IPUV3_CLK 266000000
35 #define CONFIG_LCD_LOGO
36 #define LCD_BPP LCD_COLOR24
37 #define CONFIG_CMD_BMP
38 #define CONFIG_VIDEO_BMP_RLE8
39 #endif /* CONFIG_LCD */
40 #endif /* CONFIG_MFG */
43 * Memory configuration options
45 #define CONFIG_NR_DRAM_BANKS 1 /* # of SDRAM banks */
46 #define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
47 #ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
48 #define PHYS_SDRAM_1_WIDTH CONFIG_SYS_SDRAM_BUS_WIDTH
50 #define PHYS_SDRAM_1_WIDTH 64
52 #define PHYS_SDRAM_1_SIZE (SZ_512M * (PHYS_SDRAM_1_WIDTH / 32))
55 #define CONFIG_SYS_SDRAM_CLK 528
57 #define CONFIG_SYS_SDRAM_CLK 400
59 #define CONFIG_STACKSIZE SZ_128K
60 #define CONFIG_SYS_MALLOC_LEN SZ_8M
61 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
62 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
65 * U-Boot general configurations
67 #define CONFIG_SYS_LONGHELP
69 #define CONFIG_SYS_PROMPT "TX6Q U-Boot > "
71 #define CONFIG_SYS_PROMPT "TX6DL U-Boot > "
73 #define CONFIG_SYS_CBSIZE 2048 /* Console I/O buffer size */
74 #define CONFIG_SYS_PBSIZE \
75 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
76 /* Print buffer size */
77 #define CONFIG_SYS_MAXARGS 256 /* Max number of command args */
78 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
79 /* Boot argument buffer size */
80 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
81 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
82 #define CONFIG_CMDLINE_EDITING /* Command history etc */
84 #define CONFIG_SYS_64BIT_VSPRINTF
85 #define CONFIG_SYS_NO_FLASH
88 * Flattened Device Tree (FDT) support
91 #define CONFIG_OF_LIBFDT
92 #ifdef CONFIG_OF_LIBFDT
94 #define CONFIG_FDT_FIXUP_PARTITIONS
96 #define CONFIG_OF_BOARD_SETUP
97 #endif /* CONFIG_OF_LIBFDT */
98 #endif /* CONFIG_MFG */
103 #define xstr(s) str(s)
105 #define __pfx(x, s) (x##s)
106 #define _pfx(x, s) __pfx(x, s)
108 #define CONFIG_CMDLINE_TAG
109 #define CONFIG_INITRD_TAG
110 #define CONFIG_SETUP_MEMORY_TAGS
112 #define CONFIG_BOOTDELAY 1
114 #define CONFIG_BOOTDELAY 0
116 #define CONFIG_ZERO_BOOTDELAY_CHECK
117 #define CONFIG_SYS_AUTOLOAD "no"
119 #define CONFIG_BOOTFILE "uImage"
120 #define CONFIG_BOOTARGS "init=/linuxrc console=ttymxc0,115200 ro debug panic=1"
121 #define CONFIG_BOOTCOMMAND "run bootcmd_${boot_mode} bootm_cmd"
123 #define CONFIG_BOOTCOMMAND "env import " xstr(CONFIG_BOOTCMD_MFG_LOADADDR) ";run bootcmd_mfg"
124 #define CONFIG_BOOTCMD_MFG_LOADADDR 10500000
125 #define CONFIG_DELAY_ENVIRONMENT
126 #endif /* CONFIG_MFG */
127 #define CONFIG_LOADADDR 18000000
128 #define CONFIG_FDTADDR 10001000
129 #define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
130 #define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
131 #define CONFIG_IMX_WATCHDOG
132 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000
133 #ifndef CONFIG_SYS_LVDS_IF
134 #define DEFAULT_VIDEO_MODE "VGA"
136 #define DEFAULT_VIDEO_MODE "HSD100PXN1"
143 #ifdef CONFIG_ENV_IS_NOWHERE
144 #define CONFIG_EXTRA_ENV_SETTINGS \
148 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
149 "mtdids=" MTDIDS_DEFAULT "\0" \
150 "mtdparts=" MTDPARTS_DEFAULT "\0"
152 #define CONFIG_EXTRA_ENV_SETTINGS \
154 "baseboard=stk5-v3\0" \
155 "bootargs_jffs2=run default_bootargs;set bootargs ${bootargs}" \
156 " root=/dev/mtdblock3 rootfstype=jffs2\0" \
157 "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
159 "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}" \
160 " root=/dev/nfs nfsroot=${nfs_server}:${nfsroot},nolock" \
162 "bootargs_ubifs=run default_bootargs;set bootargs ${bootargs}" \
163 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs\0" \
164 "bootcmd_jffs2=set autostart no;run bootargs_jffs2" \
166 "bootcmd_mmc=set autostart no;run bootargs_mmc" \
167 ";fatload mmc 0 ${loadaddr} uImage\0" \
168 CONFIG_SYS_BOOT_CMD_NAND \
169 "bootcmd_net=set autoload y;set autostart n;run bootargs_nfs" \
171 "bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
172 "boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
174 "default_bootargs=set bootargs " CONFIG_BOOTARGS \
175 " ${append_bootargs}\0" \
176 "fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
177 CONFIG_SYS_FDTSAVE_CMD \
178 "mtdids=" MTDIDS_DEFAULT "\0" \
179 "mtdparts=" MTDPARTS_DEFAULT "\0" \
180 "nfsroot=/tftpboot/rootfs\0" \
181 "otg_mode=device\0" \
183 "touchpanel=tsc2007\0" \
184 "video_mode=" DEFAULT_VIDEO_MODE "\0"
185 #endif /* CONFIG_ENV_IS_NOWHERE */
186 #endif /* CONFIG_MFG */
188 #ifndef CONFIG_TX6_V2
189 #define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
190 #define CONFIG_SYS_BOOT_CMD_NAND \
191 "bootcmd_nand=set autostart no;run bootargs_ubifs;nboot linux\0"
192 #define CONFIG_SYS_FDTSAVE_CMD \
193 "fdtsave=fdt resize;nand erase.part dtb" \
194 ";nand write ${fdtaddr} dtb ${fdtsize}\0"
195 #define MTD_NAME "gpmi-nand"
196 #define MTDIDS_DEFAULT "nand0=" MTD_NAME
197 #define CONFIG_SYS_NAND_ONFI_DETECTION
198 #define MMC_ROOT_STR " root=dev/mmcblk0p2 rootwait\0"
199 #define ROOTPART_UUID_STR ""
201 #define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
202 #define CONFIG_SYS_BOOT_CMD_NAND ""
203 #define CONFIG_SYS_FDTSAVE_CMD \
204 "fdtsave=mmc open 0 1;mmc write ${fdtaddr} " \
205 xstr(CONFIG_SYS_DTB_BLKNO) " 80;mmc close 0 1\0"
206 #define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
207 #define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
209 #define MTDIDS_DEFAULT ""
210 #define CONFIG_SUPPORT_EMMC_BOOT
211 #define CONFIG_MMC_BOOT_DEV 0
217 #include <config_cmd_default.h>
218 #define CONFIG_CMD_CACHE
219 #define CONFIG_CMD_MMC
220 #ifndef CONFIG_TX6_V2
221 #define CONFIG_CMD_NAND
222 #define CONFIG_CMD_MTDPARTS
224 #define CONFIG_CMD_BOOTCE
225 #define CONFIG_CMD_TIME
226 #define CONFIG_CMD_I2C
227 #define CONFIG_CMD_MEMTEST
232 #define CONFIG_MXC_UART
233 #define CONFIG_MXC_UART_BASE UART1_BASE
234 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
235 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
236 #define CONFIG_SYS_CONSOLE_INFO_QUIET
241 #define CONFIG_MXC_GPIO
246 #define CONFIG_FEC_MXC
247 #ifdef CONFIG_FEC_MXC
248 /* This is required for the FEC driver to work with cache enabled */
249 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
250 #define CONFIG_SYS_CACHELINE_SIZE 64
252 #define IMX_FEC_BASE ENET_BASE_ADDR
253 #define CONFIG_FEC_MXC_PHYADDR 0
254 #define CONFIG_PHYLIB
255 #define CONFIG_PHY_SMSC
257 #define CONFIG_FEC_XCV_TYPE RMII
258 #define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
259 #define CONFIG_CMD_MII
260 #define CONFIG_CMD_DHCP
261 #define CONFIG_CMD_PING
262 /* Add for working with "strict" DHCP server */
263 #define CONFIG_BOOTP_SUBNETMASK
264 #define CONFIG_BOOTP_GATEWAY
265 #define CONFIG_BOOTP_DNS
271 #ifdef CONFIG_CMD_I2C
272 #define CONFIG_HARD_I2C
273 #define CONFIG_I2C_MXC
274 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
275 #define CONFIG_SYS_I2C_MX6_PORT1
276 #define CONFIG_SYS_I2C_SPEED 400000
277 #ifndef CONFIG_TX6_V2
278 #define CONFIG_SYS_I2C_SLAVE 0x3c
280 #define CONFIG_SYS_I2C_SLAVE 0x32
284 #ifndef CONFIG_ENV_IS_NOWHERE
285 /* define one of the following options:
286 #define CONFIG_ENV_IS_IN_NAND
287 #define CONFIG_ENV_IS_IN_MMC
289 #define CONFIG_ENV_IS_IN_NAND
291 #define CONFIG_ENV_OVERWRITE
296 #ifdef CONFIG_CMD_NAND
297 #define CONFIG_MTD_DEVICE
299 #define CONFIG_MTD_DEBUG
300 #define CONFIG_MTD_DEBUG_VERBOSE 4
302 #define CONFIG_NAND_MXS
303 #define CONFIG_NAND_MXS_NO_BBM_SWAP
304 #define CONFIG_APBH_DMA
305 #define CONFIG_APBH_DMA_BURST
306 #define CONFIG_APBH_DMA_BURST8
307 #define CONFIG_CMD_NAND_TRIMFFS
308 #define CONFIG_SYS_MXS_DMA_CHANNEL 4
309 #define CONFIG_SYS_MAX_FLASH_BANKS 1
310 #define CONFIG_SYS_NAND_MAX_CHIPS 1
311 #define CONFIG_SYS_MAX_NAND_DEVICE 1
312 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
313 #define CONFIG_SYS_NAND_USE_FLASH_BBT
314 #define CONFIG_SYS_NAND_BASE 0x00000000
315 #define CONFIG_CMD_ROMUPDATE
317 #define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
318 #define CONFIG_ENV_SIZE SZ_128K
319 #define CONFIG_ENV_RANGE (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
321 #undef CONFIG_ENV_IS_IN_NAND
322 #endif /* CONFIG_CMD_NAND */
324 #ifdef CONFIG_ENV_OFFSET_REDUND
325 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
327 xstr(CONFIG_SYS_ENV_PART_SIZE) \
329 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE) "(userfs)"
331 #define CONFIG_SYS_ENV_PART_STR xstr(CONFIG_SYS_ENV_PART_SIZE) \
333 #define CONFIG_SYS_USERFS_PART_STR xstr(CONFIG_SYS_USERFS_PART_SIZE2) "(userfs)"
334 #endif /* CONFIG_ENV_OFFSET_REDUND */
339 #ifdef CONFIG_CMD_MMC
341 #define CONFIG_GENERIC_MMC
342 #define CONFIG_FSL_ESDHC
343 #define CONFIG_FSL_USDHC
344 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
346 #define CONFIG_DOS_PARTITION
347 #define CONFIG_CMD_FAT
348 #define CONFIG_FAT_WRITE
349 #define CONFIG_CMD_EXT2
352 * Environments on MMC
354 #ifdef CONFIG_ENV_IS_IN_MMC
355 #define CONFIG_SYS_MMC_ENV_DEV 0
356 #define CONFIG_SYS_MMC_ENV_PART 1
357 #define CONFIG_DYNAMIC_MMC_DEVNO
358 #endif /* CONFIG_ENV_IS_IN_MMC */
360 #undef CONFIG_ENV_IS_IN_MMC
361 #endif /* CONFIG_CMD_MMC */
363 #ifdef CONFIG_ENV_IS_NOWHERE
364 #undef CONFIG_ENV_SIZE
365 #define CONFIG_ENV_SIZE SZ_4K
368 #ifndef CONFIG_TX6_V2
369 #define MTDPARTS_DEFAULT "mtdparts=" MTD_NAME ":" \
370 xstr(CONFIG_SYS_U_BOOT_PART_SIZE) \
371 "@" xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) \
373 CONFIG_SYS_ENV_PART_STR \
374 "6m(linux),32m(rootfs)," CONFIG_SYS_USERFS_PART_STR "," \
375 xstr(CONFIG_SYS_DTB_PART_SIZE) \
376 "@" xstr(CONFIG_SYS_NAND_DTB_OFFSET) "(dtb)," \
377 xstr(CONFIG_SYS_NAND_BBT_SIZE) \
378 "@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
380 #define MTDPARTS_DEFAULT ""
383 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
384 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
385 GENERATED_GBL_DATA_SIZE)
387 #endif /* __CONFIG_H */