2 * Copyright (C) ST-Ericsson SA 2009
4 * SPDX-License-Identifier: GPL-2.0+
11 * High Level Configuration Options
16 #define CONFIG_SYS_MEMTEST_START 0x00000000
17 #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
19 #define CONFIG_BOARD_EARLY_INIT_F
20 #define CONFIG_BOARD_LATE_INIT
23 * Size of malloc() pool
25 #ifdef CONFIG_BOOT_SRAM
26 #define CONFIG_ENV_SIZE (32*1024)
27 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 64*1024)
29 #define CONFIG_ENV_SIZE (128*1024)
30 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024)
36 #define CONFIG_PL011_SERIAL
37 #define CONFIG_PL011_SERIAL_RLCR
38 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
41 * U8500 UART registers base for 3 serial devices
43 #define CFG_UART0_BASE 0x80120000
44 #define CFG_UART1_BASE 0x80121000
45 #define CFG_UART2_BASE 0x80007000
46 #define CFG_SERIAL0 CFG_UART0_BASE
47 #define CFG_SERIAL1 CFG_UART1_BASE
48 #define CFG_SERIAL2 CFG_UART2_BASE
49 #define CONFIG_PL011_CLOCK 38400000
50 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
52 #define CONFIG_CONS_INDEX 2
53 #define CONFIG_BAUDRATE 115200
56 * Devices and file systems
59 #define CONFIG_GENERIC_MMC
60 #define CONFIG_DOS_PARTITION
65 #define CONFIG_CMD_MMC
66 #define CONFIG_CMD_FAT
67 #define CONFIG_CMD_EXT2
68 #define CONFIG_CMD_I2C
70 #ifndef CONFIG_BOOTDELAY
71 #define CONFIG_BOOTDELAY 1
73 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
75 #undef CONFIG_BOOTARGS
76 #define CONFIG_BOOTCOMMAND "run emmcboot"
78 #define CONFIG_EXTRA_ENV_SETTINGS \
80 "loadaddr=0x00100000\0" \
81 "console=ttyAMA2,115200n8\0" \
82 "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M " \
83 "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0" \
84 "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M " \
85 "pmem=22M@172M mem=30M@194M mem_mali=32M@224M " \
86 "pmem_hwb=54M@256M mem=202M@310M\0" \
87 "commonargs=setenv bootargs cachepolicy=writealloc noinitrd " \
89 "board_id=${board_id} " \
91 "startup_graphics=${startup_graphics}\0" \
92 "emmcargs=setenv bootargs ${bootargs} " \
93 "root=/dev/mmcblk0p2 " \
95 "addcons=setenv bootargs ${bootargs} " \
96 "console=${console}\0" \
97 "emmcboot=echo Booting from eMMC ...; " \
98 "run commonargs emmcargs addcons memargs;" \
99 "mmc read 0 ${loadaddr} 0xA0000 0x4000;" \
100 "bootm ${loadaddr}\0" \
101 "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;" \
102 "source ${loadaddr}\0" \
103 "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0" \
105 "stdout=serial,usbtty\0" \
106 "stdin=serial,usbtty\0" \
107 "stderr=serial,usbtty\0"
110 * Miscellaneous configurable options
113 #define CONFIG_SYS_LONGHELP /* undef to save memory */
114 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
116 /* Print Buffer Size */
117 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
118 + sizeof(CONFIG_SYS_PROMPT) + 16)
119 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
120 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
122 #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
123 #define CONFIG_SYS_LOADS_BAUD_CHANGE
125 #define CONFIG_SYS_HUSH_PARSER
126 #define CONFIG_CMDLINE_EDITING
128 #define CONFIG_SETUP_MEMORY_TAGS 2
129 #define CONFIG_INITRD_TAG
130 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
135 #define CONFIG_U8500_I2C
136 #undef CONFIG_HARD_I2C /* I2C with hardware support */
137 #define CONFIG_I2C_MULTI_BUS
138 #define CONFIG_SYS_I2C_SPEED 100000
139 #define CONFIG_SYS_I2C_SLAVE 0 /* slave addr of controller */
140 #define CONFIG_SYS_U8500_I2C0_BASE 0x80004000
141 #define CONFIG_SYS_U8500_I2C1_BASE 0x80122000
142 #define CONFIG_SYS_U8500_I2C2_BASE 0x80128000
143 #define CONFIG_SYS_U8500_I2C3_BASE 0x80110000
144 #define CONFIG_SYS_U8500_I2C_BUS_MAX 4
146 #define CONFIG_SYS_I2C_GPIOE_ADDR 0x42 /* GPIO expander chip addr */
147 #define CONFIG_TC35892_GPIO
150 * Physical Memory Map
152 #define CONFIG_NR_DRAM_BANKS 1
153 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
154 #define PHYS_SDRAM_SIZE_1 0x20000000 /* 512 MB */
157 * additions for new relocation code
159 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
160 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
161 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
162 CONFIG_SYS_INIT_RAM_SIZE - \
163 GENERATED_GBL_DATA_SIZE)
164 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
166 /* landing address before relocation */
167 #ifndef CONFIG_SYS_TEXT_BASE
168 #define CONFIG_SYS_TEXT_BASE 0x0
172 * MMC related configs
173 * NB Only externa SD slot is currently supported
175 #define MMC_BLOCK_SIZE 512
176 #define CONFIG_ARM_PL180_MMCI
177 #define CONFIG_ARM_PL180_MMCI_BASE 0x80126000 /* MMC base for 8500 */
178 #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
179 #define CONFIG_MMC_DEV_NUM 1
181 #define CONFIG_CMD_ENV
182 #define CONFIG_ENV_IS_IN_MMC
183 #define CONFIG_ENV_OFFSET 0x13F80000
184 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */
187 * FLASH and environment organization
189 #define CONFIG_SYS_NO_FLASH
192 * base register values for U8500
194 #define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock
196 #define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
198 #endif /* __CONFIG_H */