2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 * SPDX-License-Identifier: GPL-2.0+
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
21 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
28 enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
36 * struct dm_i2c_chip - information about an i2c chip
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
62 * struct dm_i2c_bus- information about an i2c bus
64 * An I2C bus contains 0 or more chips on it, each at its own address. The
65 * bus can operate at different speeds (measured in Hz, typically 100KHz
68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
71 * @speed_hz: Bus speed in hertz (typically 100000)
78 * dm_i2c_read() - read bytes from an I2C chip
80 * To obtain an I2C device (called a 'chip') given the I2C bus address you
81 * can use i2c_get_chip(). To obtain a bus by bus number use
82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
84 * To set the address length of a devce use i2c_set_addr_len(). It
87 * @dev: Chip to read from
88 * @offset: Offset within chip to start reading
89 * @buffer: Place to put data
90 * @len: Number of bytes to read
92 * @return 0 on success, -ve on failure
94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
97 * dm_i2c_write() - write bytes to an I2C chip
99 * See notes for dm_i2c_read() above.
101 * @dev: Chip to write to
102 * @offset: Offset within chip to start writing
103 * @buffer: Buffer containing data to write
104 * @len: Number of bytes to write
106 * @return 0 on success, -ve on failure
108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
112 * dm_i2c_probe() - probe a particular chip address
114 * This can be useful to check for the existence of a chip on the bus.
115 * It is typically implemented by writing the chip address to the bus
116 * and checking that the chip replies with an ACK.
119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
121 * @devp: Returns the device found, or NULL if none
122 * @return 0 if a chip was found at that address, -ve if not
124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
125 struct udevice **devp);
128 * dm_i2c_reg_read() - Read a value from an I2C register
130 * This reads a single value from the given address in an I2C chip
132 * @dev: Device to use for transfer
133 * @addr: Address to read from
134 * @return value read, or -ve on error
136 int dm_i2c_reg_read(struct udevice *dev, uint offset);
139 * dm_i2c_reg_write() - Write a value to an I2C register
141 * This writes a single value to the given address in an I2C chip
143 * @dev: Device to use for transfer
144 * @addr: Address to write to
145 * @val: Value to write (normally a byte)
146 * @return 0 on success, -ve on error
148 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
151 * dm_i2c_set_bus_speed() - set the speed of a bus
153 * @bus: Bus to adjust
154 * @speed: Requested speed in Hz
155 * @return 0 if OK, -EINVAL for invalid values
157 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
160 * dm_i2c_get_bus_speed() - get the speed of a bus
163 * @return speed of selected I2C bus in Hz, -ve on error
165 int dm_i2c_get_bus_speed(struct udevice *bus);
168 * i2c_set_chip_flags() - set flags for a chip
170 * Typically addresses are 7 bits, but for 10-bit addresses you should set
171 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
173 * @dev: Chip to adjust
175 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
177 int i2c_set_chip_flags(struct udevice *dev, uint flags);
180 * i2c_get_chip_flags() - get flags for a chip
182 * @dev: Chip to check
183 * @flagsp: Place to put flags
184 * @return 0 if OK, other -ve value on error
186 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
189 * i2c_set_offset_len() - set the offset length for a chip
191 * The offset used to access a chip may be up to 4 bytes long. Typically it
192 * is only 1 byte, which is enough for chips with 256 bytes of memory or
193 * registers. The default value is 1, but you can call this function to
196 * @offset_len: New offset length value (typically 1 or 2)
198 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
201 * i2c_get_offset_len() - get the offset length for a chip
203 * @return: Current offset length value (typically 1 or 2)
205 int i2c_get_chip_offset_len(struct udevice *dev);
208 * i2c_deblock() - recover a bus that is in an unknown state
210 * See the deblock() method in 'struct dm_i2c_ops' for full information
212 * @bus: Bus to recover
213 * @return 0 if OK, -ve on error
215 int i2c_deblock(struct udevice *bus);
217 #ifdef CONFIG_DM_I2C_COMPAT
219 * i2c_probe() - Compatibility function for driver model
221 * Calls dm_i2c_probe() on the current bus
223 int i2c_probe(uint8_t chip_addr);
226 * i2c_read() - Compatibility function for driver model
228 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
229 * set to @addr. @alen must match the current setting for the device.
231 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
235 * i2c_write() - Compatibility function for driver model
237 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
238 * set to @addr. @alen must match the current setting for the device.
240 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
244 * i2c_get_bus_num_fdt() - Compatibility function for driver model
246 * @return the bus number associated with the given device tree node
248 int i2c_get_bus_num_fdt(int node);
251 * i2c_get_bus_num() - Compatibility function for driver model
253 * @return the 'current' bus number
255 unsigned int i2c_get_bus_num(void);
258 * i2c_set_bus_num() - Compatibility function for driver model
260 * Sets the 'current' bus
262 int i2c_set_bus_num(unsigned int bus);
264 static inline void I2C_SET_BUS(unsigned int bus)
266 i2c_set_bus_num(bus);
269 static inline unsigned int I2C_GET_BUS(void)
271 return i2c_get_bus_num();
275 * i2c_init() - Compatibility function for driver model
277 * This function does nothing.
279 void i2c_init(int speed, int slaveaddr);
282 * board_i2c_init() - Compatibility function for driver model
284 * @param blob Device tree blbo
285 * @return the number of I2C bus
287 void board_i2c_init(const void *blob);
290 * Compatibility functions for driver model.
292 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
293 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
298 * Not all of these flags are implemented in the U-Boot API
300 enum dm_i2c_msg_flags {
301 I2C_M_TEN = 0x0010, /* ten-bit chip address */
302 I2C_M_RD = 0x0001, /* read data, from slave to master */
303 I2C_M_STOP = 0x8000, /* send stop after this message */
304 I2C_M_NOSTART = 0x4000, /* no start before this message */
305 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
306 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
307 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
308 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
312 * struct i2c_msg - an I2C message
314 * @addr: Slave address
315 * @flags: Flags (see enum dm_i2c_msg_flags)
316 * @len: Length of buffer in bytes, may be 0 for a probe
317 * @buf: Buffer to send/receive, or NULL if no data
327 * struct i2c_msg_list - a list of I2C messages
329 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
330 * appropriate in U-Boot.
332 * @msg: Pointer to i2c_msg array
333 * @nmsgs: Number of elements in the array
335 struct i2c_msg_list {
336 struct i2c_msg *msgs;
341 * struct dm_i2c_ops - driver operations for I2C uclass
343 * Drivers should support these operations unless otherwise noted. These
344 * operations are intended to be used by uclass code, not directly from
349 * xfer() - transfer a list of I2C messages
351 * @bus: Bus to read from
352 * @msg: List of messages to transfer
353 * @nmsgs: Number of messages in the list
354 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
355 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
356 * flags cannot be supported, other -ve value on some other error
358 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
361 * probe_chip() - probe for the presense of a chip address
363 * This function is optional. If omitted, the uclass will send a zero
364 * length message instead.
367 * @chip_addr: Chip address to probe
368 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
369 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
370 * to default probem other -ve value on error
372 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
375 * set_bus_speed() - set the speed of a bus (optional)
377 * The bus speed value will be updated by the uclass if this function
378 * does not return an error. This method is optional - if it is not
379 * provided then the driver can read the speed from
380 * dev_get_uclass_priv(bus)->speed_hz
382 * @bus: Bus to adjust
383 * @speed: Requested speed in Hz
384 * @return 0 if OK, -EINVAL for invalid values
386 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
389 * get_bus_speed() - get the speed of a bus (optional)
391 * Normally this can be provided by the uclass, but if you want your
392 * driver to check the bus speed by looking at the hardware, you can
393 * implement that here. This method is optional. This method would
394 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
397 * @return speed of selected I2C bus in Hz, -ve on error
399 int (*get_bus_speed)(struct udevice *bus);
402 * set_flags() - set the flags for a chip (optional)
404 * This is generally implemented by the uclass, but drivers can
405 * check the value to ensure that unsupported options are not used.
406 * This method is optional. If provided, this method will always be
407 * called when the flags change.
409 * @dev: Chip to adjust
410 * @flags: New flags value
411 * @return 0 if OK, -EINVAL if value is unsupported
413 int (*set_flags)(struct udevice *dev, uint flags);
416 * deblock() - recover a bus that is in an unknown state
418 * I2C is a synchronous protocol and resets of the processor in the
419 * middle of an access can block the I2C Bus until a powerdown of
420 * the full unit is done. This is because slaves can be stuck
421 * waiting for addition bus transitions for a transaction that will
422 * never complete. Resetting the I2C master does not help. The only
423 * way is to force the bus through a series of transitions to make
424 * sure that all slaves are done with the transaction. This method
425 * performs this 'deblocking' if support by the driver.
427 * This method is optional.
429 int (*deblock)(struct udevice *bus);
432 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
435 * i2c_get_chip() - get a device to use to access a chip on a bus
437 * This returns the device for the given chip address. The device can then
438 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
440 * @bus: Bus to examine
441 * @chip_addr: Chip address for the new device
442 * @offset_len: Length of a register offset in bytes (normally 1)
443 * @devp: Returns pointer to new device if found or -ENODEV if not
446 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
447 struct udevice **devp);
450 * i2c_get_chip() - get a device to use to access a chip on a bus number
452 * This returns the device for the given chip address on a particular bus
455 * @busnum: Bus number to examine
456 * @chip_addr: Chip address for the new device
457 * @offset_len: Length of a register offset in bytes (normally 1)
458 * @devp: Returns pointer to new device if found or -ENODEV if not
461 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
462 struct udevice **devp);
465 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
467 * This decodes the chip address from a device tree node and puts it into
468 * its dm_i2c_chip structure. This should be called in your driver's
469 * ofdata_to_platdata() method.
471 * @blob: Device tree blob
472 * @node: Node offset to read from
473 * @spi: Place to put the decoded information
475 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
476 struct dm_i2c_chip *chip);
479 * i2c_dump_msgs() - Dump a list of I2C messages
481 * This may be useful for debugging.
483 * @msg: Message list to dump
484 * @nmsgs: Number of messages
486 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
488 #ifndef CONFIG_DM_I2C
491 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
493 * The implementation MUST NOT use static or global variables if the
494 * I2C routines are used to read SDRAM configuration information
495 * because this is done before the memories are initialized. Limited
496 * use of stack-based variables are OK (the initial stack size is
499 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
503 * Configuration items.
505 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
507 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
508 /* no muxes used bus = i2c adapters */
509 #define CONFIG_SYS_I2C_DIRECT_BUS 1
510 #define CONFIG_SYS_I2C_MAX_HOPS 0
511 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
513 /* we use i2c muxes */
514 #undef CONFIG_SYS_I2C_DIRECT_BUS
517 /* define the I2C bus number for RTC and DTT if not already done */
518 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
519 #define CONFIG_SYS_RTC_BUS_NUM 0
521 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
522 #define CONFIG_SYS_DTT_BUS_NUM 0
524 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
525 #define CONFIG_SYS_SPD_BUS_NUM 0
529 void (*init)(struct i2c_adapter *adap, int speed,
531 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
532 int (*read)(struct i2c_adapter *adap, uint8_t chip,
533 uint addr, int alen, uint8_t *buffer,
535 int (*write)(struct i2c_adapter *adap, uint8_t chip,
536 uint addr, int alen, uint8_t *buffer,
538 uint (*set_bus_speed)(struct i2c_adapter *adap,
548 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
549 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
555 .set_bus_speed = _set_speed, \
557 .slaveaddr = _slaveaddr, \
559 .hwadapnr = _hwadapnr, \
563 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
564 _set_speed, _speed, _slaveaddr, _hwadapnr) \
565 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
566 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
567 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
569 struct i2c_adapter *i2c_get_adapter(int index);
571 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
577 struct i2c_next_hop {
583 struct i2c_bus_hose {
585 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
587 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
588 extern struct i2c_bus_hose i2c_bus[];
590 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
592 #define I2C_ADAPTER(bus) bus
594 #define I2C_BUS gd->cur_i2c_bus
596 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
597 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
598 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
600 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
601 #define I2C_MUX_PCA9540_ID 1
602 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
603 #define I2C_MUX_PCA9542_ID 2
604 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
605 #define I2C_MUX_PCA9544_ID 3
606 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
607 #define I2C_MUX_PCA9547_ID 4
608 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
609 #define I2C_MUX_PCA9548_ID 5
610 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
613 #ifndef I2C_SOFT_DECLARATIONS
614 # if defined(CONFIG_MPC8260)
615 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
616 # elif defined(CONFIG_8xx)
617 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
619 # elif (defined(CONFIG_AT91RM9200) || \
620 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
621 defined(CONFIG_AT91SAM9263))
622 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
624 # define I2C_SOFT_DECLARATIONS
629 /* Set default value for the I2C bus speed on 8xx. In the
630 * future, we'll define these in all 8xx board config files.
632 #ifndef CONFIG_SYS_I2C_SPEED
633 #define CONFIG_SYS_I2C_SPEED 50000
638 * Many boards/controllers/drivers don't support an I2C slave interface so
639 * provide a default slave address for them for use in common code. A real
640 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
641 * support a slave interface.
643 #ifndef CONFIG_SYS_I2C_SLAVE
644 #define CONFIG_SYS_I2C_SLAVE 0xfe
648 * Initialization, must be called once on start up, may be called
649 * repeatedly to change the speed and slave addresses.
651 void i2c_init(int speed, int slaveaddr);
652 void i2c_init_board(void);
653 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
654 void i2c_board_late_init(void);
657 #ifdef CONFIG_SYS_I2C
661 * Returns index of currently active I2C bus. Zero-based.
663 unsigned int i2c_get_bus_num(void);
668 * Change the active I2C bus. Subsequent read/write calls will
671 * bus - bus index, zero based
673 * Returns: 0 on success, not 0 on failure
676 int i2c_set_bus_num(unsigned int bus);
681 * Initializes all I2C adapters in the system. All i2c_adap structures must
682 * be initialized beforehead with function pointers and data, including
683 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
685 void i2c_init_all(void);
688 * Probe the given I2C chip address. Returns 0 if a chip responded,
691 int i2c_probe(uint8_t chip);
694 * Read/Write interface:
695 * chip: I2C chip address, range 0..127
696 * addr: Memory (register) address within the chip
697 * alen: Number of bytes to use for addr (typically 1, 2 for larger
698 * memories, 0 for register type devices with only one
700 * buffer: Where to read/write the data
701 * len: How many bytes to read/write
703 * Returns: 0 on success, not 0 on failure
705 int i2c_read(uint8_t chip, unsigned int addr, int alen,
706 uint8_t *buffer, int len);
708 int i2c_write(uint8_t chip, unsigned int addr, int alen,
709 uint8_t *buffer, int len);
712 * Utility routines to read/write registers.
714 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
716 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
721 * Change the speed of the active I2C bus
723 * speed - bus speed in Hz
725 * Returns: new bus speed
728 unsigned int i2c_set_bus_speed(unsigned int speed);
733 * Returns speed of currently active I2C bus in Hz
736 unsigned int i2c_get_bus_speed(void);
741 * Adjusts I2C pointers after U-Boot is relocated to DRAM
743 void i2c_reloc_fixup(void);
744 #if defined(CONFIG_SYS_I2C_SOFT)
745 void i2c_soft_init(void);
746 void i2c_soft_active(void);
747 void i2c_soft_tristate(void);
748 int i2c_soft_read(void);
749 void i2c_soft_sda(int bit);
750 void i2c_soft_scl(int bit);
751 void i2c_soft_delay(void);
756 * Probe the given I2C chip address. Returns 0 if a chip responded,
759 int i2c_probe(uchar chip);
762 * Read/Write interface:
763 * chip: I2C chip address, range 0..127
764 * addr: Memory (register) address within the chip
765 * alen: Number of bytes to use for addr (typically 1, 2 for larger
766 * memories, 0 for register type devices with only one
768 * buffer: Where to read/write the data
769 * len: How many bytes to read/write
771 * Returns: 0 on success, not 0 on failure
773 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
774 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
777 * Utility routines to read/write registers.
779 static inline u8 i2c_reg_read(u8 addr, u8 reg)
784 /* MPC8xx needs this. Maybe one day we can get rid of it. */
785 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
789 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
792 i2c_read(addr, reg, 1, &buf, 1);
797 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
800 /* MPC8xx needs this. Maybe one day we can get rid of it. */
801 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
805 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
806 __func__, addr, reg, val);
809 i2c_write(addr, reg, 1, &val, 1);
813 * Functions for setting the current I2C bus and its speed
819 * Change the active I2C bus. Subsequent read/write calls will
822 * bus - bus index, zero based
824 * Returns: 0 on success, not 0 on failure
827 int i2c_set_bus_num(unsigned int bus);
832 * Returns index of currently active I2C bus. Zero-based.
835 unsigned int i2c_get_bus_num(void);
840 * Change the speed of the active I2C bus
842 * speed - bus speed in Hz
844 * Returns: 0 on success, not 0 on failure
847 int i2c_set_bus_speed(unsigned int);
852 * Returns speed of currently active I2C bus in Hz
855 unsigned int i2c_get_bus_speed(void);
856 #endif /* CONFIG_SYS_I2C */
859 * only for backwardcompatibility, should go away if we switched
860 * completely to new multibus support.
862 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
863 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
864 # define CONFIG_SYS_MAX_I2C_BUS 2
866 # define I2C_MULTI_BUS 1
868 # define CONFIG_SYS_MAX_I2C_BUS 1
869 # define I2C_MULTI_BUS 0
872 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
873 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
874 static inline unsigned int I2C_GET_BUS(void)
876 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
879 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
880 static inline void I2C_SET_BUS(unsigned int bus)
883 i2c_set_bus_num(bus);
886 /* Multi I2C definitions */
888 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
889 I2C_8, I2C_9, I2C_10,
892 /* Multi I2C busses handling */
893 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
894 extern int get_multi_scl_pin(void);
895 extern int get_multi_sda_pin(void);
896 extern int multi_i2c_init(void);
900 * Get FDT values for i2c bus.
902 * @param blob Device tree blbo
903 * @return the number of I2C bus
905 void board_i2c_init(const void *blob);
908 * Find the I2C bus number by given a FDT I2C node.
910 * @param blob Device tree blbo
911 * @param node FDT I2C node to find
912 * @return the number of I2C bus (zero based), or -1 on error
914 int i2c_get_bus_num_fdt(int node);
917 * Reset the I2C bus represented by the given a FDT I2C node.
919 * @param blob Device tree blbo
920 * @param node FDT I2C node to find
921 * @return 0 if port was reset, -1 if not found
923 int i2c_reset_port_fdt(const void *blob, int node);
925 #endif /* !CONFIG_DM_I2C */