2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 * SPDX-License-Identifier: GPL-2.0+
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
21 * For now there are essentially two parts to this file - driver model
22 * here at the top, and the older code below (with CONFIG_SYS_I2C being
23 * most recent). The plan is to migrate everything to driver model.
24 * The driver model structures and API are separate as they are different
25 * enough as to be incompatible for compilation purposes.
28 enum dm_i2c_chip_flags {
29 DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
30 DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
31 DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
36 * struct dm_i2c_chip - information about an i2c chip
38 * An I2C chip is a device on the I2C bus. It sits at a particular address
39 * and normally supports 7-bit or 10-bit addressing.
41 * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
42 * the chip to examine.
44 * @chip_addr: Chip address on bus
45 * @offset_len: Length of offset in bytes. A single byte offset can
46 * represent up to 256 bytes. A value larger than 1 may be
47 * needed for larger devices.
48 * @flags: Flags for this chip (dm_i2c_chip_flags)
49 * @emul: Emulator for this chip address (only used for emulation)
62 * struct dm_i2c_bus- information about an i2c bus
64 * An I2C bus contains 0 or more chips on it, each at its own address. The
65 * bus can operate at different speeds (measured in Hz, typically 100KHz
68 * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
71 * @speed_hz: Bus speed in hertz (typically 100000)
78 * dm_i2c_read() - read bytes from an I2C chip
80 * To obtain an I2C device (called a 'chip') given the I2C bus address you
81 * can use i2c_get_chip(). To obtain a bus by bus number use
82 * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
84 * To set the address length of a devce use i2c_set_addr_len(). It
87 * @dev: Chip to read from
88 * @offset: Offset within chip to start reading
89 * @buffer: Place to put data
90 * @len: Number of bytes to read
92 * @return 0 on success, -ve on failure
94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
97 * dm_i2c_write() - write bytes to an I2C chip
99 * See notes for dm_i2c_read() above.
101 * @dev: Chip to write to
102 * @offset: Offset within chip to start writing
103 * @buffer: Buffer containing data to write
104 * @len: Number of bytes to write
106 * @return 0 on success, -ve on failure
108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
112 * dm_i2c_probe() - probe a particular chip address
114 * This can be useful to check for the existence of a chip on the bus.
115 * It is typically implemented by writing the chip address to the bus
116 * and checking that the chip replies with an ACK.
119 * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
120 * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
121 * @devp: Returns the device found, or NULL if none
122 * @return 0 if a chip was found at that address, -ve if not
124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
125 struct udevice **devp);
128 * dm_i2c_reg_read() - Read a value from an I2C register
130 * This reads a single value from the given address in an I2C chip
132 * @addr: Address to read from
133 * @return value read, or -ve on error
135 int dm_i2c_reg_read(struct udevice *dev, uint offset);
138 * dm_i2c_reg_write() - Write a value to an I2C register
140 * This writes a single value to the given address in an I2C chip
142 * @addr: Address to write to
143 * @val: Value to write (normally a byte)
144 * @return 0 on success, -ve on error
146 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
149 * dm_i2c_set_bus_speed() - set the speed of a bus
151 * @bus: Bus to adjust
152 * @speed: Requested speed in Hz
153 * @return 0 if OK, -EINVAL for invalid values
155 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
158 * dm_i2c_get_bus_speed() - get the speed of a bus
161 * @return speed of selected I2C bus in Hz, -ve on error
163 int dm_i2c_get_bus_speed(struct udevice *bus);
166 * i2c_set_chip_flags() - set flags for a chip
168 * Typically addresses are 7 bits, but for 10-bit addresses you should set
169 * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
171 * @dev: Chip to adjust
173 * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
175 int i2c_set_chip_flags(struct udevice *dev, uint flags);
178 * i2c_get_chip_flags() - get flags for a chip
180 * @dev: Chip to check
181 * @flagsp: Place to put flags
182 * @return 0 if OK, other -ve value on error
184 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
187 * i2c_set_offset_len() - set the offset length for a chip
189 * The offset used to access a chip may be up to 4 bytes long. Typically it
190 * is only 1 byte, which is enough for chips with 256 bytes of memory or
191 * registers. The default value is 1, but you can call this function to
194 * @offset_len: New offset length value (typically 1 or 2)
196 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
199 * i2c_get_offset_len() - get the offset length for a chip
201 * @return: Current offset length value (typically 1 or 2)
203 int i2c_get_chip_offset_len(struct udevice *dev);
206 * i2c_deblock() - recover a bus that is in an unknown state
208 * See the deblock() method in 'struct dm_i2c_ops' for full information
210 * @bus: Bus to recover
211 * @return 0 if OK, -ve on error
213 int i2c_deblock(struct udevice *bus);
215 #ifdef CONFIG_DM_I2C_COMPAT
217 * i2c_probe() - Compatibility function for driver model
219 * Calls dm_i2c_probe() on the current bus
221 int i2c_probe(uint8_t chip_addr);
224 * i2c_read() - Compatibility function for driver model
226 * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
227 * set to @addr. @alen must match the current setting for the device.
229 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
233 * i2c_write() - Compatibility function for driver model
235 * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
236 * set to @addr. @alen must match the current setting for the device.
238 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
242 * i2c_get_bus_num_fdt() - Compatibility function for driver model
244 * @return the bus number associated with the given device tree node
246 int i2c_get_bus_num_fdt(int node);
249 * i2c_get_bus_num() - Compatibility function for driver model
251 * @return the 'current' bus number
253 unsigned int i2c_get_bus_num(void);
256 * i2c_set_bus_num() - Compatibility function for driver model
258 * Sets the 'current' bus
260 int i2c_set_bus_num(unsigned int bus);
262 static inline void I2C_SET_BUS(unsigned int bus)
264 i2c_set_bus_num(bus);
267 static inline unsigned int I2C_GET_BUS(void)
269 return i2c_get_bus_num();
273 * i2c_init() - Compatibility function for driver model
275 * This function does nothing.
277 void i2c_init(int speed, int slaveaddr);
280 * board_i2c_init() - Compatibility function for driver model
282 * @param blob Device tree blbo
283 * @return the number of I2C bus
285 void board_i2c_init(const void *blob);
288 * Compatibility functions for driver model.
290 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
291 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
296 * Not all of these flags are implemented in the U-Boot API
298 enum dm_i2c_msg_flags {
299 I2C_M_TEN = 0x0010, /* ten-bit chip address */
300 I2C_M_RD = 0x0001, /* read data, from slave to master */
301 I2C_M_STOP = 0x8000, /* send stop after this message */
302 I2C_M_NOSTART = 0x4000, /* no start before this message */
303 I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
304 I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
305 I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
306 I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
310 * struct i2c_msg - an I2C message
312 * @addr: Slave address
313 * @flags: Flags (see enum dm_i2c_msg_flags)
314 * @len: Length of buffer in bytes, may be 0 for a probe
315 * @buf: Buffer to send/receive, or NULL if no data
325 * struct i2c_msg_list - a list of I2C messages
327 * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
328 * appropriate in U-Boot.
330 * @msg: Pointer to i2c_msg array
331 * @nmsgs: Number of elements in the array
333 struct i2c_msg_list {
334 struct i2c_msg *msgs;
339 * struct dm_i2c_ops - driver operations for I2C uclass
341 * Drivers should support these operations unless otherwise noted. These
342 * operations are intended to be used by uclass code, not directly from
347 * xfer() - transfer a list of I2C messages
349 * @bus: Bus to read from
350 * @msg: List of messages to transfer
351 * @nmsgs: Number of messages in the list
352 * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
353 * -ECOMM if the speed cannot be supported, -EPROTO if the chip
354 * flags cannot be supported, other -ve value on some other error
356 int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
359 * probe_chip() - probe for the presense of a chip address
361 * This function is optional. If omitted, the uclass will send a zero
362 * length message instead.
365 * @chip_addr: Chip address to probe
366 * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
367 * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
368 * to default probem other -ve value on error
370 int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
373 * set_bus_speed() - set the speed of a bus (optional)
375 * The bus speed value will be updated by the uclass if this function
376 * does not return an error. This method is optional - if it is not
377 * provided then the driver can read the speed from
378 * dev_get_uclass_priv(bus)->speed_hz
380 * @bus: Bus to adjust
381 * @speed: Requested speed in Hz
382 * @return 0 if OK, -EINVAL for invalid values
384 int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
387 * get_bus_speed() - get the speed of a bus (optional)
389 * Normally this can be provided by the uclass, but if you want your
390 * driver to check the bus speed by looking at the hardware, you can
391 * implement that here. This method is optional. This method would
392 * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
395 * @return speed of selected I2C bus in Hz, -ve on error
397 int (*get_bus_speed)(struct udevice *bus);
400 * set_flags() - set the flags for a chip (optional)
402 * This is generally implemented by the uclass, but drivers can
403 * check the value to ensure that unsupported options are not used.
404 * This method is optional. If provided, this method will always be
405 * called when the flags change.
407 * @dev: Chip to adjust
408 * @flags: New flags value
409 * @return 0 if OK, -EINVAL if value is unsupported
411 int (*set_flags)(struct udevice *dev, uint flags);
414 * deblock() - recover a bus that is in an unknown state
416 * I2C is a synchronous protocol and resets of the processor in the
417 * middle of an access can block the I2C Bus until a powerdown of
418 * the full unit is done. This is because slaves can be stuck
419 * waiting for addition bus transitions for a transaction that will
420 * never complete. Resetting the I2C master does not help. The only
421 * way is to force the bus through a series of transitions to make
422 * sure that all slaves are done with the transaction. This method
423 * performs this 'deblocking' if support by the driver.
425 * This method is optional.
427 int (*deblock)(struct udevice *bus);
430 #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
433 * i2c_get_chip() - get a device to use to access a chip on a bus
435 * This returns the device for the given chip address. The device can then
436 * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
438 * @bus: Bus to examine
439 * @chip_addr: Chip address for the new device
440 * @offset_len: Length of a register offset in bytes (normally 1)
441 * @devp: Returns pointer to new device if found or -ENODEV if not
444 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
445 struct udevice **devp);
448 * i2c_get_chip() - get a device to use to access a chip on a bus number
450 * This returns the device for the given chip address on a particular bus
453 * @busnum: Bus number to examine
454 * @chip_addr: Chip address for the new device
455 * @offset_len: Length of a register offset in bytes (normally 1)
456 * @devp: Returns pointer to new device if found or -ENODEV if not
459 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
460 struct udevice **devp);
463 * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
465 * This decodes the chip address from a device tree node and puts it into
466 * its dm_i2c_chip structure. This should be called in your driver's
467 * ofdata_to_platdata() method.
469 * @blob: Device tree blob
470 * @node: Node offset to read from
471 * @spi: Place to put the decoded information
473 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
474 struct dm_i2c_chip *chip);
477 * i2c_dump_msgs() - Dump a list of I2C messages
479 * This may be useful for debugging.
481 * @msg: Message list to dump
482 * @nmsgs: Number of messages
484 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
486 #ifndef CONFIG_DM_I2C
489 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
491 * The implementation MUST NOT use static or global variables if the
492 * I2C routines are used to read SDRAM configuration information
493 * because this is done before the memories are initialized. Limited
494 * use of stack-based variables are OK (the initial stack size is
497 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
501 * Configuration items.
503 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
505 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
506 /* no muxes used bus = i2c adapters */
507 #define CONFIG_SYS_I2C_DIRECT_BUS 1
508 #define CONFIG_SYS_I2C_MAX_HOPS 0
509 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
511 /* we use i2c muxes */
512 #undef CONFIG_SYS_I2C_DIRECT_BUS
515 /* define the I2C bus number for RTC and DTT if not already done */
516 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
517 #define CONFIG_SYS_RTC_BUS_NUM 0
519 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
520 #define CONFIG_SYS_DTT_BUS_NUM 0
522 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
523 #define CONFIG_SYS_SPD_BUS_NUM 0
527 void (*init)(struct i2c_adapter *adap, int speed,
529 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
530 int (*read)(struct i2c_adapter *adap, uint8_t chip,
531 uint addr, int alen, uint8_t *buffer,
533 int (*write)(struct i2c_adapter *adap, uint8_t chip,
534 uint addr, int alen, uint8_t *buffer,
536 uint (*set_bus_speed)(struct i2c_adapter *adap,
546 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
547 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
553 .set_bus_speed = _set_speed, \
555 .slaveaddr = _slaveaddr, \
557 .hwadapnr = _hwadapnr, \
561 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
562 _set_speed, _speed, _slaveaddr, _hwadapnr) \
563 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
564 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
565 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
567 struct i2c_adapter *i2c_get_adapter(int index);
569 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
575 struct i2c_next_hop {
581 struct i2c_bus_hose {
583 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
585 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
586 extern struct i2c_bus_hose i2c_bus[];
588 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
590 #define I2C_ADAPTER(bus) bus
592 #define I2C_BUS gd->cur_i2c_bus
594 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
595 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
596 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
598 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
599 #define I2C_MUX_PCA9540_ID 1
600 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
601 #define I2C_MUX_PCA9542_ID 2
602 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
603 #define I2C_MUX_PCA9544_ID 3
604 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
605 #define I2C_MUX_PCA9547_ID 4
606 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
607 #define I2C_MUX_PCA9548_ID 5
608 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
611 #ifndef I2C_SOFT_DECLARATIONS
612 # if defined(CONFIG_MPC8260)
613 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
614 # elif defined(CONFIG_8xx)
615 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
617 # elif (defined(CONFIG_AT91RM9200) || \
618 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
619 defined(CONFIG_AT91SAM9263))
620 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
622 # define I2C_SOFT_DECLARATIONS
627 /* Set default value for the I2C bus speed on 8xx. In the
628 * future, we'll define these in all 8xx board config files.
630 #ifndef CONFIG_SYS_I2C_SPEED
631 #define CONFIG_SYS_I2C_SPEED 50000
636 * Many boards/controllers/drivers don't support an I2C slave interface so
637 * provide a default slave address for them for use in common code. A real
638 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
639 * support a slave interface.
641 #ifndef CONFIG_SYS_I2C_SLAVE
642 #define CONFIG_SYS_I2C_SLAVE 0xfe
646 * Initialization, must be called once on start up, may be called
647 * repeatedly to change the speed and slave addresses.
649 void i2c_init(int speed, int slaveaddr);
650 void i2c_init_board(void);
651 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
652 void i2c_board_late_init(void);
655 #ifdef CONFIG_SYS_I2C
659 * Returns index of currently active I2C bus. Zero-based.
661 unsigned int i2c_get_bus_num(void);
666 * Change the active I2C bus. Subsequent read/write calls will
669 * bus - bus index, zero based
671 * Returns: 0 on success, not 0 on failure
674 int i2c_set_bus_num(unsigned int bus);
679 * Initializes all I2C adapters in the system. All i2c_adap structures must
680 * be initialized beforehead with function pointers and data, including
681 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
683 void i2c_init_all(void);
686 * Probe the given I2C chip address. Returns 0 if a chip responded,
689 int i2c_probe(uint8_t chip);
692 * Read/Write interface:
693 * chip: I2C chip address, range 0..127
694 * addr: Memory (register) address within the chip
695 * alen: Number of bytes to use for addr (typically 1, 2 for larger
696 * memories, 0 for register type devices with only one
698 * buffer: Where to read/write the data
699 * len: How many bytes to read/write
701 * Returns: 0 on success, not 0 on failure
703 int i2c_read(uint8_t chip, unsigned int addr, int alen,
704 uint8_t *buffer, int len);
706 int i2c_write(uint8_t chip, unsigned int addr, int alen,
707 uint8_t *buffer, int len);
710 * Utility routines to read/write registers.
712 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
714 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
719 * Change the speed of the active I2C bus
721 * speed - bus speed in Hz
723 * Returns: new bus speed
726 unsigned int i2c_set_bus_speed(unsigned int speed);
731 * Returns speed of currently active I2C bus in Hz
734 unsigned int i2c_get_bus_speed(void);
739 * Adjusts I2C pointers after U-Boot is relocated to DRAM
741 void i2c_reloc_fixup(void);
742 #if defined(CONFIG_SYS_I2C_SOFT)
743 void i2c_soft_init(void);
744 void i2c_soft_active(void);
745 void i2c_soft_tristate(void);
746 int i2c_soft_read(void);
747 void i2c_soft_sda(int bit);
748 void i2c_soft_scl(int bit);
749 void i2c_soft_delay(void);
754 * Probe the given I2C chip address. Returns 0 if a chip responded,
757 int i2c_probe(uchar chip);
760 * Read/Write interface:
761 * chip: I2C chip address, range 0..127
762 * addr: Memory (register) address within the chip
763 * alen: Number of bytes to use for addr (typically 1, 2 for larger
764 * memories, 0 for register type devices with only one
766 * buffer: Where to read/write the data
767 * len: How many bytes to read/write
769 * Returns: 0 on success, not 0 on failure
771 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
772 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
775 * Utility routines to read/write registers.
777 static inline u8 i2c_reg_read(u8 addr, u8 reg)
782 /* MPC8xx needs this. Maybe one day we can get rid of it. */
783 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
787 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
790 i2c_read(addr, reg, 1, &buf, 1);
795 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
798 /* MPC8xx needs this. Maybe one day we can get rid of it. */
799 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
803 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
804 __func__, addr, reg, val);
807 i2c_write(addr, reg, 1, &val, 1);
811 * Functions for setting the current I2C bus and its speed
817 * Change the active I2C bus. Subsequent read/write calls will
820 * bus - bus index, zero based
822 * Returns: 0 on success, not 0 on failure
825 int i2c_set_bus_num(unsigned int bus);
830 * Returns index of currently active I2C bus. Zero-based.
833 unsigned int i2c_get_bus_num(void);
838 * Change the speed of the active I2C bus
840 * speed - bus speed in Hz
842 * Returns: 0 on success, not 0 on failure
845 int i2c_set_bus_speed(unsigned int);
850 * Returns speed of currently active I2C bus in Hz
853 unsigned int i2c_get_bus_speed(void);
854 #endif /* CONFIG_SYS_I2C */
857 * only for backwardcompatibility, should go away if we switched
858 * completely to new multibus support.
860 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
861 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
862 # define CONFIG_SYS_MAX_I2C_BUS 2
864 # define I2C_MULTI_BUS 1
866 # define CONFIG_SYS_MAX_I2C_BUS 1
867 # define I2C_MULTI_BUS 0
870 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
871 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
872 static inline unsigned int I2C_GET_BUS(void)
874 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
877 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
878 static inline void I2C_SET_BUS(unsigned int bus)
881 i2c_set_bus_num(bus);
884 /* Multi I2C definitions */
886 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
887 I2C_8, I2C_9, I2C_10,
890 /* Multi I2C busses handling */
891 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
892 extern int get_multi_scl_pin(void);
893 extern int get_multi_sda_pin(void);
894 extern int multi_i2c_init(void);
898 * Get FDT values for i2c bus.
900 * @param blob Device tree blbo
901 * @return the number of I2C bus
903 void board_i2c_init(const void *blob);
906 * Find the I2C bus number by given a FDT I2C node.
908 * @param blob Device tree blbo
909 * @param node FDT I2C node to find
910 * @return the number of I2C bus (zero based), or -1 on error
912 int i2c_get_bus_num_fdt(int node);
915 * Reset the I2C bus represented by the given a FDT I2C node.
917 * @param blob Device tree blbo
918 * @param node FDT I2C node to find
919 * @return 0 if port was reset, -1 if not found
921 int i2c_reset_port_fdt(const void *blob, int node);
923 #endif /* !CONFIG_DM_I2C */