2 * CCI cache coherent interconnect support
4 * Copyright (C) 2013 ARM Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef __LINUX_ARM_CCI_H
22 #define __LINUX_ARM_CCI_H
24 #include <linux/errno.h>
25 #include <linux/types.h>
27 #include <asm/arm-cci.h>
32 extern bool cci_probed(void);
34 static inline bool cci_probed(void) { return false; }
37 #ifdef CONFIG_ARM_CCI400_PORT_CTRL
38 extern int cci_ace_get_port(struct device_node *dn);
39 extern int cci_disable_port_by_cpu(u64 mpidr);
40 extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
41 extern int __cci_control_port_by_index(u32 port, bool enable);
43 static inline int cci_ace_get_port(struct device_node *dn)
47 static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
48 static inline int __cci_control_port_by_device(struct device_node *dn,
53 static inline int __cci_control_port_by_index(u32 port, bool enable)
59 #define cci_disable_port_by_device(dev) \
60 __cci_control_port_by_device(dev, false)
61 #define cci_enable_port_by_device(dev) \
62 __cci_control_port_by_device(dev, true)
63 #define cci_disable_port_by_index(dev) \
64 __cci_control_port_by_index(dev, false)
65 #define cci_enable_port_by_index(dev) \
66 __cci_control_port_by_index(dev, true)