include/linux/cache.h

   1 #ifndef __LINUX_CACHE_H
   2 #define __LINUX_CACHE_H
   3
   4 #include <uapi/linux/kernel.h>
   5 #include <asm/cache.h>
   6
   7 #ifndef L1_CACHE_ALIGN
   8 #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES)
   9 #endif
  10
  11 #ifndef SMP_CACHE_BYTES
  12 #define SMP_CACHE_BYTES L1_CACHE_BYTES
  13 #endif
  14
  15 #ifndef __read_mostly
  16 #define __read_mostly
  17 #endif
  18
  19 #ifndef ____cacheline_aligned
  20 #define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
  21 #endif
  22
  23 #ifndef ____cacheline_aligned_in_smp
  24 #ifdef CONFIG_SMP
  25 #define ____cacheline_aligned_in_smp ____cacheline_aligned
  26 #else
  27 #define ____cacheline_aligned_in_smp
  28 #endif /* CONFIG_SMP */
  29 #endif
  30
  31 #ifndef __cacheline_aligned
  32 #define __cacheline_aligned                                     \
  33   __attribute__((__aligned__(SMP_CACHE_BYTES),                  \
  34                  __section__(".data..cacheline_aligned")))
  35 #endif /* __cacheline_aligned */
  36
  37 #ifndef __cacheline_aligned_in_smp
  38 #ifdef CONFIG_SMP
  39 #define __cacheline_aligned_in_smp __cacheline_aligned
  40 #else
  41 #define __cacheline_aligned_in_smp
  42 #endif /* CONFIG_SMP */
  43 #endif
  44
  45 /*
  46  * The maximum alignment needed for some critical structures
  47  * These could be inter-node cacheline sizes/L3 cacheline
  48  * size etc.  Define this in asm/cache.h for your arch
  49  */
  50 #ifndef INTERNODE_CACHE_SHIFT
  51 #define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT
  52 #endif
  53
  54 #if !defined(____cacheline_internodealigned_in_smp)
  55 #if defined(CONFIG_SMP)
  56 #define ____cacheline_internodealigned_in_smp \
  57         __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))
  58 #else
  59 #define ____cacheline_internodealigned_in_smp
  60 #endif
  61 #endif
  62
  63 #ifndef CONFIG_ARCH_HAS_CACHE_LINE_SIZE
  64 #define cache_line_size()       L1_CACHE_BYTES
  65 #endif
  66
  67 #endif /* __LINUX_CACHE_H */