5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/smp.h>
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/gfp.h>
21 #include <linux/irqreturn.h>
22 #include <linux/irqnr.h>
23 #include <linux/errno.h>
24 #include <linux/topology.h>
25 #include <linux/wait.h>
26 #include <linux/module.h>
29 #include <asm/ptrace.h>
30 #include <asm/irq_regs.h>
35 typedef void (*irq_flow_handler_t)(unsigned int irq,
36 struct irq_desc *desc);
37 typedef void (*irq_preflow_handler_t)(struct irq_data *data);
42 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
44 * IRQ_TYPE_NONE - default, unspecified type
45 * IRQ_TYPE_EDGE_RISING - rising edge triggered
46 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
47 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
48 * IRQ_TYPE_LEVEL_HIGH - high level triggered
49 * IRQ_TYPE_LEVEL_LOW - low level triggered
50 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
51 * IRQ_TYPE_SENSE_MASK - Mask for all the above bits
52 * IRQ_TYPE_PROBE - Special flag for probing in progress
54 * Bits which can be modified via irq_set/clear/modify_status_flags()
55 * IRQ_LEVEL - Interrupt is level type. Will be also
56 * updated in the code when the above trigger
57 * bits are modified via irq_set_irq_type()
58 * IRQ_PER_CPU - Mark an interrupt PER_CPU. Will protect
59 * it from affinity setting
60 * IRQ_NOPROBE - Interrupt cannot be probed by autoprobing
61 * IRQ_NOREQUEST - Interrupt cannot be requested via
63 * IRQ_NOTHREAD - Interrupt cannot be threaded
64 * IRQ_NOAUTOEN - Interrupt is not automatically enabled in
66 * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set)
67 * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context
68 * IRQ_NESTED_TRHEAD - Interrupt nests into another thread
71 IRQ_TYPE_NONE = 0x00000000,
72 IRQ_TYPE_EDGE_RISING = 0x00000001,
73 IRQ_TYPE_EDGE_FALLING = 0x00000002,
74 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
75 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
76 IRQ_TYPE_LEVEL_LOW = 0x00000008,
77 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
78 IRQ_TYPE_SENSE_MASK = 0x0000000f,
80 IRQ_TYPE_PROBE = 0x00000010,
83 IRQ_PER_CPU = (1 << 9),
84 IRQ_NOPROBE = (1 << 10),
85 IRQ_NOREQUEST = (1 << 11),
86 IRQ_NOAUTOEN = (1 << 12),
87 IRQ_NO_BALANCING = (1 << 13),
88 IRQ_MOVE_PCNTXT = (1 << 14),
89 IRQ_NESTED_THREAD = (1 << 15),
90 IRQ_NOTHREAD = (1 << 16),
93 #define IRQF_MODIFY_MASK \
94 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
95 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
96 IRQ_PER_CPU | IRQ_NESTED_THREAD)
98 #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
101 * Return value for chip->irq_set_affinity()
103 * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity
104 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity
108 IRQ_SET_MASK_OK_NOCOPY,
115 * struct irq_data - per irq and irq chip data passed down to chip functions
116 * @irq: interrupt number
117 * @hwirq: hardware interrupt number, local to the interrupt domain
118 * @node: node index useful for balancing
119 * @state_use_accessors: status information for irq chip functions.
120 * Use accessor functions to deal with it
121 * @chip: low level interrupt hardware access
122 * @domain: Interrupt translation domain; responsible for mapping
123 * between hwirq number and linux irq number.
124 * @handler_data: per-IRQ data for the irq_chip methods
125 * @chip_data: platform-specific per-chip private data for the chip
126 * methods, to allow shared chip implementations
127 * @msi_desc: MSI descriptor
128 * @affinity: IRQ affinity on SMP
130 * The fields here need to overlay the ones in irq_desc until we
131 * cleaned up the direct references and switched everything over to
138 unsigned int state_use_accessors;
139 struct irq_chip *chip;
140 struct irq_domain *domain;
143 struct msi_desc *msi_desc;
145 cpumask_var_t affinity;
150 * Bit masks for irq_data.state
152 * IRQD_TRIGGER_MASK - Mask for the trigger type bits
153 * IRQD_SETAFFINITY_PENDING - Affinity setting is pending
154 * IRQD_NO_BALANCING - Balancing disabled for this IRQ
155 * IRQD_PER_CPU - Interrupt is per cpu
156 * IRQD_AFFINITY_SET - Interrupt affinity was set
157 * IRQD_LEVEL - Interrupt is level triggered
158 * IRQD_WAKEUP_STATE - Interrupt is configured for wakeup
160 * IRDQ_MOVE_PCNTXT - Interrupt can be moved in process
162 * IRQD_IRQ_DISABLED - Disabled state of the interrupt
163 * IRQD_IRQ_MASKED - Masked state of the interrupt
164 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
167 IRQD_TRIGGER_MASK = 0xf,
168 IRQD_SETAFFINITY_PENDING = (1 << 8),
169 IRQD_NO_BALANCING = (1 << 10),
170 IRQD_PER_CPU = (1 << 11),
171 IRQD_AFFINITY_SET = (1 << 12),
172 IRQD_LEVEL = (1 << 13),
173 IRQD_WAKEUP_STATE = (1 << 14),
174 IRQD_MOVE_PCNTXT = (1 << 15),
175 IRQD_IRQ_DISABLED = (1 << 16),
176 IRQD_IRQ_MASKED = (1 << 17),
177 IRQD_IRQ_INPROGRESS = (1 << 18),
180 static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
182 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
185 static inline bool irqd_is_per_cpu(struct irq_data *d)
187 return d->state_use_accessors & IRQD_PER_CPU;
190 static inline bool irqd_can_balance(struct irq_data *d)
192 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
195 static inline bool irqd_affinity_was_set(struct irq_data *d)
197 return d->state_use_accessors & IRQD_AFFINITY_SET;
200 static inline void irqd_mark_affinity_was_set(struct irq_data *d)
202 d->state_use_accessors |= IRQD_AFFINITY_SET;
205 static inline u32 irqd_get_trigger_type(struct irq_data *d)
207 return d->state_use_accessors & IRQD_TRIGGER_MASK;
211 * Must only be called inside irq_chip.irq_set_type() functions.
213 static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
215 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
216 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
219 static inline bool irqd_is_level_type(struct irq_data *d)
221 return d->state_use_accessors & IRQD_LEVEL;
224 static inline bool irqd_is_wakeup_set(struct irq_data *d)
226 return d->state_use_accessors & IRQD_WAKEUP_STATE;
229 static inline bool irqd_can_move_in_process_context(struct irq_data *d)
231 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
234 static inline bool irqd_irq_disabled(struct irq_data *d)
236 return d->state_use_accessors & IRQD_IRQ_DISABLED;
239 static inline bool irqd_irq_masked(struct irq_data *d)
241 return d->state_use_accessors & IRQD_IRQ_MASKED;
244 static inline bool irqd_irq_inprogress(struct irq_data *d)
246 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
250 * Functions for chained handlers which can be enabled/disabled by the
251 * standard disable_irq/enable_irq calls. Must be called with
252 * irq_desc->lock held.
254 static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
256 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
259 static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
261 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
265 * struct irq_chip - hardware interrupt chip descriptor
267 * @name: name for /proc/interrupts
268 * @irq_startup: start up the interrupt (defaults to ->enable if NULL)
269 * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL)
270 * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL)
271 * @irq_disable: disable the interrupt
272 * @irq_ack: start of a new interrupt
273 * @irq_mask: mask an interrupt source
274 * @irq_mask_ack: ack and mask an interrupt source
275 * @irq_unmask: unmask an interrupt source
276 * @irq_eoi: end of interrupt
277 * @irq_set_affinity: set the CPU affinity on SMP machines
278 * @irq_retrigger: resend an IRQ to the CPU
279 * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
280 * @irq_set_wake: enable/disable power-management wake-on of an IRQ
281 * @irq_bus_lock: function to lock access to slow bus (i2c) chips
282 * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
283 * @irq_cpu_online: configure an interrupt source for a secondary CPU
284 * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
285 * @irq_suspend: function called from core code on suspend once per chip
286 * @irq_resume: function called from core code on resume once per chip
287 * @irq_pm_shutdown: function called from core code on shutdown once per chip
288 * @irq_print_chip: optional to print special chip info in show_interrupts
289 * @flags: chip specific flags
291 * @release: release function solely used by UML
295 unsigned int (*irq_startup)(struct irq_data *data);
296 void (*irq_shutdown)(struct irq_data *data);
297 void (*irq_enable)(struct irq_data *data);
298 void (*irq_disable)(struct irq_data *data);
300 void (*irq_ack)(struct irq_data *data);
301 void (*irq_mask)(struct irq_data *data);
302 void (*irq_mask_ack)(struct irq_data *data);
303 void (*irq_unmask)(struct irq_data *data);
304 void (*irq_eoi)(struct irq_data *data);
306 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
307 int (*irq_retrigger)(struct irq_data *data);
308 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
309 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
311 void (*irq_bus_lock)(struct irq_data *data);
312 void (*irq_bus_sync_unlock)(struct irq_data *data);
314 void (*irq_cpu_online)(struct irq_data *data);
315 void (*irq_cpu_offline)(struct irq_data *data);
317 void (*irq_suspend)(struct irq_data *data);
318 void (*irq_resume)(struct irq_data *data);
319 void (*irq_pm_shutdown)(struct irq_data *data);
321 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
325 /* Currently used only by UML, might disappear one day.*/
326 #ifdef CONFIG_IRQ_RELEASE_METHOD
327 void (*release)(unsigned int irq, void *dev_id);
332 * irq_chip specific flags
334 * IRQCHIP_SET_TYPE_MASKED: Mask before calling chip.irq_set_type()
335 * IRQCHIP_EOI_IF_HANDLED: Only issue irq_eoi() when irq was handled
336 * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path
337 * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
339 * IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
342 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
343 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
344 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
345 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
346 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
349 /* This include will go away once we isolated irq_desc usage to core code */
350 #include <linux/irqdesc.h>
353 * Pick up the arch-dependent methods:
355 #include <asm/hw_irq.h>
357 #ifndef NR_IRQS_LEGACY
358 # define NR_IRQS_LEGACY 0
361 #ifndef ARCH_IRQ_INIT_FLAGS
362 # define ARCH_IRQ_INIT_FLAGS 0
365 #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
368 extern int setup_irq(unsigned int irq, struct irqaction *new);
369 extern void remove_irq(unsigned int irq, struct irqaction *act);
371 extern void irq_cpu_online(void);
372 extern void irq_cpu_offline(void);
373 extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask);
375 #ifdef CONFIG_GENERIC_HARDIRQS
377 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
378 void irq_move_irq(struct irq_data *data);
379 void irq_move_masked_irq(struct irq_data *data);
381 static inline void irq_move_irq(struct irq_data *data) { }
382 static inline void irq_move_masked_irq(struct irq_data *data) { }
385 extern int no_irq_affinity;
388 * Built-in IRQ handlers for various IRQ types,
389 * callable via desc->handle_irq()
391 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
392 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
393 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
394 extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
395 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
396 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
397 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
398 extern void handle_nested_irq(unsigned int irq);
400 /* Handling of unhandled and spurious interrupts: */
401 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
402 irqreturn_t action_ret);
405 /* Enable/disable irq debugging output: */
406 extern int noirqdebug_setup(char *str);
408 /* Checks whether the interrupt can be requested by request_irq(): */
409 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
411 /* Dummy irq-chip implementations: */
412 extern struct irq_chip no_irq_chip;
413 extern struct irq_chip dummy_irq_chip;
416 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
417 irq_flow_handler_t handle, const char *name);
419 static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
420 irq_flow_handler_t handle)
422 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
426 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
430 irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
432 __irq_set_handler(irq, handle, 0, NULL);
436 * Set a highlevel chained flow handler for a given IRQ.
437 * (a chained handler is automatically enabled and set to
438 * IRQ_NOREQUEST, IRQ_NOPROBE, and IRQ_NOTHREAD)
441 irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
443 __irq_set_handler(irq, handle, 1, NULL);
446 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
448 static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
450 irq_modify_status(irq, 0, set);
453 static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
455 irq_modify_status(irq, clr, 0);
458 static inline void irq_set_noprobe(unsigned int irq)
460 irq_modify_status(irq, 0, IRQ_NOPROBE);
463 static inline void irq_set_probe(unsigned int irq)
465 irq_modify_status(irq, IRQ_NOPROBE, 0);
468 static inline void irq_set_nothread(unsigned int irq)
470 irq_modify_status(irq, 0, IRQ_NOTHREAD);
473 static inline void irq_set_thread(unsigned int irq)
475 irq_modify_status(irq, IRQ_NOTHREAD, 0);
478 static inline void irq_set_nested_thread(unsigned int irq, bool nest)
481 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
483 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
486 /* Handle dynamic irq creation and destruction */
487 extern unsigned int create_irq_nr(unsigned int irq_want, int node);
488 extern int create_irq(void);
489 extern void destroy_irq(unsigned int irq);
492 * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
493 * irq_free_desc instead.
495 extern void dynamic_irq_cleanup(unsigned int irq);
496 static inline void dynamic_irq_init(unsigned int irq)
498 dynamic_irq_cleanup(irq);
501 /* Set/get chip/data for an IRQ: */
502 extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
503 extern int irq_set_handler_data(unsigned int irq, void *data);
504 extern int irq_set_chip_data(unsigned int irq, void *data);
505 extern int irq_set_irq_type(unsigned int irq, unsigned int type);
506 extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
507 extern struct irq_data *irq_get_irq_data(unsigned int irq);
509 static inline struct irq_chip *irq_get_chip(unsigned int irq)
511 struct irq_data *d = irq_get_irq_data(irq);
512 return d ? d->chip : NULL;
515 static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
520 static inline void *irq_get_chip_data(unsigned int irq)
522 struct irq_data *d = irq_get_irq_data(irq);
523 return d ? d->chip_data : NULL;
526 static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
531 static inline void *irq_get_handler_data(unsigned int irq)
533 struct irq_data *d = irq_get_irq_data(irq);
534 return d ? d->handler_data : NULL;
537 static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
539 return d->handler_data;
542 static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
544 struct irq_data *d = irq_get_irq_data(irq);
545 return d ? d->msi_desc : NULL;
548 static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
553 int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
554 struct module *owner);
556 static inline int irq_alloc_descs(int irq, unsigned int from, unsigned int cnt,
559 return __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE);
562 void irq_free_descs(unsigned int irq, unsigned int cnt);
563 int irq_reserve_irqs(unsigned int from, unsigned int cnt);
565 static inline int irq_alloc_desc(int node)
567 return irq_alloc_descs(-1, 0, 1, node);
570 static inline int irq_alloc_desc_at(unsigned int at, int node)
572 return irq_alloc_descs(at, at, 1, node);
575 static inline int irq_alloc_desc_from(unsigned int from, int node)
577 return irq_alloc_descs(-1, from, 1, node);
580 static inline void irq_free_desc(unsigned int irq)
582 irq_free_descs(irq, 1);
585 static inline int irq_reserve_irq(unsigned int irq)
587 return irq_reserve_irqs(irq, 1);
590 #ifndef irq_reg_writel
591 # define irq_reg_writel(val, addr) writel(val, addr)
593 #ifndef irq_reg_readl
594 # define irq_reg_readl(addr) readl(addr)
598 * struct irq_chip_regs - register offsets for struct irq_gci
599 * @enable: Enable register offset to reg_base
600 * @disable: Disable register offset to reg_base
601 * @mask: Mask register offset to reg_base
602 * @ack: Ack register offset to reg_base
603 * @eoi: Eoi register offset to reg_base
604 * @type: Type configuration register offset to reg_base
605 * @polarity: Polarity configuration register offset to reg_base
607 struct irq_chip_regs {
608 unsigned long enable;
609 unsigned long disable;
614 unsigned long polarity;
618 * struct irq_chip_type - Generic interrupt chip instance for a flow type
619 * @chip: The real interrupt chip which provides the callbacks
620 * @regs: Register offsets for this chip
621 * @handler: Flow handler associated with this chip
622 * @type: Chip can handle these flow types
624 * A irq_generic_chip can have several instances of irq_chip_type when
625 * it requires different functions and register offsets for different
628 struct irq_chip_type {
629 struct irq_chip chip;
630 struct irq_chip_regs regs;
631 irq_flow_handler_t handler;
636 * struct irq_chip_generic - Generic irq chip data structure
637 * @lock: Lock to protect register and cache data access
638 * @reg_base: Register base address (virtual)
639 * @irq_base: Interrupt base nr for this chip
640 * @irq_cnt: Number of interrupts handled by this chip
641 * @mask_cache: Cached mask register
642 * @type_cache: Cached type register
643 * @polarity_cache: Cached polarity register
644 * @wake_enabled: Interrupt can wakeup from suspend
645 * @wake_active: Interrupt is marked as an wakeup from suspend source
646 * @num_ct: Number of available irq_chip_type instances (usually 1)
647 * @private: Private data for non generic chip callbacks
648 * @list: List head for keeping track of instances
649 * @chip_types: Array of interrupt irq_chip_types
651 * Note, that irq_chip_generic can have multiple irq_chip_type
652 * implementations which can be associated to a particular irq line of
653 * an irq_chip_generic instance. That allows to share and protect
654 * state in an irq_chip_generic instance when we need to implement
655 * different flow mechanisms (level/edge) for it.
657 struct irq_chip_generic {
659 void __iomem *reg_base;
660 unsigned int irq_base;
661 unsigned int irq_cnt;
669 struct list_head list;
670 struct irq_chip_type chip_types[0];
674 * enum irq_gc_flags - Initialization flags for generic irq chips
675 * @IRQ_GC_INIT_MASK_CACHE: Initialize the mask_cache by reading mask reg
676 * @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for
677 * irq chips which need to call irq_set_wake() on
678 * the parent irq. Usually GPIO implementations
681 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
682 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
685 /* Generic chip callback functions */
686 void irq_gc_noop(struct irq_data *d);
687 void irq_gc_mask_disable_reg(struct irq_data *d);
688 void irq_gc_mask_set_bit(struct irq_data *d);
689 void irq_gc_mask_clr_bit(struct irq_data *d);
690 void irq_gc_unmask_enable_reg(struct irq_data *d);
691 void irq_gc_ack_set_bit(struct irq_data *d);
692 void irq_gc_ack_clr_bit(struct irq_data *d);
693 void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
694 void irq_gc_eoi(struct irq_data *d);
695 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
697 /* Setup functions for irq_chip_generic */
698 struct irq_chip_generic *
699 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
700 void __iomem *reg_base, irq_flow_handler_t handler);
701 void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
702 enum irq_gc_flags flags, unsigned int clr,
704 int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
705 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
706 unsigned int clr, unsigned int set);
708 static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
710 return container_of(d->chip, struct irq_chip_type, chip);
713 #define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
716 static inline void irq_gc_lock(struct irq_chip_generic *gc)
718 raw_spin_lock(&gc->lock);
721 static inline void irq_gc_unlock(struct irq_chip_generic *gc)
723 raw_spin_unlock(&gc->lock);
726 static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
727 static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
730 #endif /* CONFIG_GENERIC_HARDIRQS */
732 #endif /* !CONFIG_S390 */
734 #endif /* _LINUX_IRQ_H */