4 /* Mask used for ID comparisons */
5 #define MARVELL_PHY_ID_MASK 0xfffffff0
8 #define MARVELL_PHY_ID_88E1101 0x01410c60
9 #define MARVELL_PHY_ID_88E1112 0x01410c90
10 #define MARVELL_PHY_ID_88E1111 0x01410cc0
11 #define MARVELL_PHY_ID_88E1118 0x01410e10
12 #define MARVELL_PHY_ID_88E1121R 0x01410cb0
13 #define MARVELL_PHY_ID_88E1145 0x01410cd0
14 #define MARVELL_PHY_ID_88E1149R 0x01410e50
15 #define MARVELL_PHY_ID_88E1240 0x01410e30
16 #define MARVELL_PHY_ID_88E1318S 0x01410e90
17 #define MARVELL_PHY_ID_88E1116R 0x01410e40
18 #define MARVELL_PHY_ID_88E1510 0x01410dd0
19 #define MARVELL_PHY_ID_88E1540 0x01410eb0
20 #define MARVELL_PHY_ID_88E1545 0x01410ea0
21 #define MARVELL_PHY_ID_88E3016 0x01410e60
23 /* The MV88e6390 Ethernet switch contains embedded PHYs. These PHYs do
24 * not have a model ID. So the switch driver traps reads to the ID2
25 * register and returns the switch family ID
27 #define MARVELL_PHY_ID_88E6390 0x01410f90
29 /* struct phy_device dev_flags definitions */
30 #define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001
31 #define MARVELL_PHY_M1118_DNS323_LEDS 0x00000002
33 #endif /* _MARVELL_PHY_H */