2 * MFD driver for twl6040
4 * Authors: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
5 * Misael Lopez Cruz <misael.lopez@ti.com>
7 * Copyright: (C) 2011 Texas Instruments, Inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
25 #ifndef __TWL6040_CODEC_H__
26 #define __TWL6040_CODEC_H__
28 #include <linux/interrupt.h>
29 #include <linux/mfd/core.h>
31 #define TWL6040_REG_ASICID 0x01
32 #define TWL6040_REG_ASICREV 0x02
33 #define TWL6040_REG_INTID 0x03
34 #define TWL6040_REG_INTMR 0x04
35 #define TWL6040_REG_NCPCTL 0x05
36 #define TWL6040_REG_LDOCTL 0x06
37 #define TWL6040_REG_HPPLLCTL 0x07
38 #define TWL6040_REG_LPPLLCTL 0x08
39 #define TWL6040_REG_LPPLLDIV 0x09
40 #define TWL6040_REG_AMICBCTL 0x0A
41 #define TWL6040_REG_DMICBCTL 0x0B
42 #define TWL6040_REG_MICLCTL 0x0C
43 #define TWL6040_REG_MICRCTL 0x0D
44 #define TWL6040_REG_MICGAIN 0x0E
45 #define TWL6040_REG_LINEGAIN 0x0F
46 #define TWL6040_REG_HSLCTL 0x10
47 #define TWL6040_REG_HSRCTL 0x11
48 #define TWL6040_REG_HSGAIN 0x12
49 #define TWL6040_REG_EARCTL 0x13
50 #define TWL6040_REG_HFLCTL 0x14
51 #define TWL6040_REG_HFLGAIN 0x15
52 #define TWL6040_REG_HFRCTL 0x16
53 #define TWL6040_REG_HFRGAIN 0x17
54 #define TWL6040_REG_VIBCTLL 0x18
55 #define TWL6040_REG_VIBDATL 0x19
56 #define TWL6040_REG_VIBCTLR 0x1A
57 #define TWL6040_REG_VIBDATR 0x1B
58 #define TWL6040_REG_HKCTL1 0x1C
59 #define TWL6040_REG_HKCTL2 0x1D
60 #define TWL6040_REG_GPOCTL 0x1E
61 #define TWL6040_REG_ALB 0x1F
62 #define TWL6040_REG_DLB 0x20
63 #define TWL6040_REG_TRIM1 0x28
64 #define TWL6040_REG_TRIM2 0x29
65 #define TWL6040_REG_TRIM3 0x2A
66 #define TWL6040_REG_HSOTRIM 0x2B
67 #define TWL6040_REG_HFOTRIM 0x2C
68 #define TWL6040_REG_ACCCTL 0x2D
69 #define TWL6040_REG_STATUS 0x2E
71 /* INTID (0x03) fields */
73 #define TWL6040_THINT 0x01
74 #define TWL6040_PLUGINT 0x02
75 #define TWL6040_UNPLUGINT 0x04
76 #define TWL6040_HOOKINT 0x08
77 #define TWL6040_HFINT 0x10
78 #define TWL6040_VIBINT 0x20
79 #define TWL6040_READYINT 0x40
81 /* INTMR (0x04) fields */
83 #define TWL6040_THMSK 0x01
84 #define TWL6040_PLUGMSK 0x02
85 #define TWL6040_HOOKMSK 0x08
86 #define TWL6040_HFMSK 0x10
87 #define TWL6040_VIBMSK 0x20
88 #define TWL6040_READYMSK 0x40
89 #define TWL6040_ALLINT_MSK 0x7B
91 /* NCPCTL (0x05) fields */
93 #define TWL6040_NCPENA 0x01
94 #define TWL6040_NCPOPEN 0x40
96 /* LDOCTL (0x06) fields */
98 #define TWL6040_LSLDOENA 0x01
99 #define TWL6040_HSLDOENA 0x04
100 #define TWL6040_REFENA 0x40
101 #define TWL6040_OSCENA 0x80
103 /* HPPLLCTL (0x07) fields */
105 #define TWL6040_HPLLENA 0x01
106 #define TWL6040_HPLLRST 0x02
107 #define TWL6040_HPLLBP 0x04
108 #define TWL6040_HPLLSQRENA 0x08
109 #define TWL6040_MCLK_12000KHZ (0 << 5)
110 #define TWL6040_MCLK_19200KHZ (1 << 5)
111 #define TWL6040_MCLK_26000KHZ (2 << 5)
112 #define TWL6040_MCLK_38400KHZ (3 << 5)
113 #define TWL6040_MCLK_MSK 0x60
115 /* LPPLLCTL (0x08) fields */
117 #define TWL6040_LPLLENA 0x01
118 #define TWL6040_LPLLRST 0x02
119 #define TWL6040_LPLLSEL 0x04
120 #define TWL6040_LPLLFIN 0x08
121 #define TWL6040_HPLLSEL 0x10
123 /* HSLCTL/R (0x10/0x11) fields */
125 #define TWL6040_HSDACMODE (1 << 1)
126 #define TWL6040_HSDRVMODE (1 << 3)
128 /* VIBCTLL/R (0x18/0x1A) fields */
130 #define TWL6040_VIBENA (1 << 0)
131 #define TWL6040_VIBSEL (1 << 1)
132 #define TWL6040_VIBCTRL (1 << 2)
133 #define TWL6040_VIBCTRL_P (1 << 3)
134 #define TWL6040_VIBCTRL_N (1 << 4)
136 /* VIBDATL/R (0x19/0x1B) fields */
138 #define TWL6040_VIBDAT_MAX 0x64
140 /* GPOCTL (0x1E) fields */
142 #define TWL6040_GPO1 0x01
143 #define TWL6040_GPO2 0x02
144 #define TWL6040_GPO3 0x03
146 /* ACCCTL (0x2D) fields */
148 #define TWL6040_I2CSEL 0x01
149 #define TWL6040_RESETSPLIT 0x04
150 #define TWL6040_INTCLRMODE 0x08
152 /* STATUS (0x2E) fields */
154 #define TWL6040_PLUGCOMP 0x02
155 #define TWL6040_VIBLOCDET 0x10
156 #define TWL6040_VIBROCDET 0x20
157 #define TWL6040_TSHUTDET 0x40
159 #define TWL6040_CELLS 2
161 #define TWL6040_REV_ES1_0 0x00
162 #define TWL6040_REV_ES1_1 0x01
163 #define TWL6040_REV_ES1_2 0x02
165 #define TWL6040_IRQ_TH 0
166 #define TWL6040_IRQ_PLUG 1
167 #define TWL6040_IRQ_HOOK 2
168 #define TWL6040_IRQ_HF 3
169 #define TWL6040_IRQ_VIB 4
170 #define TWL6040_IRQ_READY 5
173 #define TWL6040_SYSCLK_SEL_LPPLL 0
174 #define TWL6040_SYSCLK_SEL_HPPLL 1
179 struct mutex io_mutex;
180 struct mutex irq_mutex;
181 struct mfd_cell cells[TWL6040_CELLS];
182 struct completion ready;
187 u8 vibra_ctrl_cache[2];
193 unsigned int irq_base;
198 int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
199 int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
201 int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
203 int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
205 int twl6040_power(struct twl6040 *twl6040, int on);
206 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
207 unsigned int freq_in, unsigned int freq_out);
208 int twl6040_get_pll(struct twl6040 *twl6040);
209 unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
210 int twl6040_irq_init(struct twl6040 *twl6040);
211 void twl6040_irq_exit(struct twl6040 *twl6040);
212 /* Get the combined status of the vibra control register */
213 int twl6040_get_vibralr_status(struct twl6040 *twl6040);
215 static inline int twl6040_get_revid(struct twl6040 *twl6040)
221 #endif /* End of __TWL6040_CODEC_H__ */