2 * Definitions for the NVM Express interface
3 * Copyright (c) 2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22 #include <linux/types.h>
25 __u64 cap; /* Controller Capabilities */
26 __u32 vs; /* Version */
27 __u32 ims; /* Interrupt Mask Set */
28 __u32 imc; /* Interrupt Mask Clear */
29 __u32 cc; /* Controller Configuration */
30 __u32 csts; /* Controller Status */
31 __u32 aqa; /* Admin Queue Attributes */
32 __u64 asq; /* Admin SQ Base Address */
33 __u64 acq; /* Admin CQ Base Address */
37 NVME_CC_ENABLE = 1 << 0,
38 NVME_CC_CSS_NVM = 0 << 4,
39 NVME_CC_MPS_SHIFT = 7,
40 NVME_CC_ARB_RR = 0 << 11,
41 NVME_CC_ARB_WRRU = 1 << 11,
42 NVME_CC_ARB_VS = 3 << 11,
43 NVME_CC_SHN_NONE = 0 << 13,
44 NVME_CC_SHN_NORMAL = 1 << 13,
45 NVME_CC_SHN_ABRUPT = 2 << 13,
46 NVME_CSTS_RDY = 1 << 0,
47 NVME_CSTS_CFS = 1 << 1,
48 NVME_CSTS_SHST_NORMAL = 0 << 2,
49 NVME_CSTS_SHST_OCCUR = 1 << 2,
50 NVME_CSTS_SHST_CMPLT = 2 << 2,
53 #define NVME_VS(major, minor) (major << 16 | minor)
101 struct nvme_lbaf lbaf[16];
107 NVME_NS_FEAT_THIN = 1 << 0,
108 NVME_LBAF_RP_BEST = 0,
109 NVME_LBAF_RP_BETTER = 1,
110 NVME_LBAF_RP_GOOD = 2,
111 NVME_LBAF_RP_DEGRADED = 3,
114 struct nvme_lba_range_type {
125 NVME_LBART_TYPE_FS = 0x01,
126 NVME_LBART_TYPE_RAID = 0x02,
127 NVME_LBART_TYPE_CACHE = 0x03,
128 NVME_LBART_TYPE_SWAP = 0x04,
130 NVME_LBART_ATTRIB_TEMP = 1 << 0,
131 NVME_LBART_ATTRIB_HIDE = 1 << 1,
137 nvme_cmd_flush = 0x00,
138 nvme_cmd_write = 0x01,
139 nvme_cmd_read = 0x02,
140 nvme_cmd_write_uncor = 0x04,
141 nvme_cmd_compare = 0x05,
145 struct nvme_common_command {
157 struct nvme_rw_command {
176 NVME_RW_LR = 1 << 15,
177 NVME_RW_FUA = 1 << 14,
178 NVME_RW_DSM_FREQ_UNSPEC = 0,
179 NVME_RW_DSM_FREQ_TYPICAL = 1,
180 NVME_RW_DSM_FREQ_RARE = 2,
181 NVME_RW_DSM_FREQ_READS = 3,
182 NVME_RW_DSM_FREQ_WRITES = 4,
183 NVME_RW_DSM_FREQ_RW = 5,
184 NVME_RW_DSM_FREQ_ONCE = 6,
185 NVME_RW_DSM_FREQ_PREFETCH = 7,
186 NVME_RW_DSM_FREQ_TEMP = 8,
187 NVME_RW_DSM_LATENCY_NONE = 0 << 4,
188 NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
189 NVME_RW_DSM_LATENCY_NORM = 2 << 4,
190 NVME_RW_DSM_LATENCY_LOW = 3 << 4,
191 NVME_RW_DSM_SEQ_REQ = 1 << 6,
192 NVME_RW_DSM_COMPRESSED = 1 << 7,
197 enum nvme_admin_opcode {
198 nvme_admin_delete_sq = 0x00,
199 nvme_admin_create_sq = 0x01,
200 nvme_admin_get_features = 0x02,
201 nvme_admin_delete_cq = 0x04,
202 nvme_admin_create_cq = 0x05,
203 nvme_admin_identify = 0x06,
204 nvme_admin_abort_cmd = 0x08,
205 nvme_admin_set_features = 0x09,
206 nvme_admin_get_log_page = 0x0a,
207 nvme_admin_async_event = 0x0c,
208 nvme_admin_download_fw = 0x0d,
209 nvme_admin_security_recv = 0x0e,
210 nvme_admin_format_nvm = 0x10,
211 nvme_admin_security_send = 0x11,
212 nvme_admin_activate_fw = 0x14,
216 NVME_QUEUE_PHYS_CONTIG = (1 << 0),
217 NVME_CQ_IRQ_ENABLED = (1 << 1),
218 NVME_SQ_PRIO_URGENT = (0 << 1),
219 NVME_SQ_PRIO_HIGH = (1 << 1),
220 NVME_SQ_PRIO_MEDIUM = (2 << 1),
221 NVME_SQ_PRIO_LOW = (3 << 1),
222 NVME_FEAT_ARBITRATION = 0x01,
223 NVME_FEAT_POWER_MGMT = 0x02,
224 NVME_FEAT_LBA_RANGE = 0x03,
225 NVME_FEAT_TEMP_THRESH = 0x04,
226 NVME_FEAT_ERR_RECOVERY = 0x05,
227 NVME_FEAT_VOLATILE_WC = 0x06,
228 NVME_FEAT_NUM_QUEUES = 0x07,
229 NVME_FEAT_IRQ_COALESCE = 0x08,
230 NVME_FEAT_IRQ_CONFIG = 0x09,
231 NVME_FEAT_WRITE_ATOMIC = 0x0a,
232 NVME_FEAT_ASYNC_EVENT = 0x0b,
233 NVME_FEAT_SW_PROGRESS = 0x0c,
236 struct nvme_identify {
248 struct nvme_features {
261 struct nvme_create_cq {
275 struct nvme_create_sq {
289 struct nvme_delete_queue {
299 struct nvme_command {
301 struct nvme_common_command common;
302 struct nvme_rw_command rw;
303 struct nvme_identify identify;
304 struct nvme_features features;
305 struct nvme_create_cq create_cq;
306 struct nvme_create_sq create_sq;
307 struct nvme_delete_queue delete_queue;
311 /* XXX: Sync with spec */
313 NVME_SC_SUCCESS = 0x0,
314 NVME_SC_INVALID_OPCODE = 0x1,
315 NVME_SC_INVALID_FIELD = 0x2,
316 NVME_SC_CMDID_CONFLICT = 0x3,
317 NVME_SC_DATA_XFER_ERROR = 0x4,
318 NVME_SC_POWER_LOSS = 0x5,
319 NVME_SC_INTERNAL = 0x6,
320 NVME_SC_ABORT_REQ = 0x7,
321 NVME_SC_ABORT_QUEUE = 0x8,
322 NVME_SC_FUSED_FAIL = 0x9,
323 NVME_SC_FUSED_MISSING = 0xa,
324 NVME_SC_LBA_RANGE = 0x80,
325 NVME_SC_CAP_EXCEEDED = 0x81,
326 NVME_SC_NS_NOT_READY = 0x82,
327 NVME_SC_CQ_INVALID = 0x100,
328 NVME_SC_QID_INVALID = 0x101,
329 NVME_SC_QUEUE_SIZE = 0x102,
330 NVME_SC_WRITE_FAULT = 0x280,
331 NVME_SC_READ_ERROR = 0x281,
334 struct nvme_completion {
335 __le32 result; /* Used by admin commands to return data */
337 __le16 sq_head; /* how much of this queue may be reclaimed */
338 __le16 sq_id; /* submission queue that generated this entry */
339 __u16 command_id; /* of the command which completed */
340 __le16 status; /* did the command fail, and if so, why? */
343 #define NVME_IOCTL_IDENTIFY_NS _IOW('N', 0x40, struct nvme_id_ns)
344 #define NVME_IOCTL_IDENTIFY_CTRL _IOW('N', 0x41, struct nvme_id_ctrl)
345 #define NVME_IOCTL_GET_RANGE_TYPE _IOW('N', 0x42, struct nvme_lba_range_type)
347 #endif /* _LINUX_NVME_H */