4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/mod_devicetable.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/list.h>
26 #include <linux/compiler.h>
27 #include <linux/errno.h>
28 #include <linux/kobject.h>
29 #include <linux/atomic.h>
30 #include <linux/device.h>
32 #include <linux/resource_ext.h>
33 #include <uapi/linux/pci.h>
35 #include <linux/pci_ids.h>
38 * The PCI interface treats multi-function devices as independent
39 * devices. The slot/function address of each device is encoded
40 * in a single byte as follows:
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h.
46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel-only defines are being added here.
49 #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn))
50 /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
51 #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)
53 /* pci_slot represents a physical slot */
55 struct pci_bus *bus; /* The bus this slot is on */
56 struct list_head list; /* node in list of slots on this bus */
57 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
62 static inline const char *pci_slot_name(const struct pci_slot *slot)
64 return kobject_name(&slot->kobj);
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
80 * For PCI devices, the region numbers are assigned this way:
83 /* #0-5: standard PCI resources */
85 PCI_STD_RESOURCE_END = 5,
87 /* #6: expansion ROM resource */
90 /* device specific resources */
93 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
103 /* total resources associated with a PCI device */
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
110 typedef int __bitwise pci_power_t;
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
120 /* Remember to update this when the list above changes! */
121 extern const char *pci_power_names[];
123 static inline const char *pci_power_name(pci_power_t state)
125 return pci_power_names[1 + (int) state];
128 #define PCI_PM_D2_DELAY 200
129 #define PCI_PM_D3_WAIT 10
130 #define PCI_PM_D3COLD_WAIT 100
131 #define PCI_PM_BUS_WAIT 50
133 /** The pci_channel state describes connectivity between the CPU and
134 * the pci device. If some PCI bus between here and the pci device
135 * has crashed or locked up, this info is reflected here.
137 typedef unsigned int __bitwise pci_channel_state_t;
139 enum pci_channel_state {
140 /* I/O channel is in normal state */
141 pci_channel_io_normal = (__force pci_channel_state_t) 1,
143 /* I/O to channel is blocked */
144 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
146 /* PCI card is dead */
147 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
150 typedef unsigned int __bitwise pcie_reset_state_t;
152 enum pcie_reset_state {
153 /* Reset is NOT asserted (Use to deassert reset) */
154 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
156 /* Use #PERST to reset PCIe device */
157 pcie_warm_reset = (__force pcie_reset_state_t) 2,
159 /* Use PCIe Hot Reset to reset device */
160 pcie_hot_reset = (__force pcie_reset_state_t) 3
163 typedef unsigned short __bitwise pci_dev_flags_t;
165 /* INTX_DISABLE in PCI_COMMAND register disables MSI
168 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) (1 << 0),
169 /* Device configuration is irrevocably lost if disabled into D3 */
170 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) (1 << 1),
171 /* Provide indication device is assigned by a Virtual Machine Manager */
172 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) (1 << 2),
173 /* Flag for quirk use to store if quirk-specific ACS is enabled */
174 PCI_DEV_FLAGS_ACS_ENABLED_QUIRK = (__force pci_dev_flags_t) (1 << 3),
175 /* Flag to indicate the device uses dma_alias_devfn */
176 PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4),
177 /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */
178 PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5),
179 /* Do not use bus resets for device */
180 PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6),
181 /* Do not use PM reset even if device advertises NoSoftRst- */
182 PCI_DEV_FLAGS_NO_PM_RESET = (__force pci_dev_flags_t) (1 << 7),
183 /* Get VPD from function 0 VPD */
184 PCI_DEV_FLAGS_VPD_REF_F0 = (__force pci_dev_flags_t) (1 << 8),
187 enum pci_irq_reroute_variant {
188 INTEL_IRQ_REROUTE_VARIANT = 1,
189 MAX_IRQ_REROUTE_VARIANTS = 3
192 typedef unsigned short __bitwise pci_bus_flags_t;
194 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
195 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
198 /* These values come from the PCI Express Spec */
199 enum pcie_link_width {
200 PCIE_LNK_WIDTH_RESRV = 0x00,
208 PCIE_LNK_WIDTH_UNKNOWN = 0xFF,
211 /* Based on the PCI Hotplug Spec, but some values are made up by us */
213 PCI_SPEED_33MHz = 0x00,
214 PCI_SPEED_66MHz = 0x01,
215 PCI_SPEED_66MHz_PCIX = 0x02,
216 PCI_SPEED_100MHz_PCIX = 0x03,
217 PCI_SPEED_133MHz_PCIX = 0x04,
218 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
219 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
220 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
221 PCI_SPEED_66MHz_PCIX_266 = 0x09,
222 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
223 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
229 PCI_SPEED_66MHz_PCIX_533 = 0x11,
230 PCI_SPEED_100MHz_PCIX_533 = 0x12,
231 PCI_SPEED_133MHz_PCIX_533 = 0x13,
232 PCIE_SPEED_2_5GT = 0x14,
233 PCIE_SPEED_5_0GT = 0x15,
234 PCIE_SPEED_8_0GT = 0x16,
235 PCI_SPEED_UNKNOWN = 0xff,
238 struct pci_cap_saved_data {
245 struct pci_cap_saved_state {
246 struct hlist_node next;
247 struct pci_cap_saved_data cap;
250 struct pcie_link_state;
256 * The pci_dev structure is used to describe PCI devices.
259 struct list_head bus_list; /* node in per-bus list */
260 struct pci_bus *bus; /* bus this device is on */
261 struct pci_bus *subordinate; /* bus this device bridges to */
263 void *sysdata; /* hook for sys-specific extension */
264 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
265 struct pci_slot *slot; /* Physical slot this device is in */
267 unsigned int devfn; /* encoded device & function index */
268 unsigned short vendor;
269 unsigned short device;
270 unsigned short subsystem_vendor;
271 unsigned short subsystem_device;
272 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
273 u8 revision; /* PCI revision, low byte of class word */
274 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
275 u8 pcie_cap; /* PCIe capability offset */
276 u8 msi_cap; /* MSI capability offset */
277 u8 msix_cap; /* MSI-X capability offset */
278 u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */
279 u8 rom_base_reg; /* which config register controls the ROM */
280 u8 pin; /* which interrupt pin this device uses */
281 u16 pcie_flags_reg; /* cached PCIe Capabilities Register */
282 u8 dma_alias_devfn;/* devfn of DMA alias, if any */
284 struct pci_driver *driver; /* which driver has allocated this device */
285 u64 dma_mask; /* Mask of the bits of bus address this
286 device implements. Normally this is
287 0xffffffff. You only need to change
288 this if your device has broken DMA
289 or supports 64-bit transfers. */
291 struct device_dma_parameters dma_parms;
293 pci_power_t current_state; /* Current operating state. In ACPI-speak,
294 this is D0-D3, D0 being fully functional,
296 u8 pm_cap; /* PM capability offset */
297 unsigned int pme_support:5; /* Bitmask of states from which PME#
299 unsigned int pme_interrupt:1;
300 unsigned int pme_poll:1; /* Poll device's PME status bit */
301 unsigned int d1_support:1; /* Low power state D1 is supported */
302 unsigned int d2_support:1; /* Low power state D2 is supported */
303 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
304 unsigned int no_d3cold:1; /* D3cold is forbidden */
305 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
306 unsigned int mmio_always_on:1; /* disallow turning off io/mem
307 decoding during bar sizing */
308 unsigned int wakeup_prepared:1;
309 unsigned int runtime_d3cold:1; /* whether go through runtime
310 D3cold, not set for devices
311 powered on/off by the
312 corresponding bridge */
313 unsigned int ignore_hotplug:1; /* Ignore hotplug events */
314 unsigned int d3_delay; /* D3->D0 transition time in ms */
315 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
317 #ifdef CONFIG_PCIEASPM
318 struct pcie_link_state *link_state; /* ASPM link state */
321 pci_channel_state_t error_state; /* current connectivity state */
322 struct device dev; /* Generic device interface */
324 int cfg_size; /* Size of configuration space */
327 * Instead of touching interrupt line and base address registers
328 * directly, use the values stored here. They might be different!
331 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
333 bool match_driver; /* Skip attaching driver */
334 /* These fields are used by common fixups */
335 unsigned int transparent:1; /* Subtractive decode PCI bridge */
336 unsigned int multifunction:1;/* Part of multi-function device */
337 /* keep track of device state */
338 unsigned int is_added:1;
339 unsigned int is_busmaster:1; /* device is busmaster */
340 unsigned int no_msi:1; /* device may not use msi */
341 unsigned int no_64bit_msi:1; /* device may only use 32-bit MSIs */
342 unsigned int block_cfg_access:1; /* config space access is blocked */
343 unsigned int broken_parity_status:1; /* Device generates false positive parity */
344 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
345 unsigned int msi_enabled:1;
346 unsigned int msix_enabled:1;
347 unsigned int ari_enabled:1; /* ARI forwarding */
348 unsigned int ats_enabled:1; /* Address Translation Service */
349 unsigned int is_managed:1;
350 unsigned int needs_freset:1; /* Dev requires fundamental reset */
351 unsigned int state_saved:1;
352 unsigned int is_physfn:1;
353 unsigned int is_virtfn:1;
354 unsigned int reset_fn:1;
355 unsigned int is_hotplug_bridge:1;
356 unsigned int __aer_firmware_first_valid:1;
357 unsigned int __aer_firmware_first:1;
358 unsigned int broken_intx_masking:1;
359 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
360 unsigned int irq_managed:1;
361 unsigned int has_secondary_link:1;
362 pci_dev_flags_t dev_flags;
363 atomic_t enable_cnt; /* pci_enable_device has been called */
365 u32 saved_config_space[16]; /* config space saved at suspend time */
366 struct hlist_head saved_cap_space;
367 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
368 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
369 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
370 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
371 #ifdef CONFIG_PCI_MSI
372 const struct attribute_group **msi_irq_groups;
375 #ifdef CONFIG_PCI_ATS
377 struct pci_sriov *sriov; /* SR-IOV capability related */
378 struct pci_dev *physfn; /* the PF this VF is associated with */
380 u16 ats_cap; /* ATS Capability offset */
381 u8 ats_stu; /* ATS Smallest Translation Unit */
382 atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */
384 phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
385 size_t romlen; /* Length of ROM if it's not from the BAR */
386 char *driver_override; /* Driver name to force a match */
389 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
391 #ifdef CONFIG_PCI_IOV
398 struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
400 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
401 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
403 static inline int pci_channel_offline(struct pci_dev *pdev)
405 return (pdev->error_state != pci_channel_io_normal);
408 struct pci_host_bridge {
410 struct pci_bus *bus; /* root bus */
411 struct list_head windows; /* resource_entry */
412 void (*release_fn)(struct pci_host_bridge *);
414 unsigned int ignore_reset_delay:1; /* for entire hierarchy */
415 /* Resource alignment requirements */
416 resource_size_t (*align_resource)(struct pci_dev *dev,
417 const struct resource *res,
418 resource_size_t start,
419 resource_size_t size,
420 resource_size_t align);
423 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
425 struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus);
427 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
428 void (*release_fn)(struct pci_host_bridge *),
431 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
434 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
435 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
436 * buses below host bridges or subtractive decode bridges) go in the list.
437 * Use pci_bus_for_each_resource() to iterate through all the resources.
441 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
442 * and there's no way to program the bridge with the details of the window.
443 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
444 * decode bit set, because they are explicit and can be programmed with _SRS.
446 #define PCI_SUBTRACTIVE_DECODE 0x1
448 struct pci_bus_resource {
449 struct list_head list;
450 struct resource *res;
454 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
457 struct list_head node; /* node in list of buses */
458 struct pci_bus *parent; /* parent bus this bridge is on */
459 struct list_head children; /* list of child buses */
460 struct list_head devices; /* list of devices on this bus */
461 struct pci_dev *self; /* bridge device as seen by parent */
462 struct list_head slots; /* list of slots on this bus;
463 protected by pci_slot_mutex */
464 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
465 struct list_head resources; /* address space routed to this bus */
466 struct resource busn_res; /* bus numbers routed to this bus */
468 struct pci_ops *ops; /* configuration access functions */
469 struct msi_controller *msi; /* MSI controller */
470 void *sysdata; /* hook for sys-specific extension */
471 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
473 unsigned char number; /* bus number */
474 unsigned char primary; /* number of primary bridge */
475 unsigned char max_bus_speed; /* enum pci_bus_speed */
476 unsigned char cur_bus_speed; /* enum pci_bus_speed */
477 #ifdef CONFIG_PCI_DOMAINS_GENERIC
483 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
484 pci_bus_flags_t bus_flags; /* inherited by child buses */
485 struct device *bridge;
487 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
488 struct bin_attribute *legacy_mem; /* legacy mem */
489 unsigned int is_added:1;
492 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
495 * Returns true if the PCI bus is root (behind host-PCI bridge),
498 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
499 * This is incorrect because "virtual" buses added for SR-IOV (via
500 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
502 static inline bool pci_is_root_bus(struct pci_bus *pbus)
504 return !(pbus->parent);
508 * pci_is_bridge - check if the PCI device is a bridge
511 * Return true if the PCI device is bridge whether it has subordinate
514 static inline bool pci_is_bridge(struct pci_dev *dev)
516 return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
517 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
520 static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
522 dev = pci_physfn(dev);
523 if (pci_is_root_bus(dev->bus))
526 return dev->bus->self;
529 struct device *pci_get_host_bridge_device(struct pci_dev *dev);
530 void pci_put_host_bridge_device(struct device *dev);
532 #ifdef CONFIG_PCI_MSI
533 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
535 return pci_dev->msi_enabled || pci_dev->msix_enabled;
538 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
542 * Error values that may be returned by PCI functions.
544 #define PCIBIOS_SUCCESSFUL 0x00
545 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
546 #define PCIBIOS_BAD_VENDOR_ID 0x83
547 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
548 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
549 #define PCIBIOS_SET_FAILED 0x88
550 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
553 * Translate above to generic errno for passing back through non-PCI code.
555 static inline int pcibios_err_to_errno(int err)
557 if (err <= PCIBIOS_SUCCESSFUL)
558 return err; /* Assume already errno */
561 case PCIBIOS_FUNC_NOT_SUPPORTED:
563 case PCIBIOS_BAD_VENDOR_ID:
565 case PCIBIOS_DEVICE_NOT_FOUND:
567 case PCIBIOS_BAD_REGISTER_NUMBER:
569 case PCIBIOS_SET_FAILED:
571 case PCIBIOS_BUFFER_TOO_SMALL:
578 /* Low-level architecture-dependent routines */
581 void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
582 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
583 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
587 * ACPI needs to be able to access PCI config space before we've done a
588 * PCI bus scan and created pci_bus structures.
590 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
591 int reg, int len, u32 *val);
592 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
593 int reg, int len, u32 val);
595 #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT
596 typedef u64 pci_bus_addr_t;
598 typedef u32 pci_bus_addr_t;
601 struct pci_bus_region {
602 pci_bus_addr_t start;
607 spinlock_t lock; /* protects list, index */
608 struct list_head list; /* for IDs added at runtime */
613 * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
614 * a set of callbacks in struct pci_error_handlers, that device driver
615 * will be notified of PCI bus errors, and will be driven to recovery
616 * when an error occurs.
619 typedef unsigned int __bitwise pci_ers_result_t;
621 enum pci_ers_result {
622 /* no result/none/not supported in device driver */
623 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
625 /* Device driver can recover without slot reset */
626 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
628 /* Device driver wants slot to be reset. */
629 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
631 /* Device has completely failed, is unrecoverable */
632 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
634 /* Device driver is fully recovered and operational */
635 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
637 /* No AER capabilities registered for the driver */
638 PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6,
641 /* PCI bus error event callbacks */
642 struct pci_error_handlers {
643 /* PCI bus error detected on this device */
644 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
645 enum pci_channel_state error);
647 /* MMIO has been re-enabled, but not DMA */
648 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
650 /* PCI Express link has been reset */
651 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
653 /* PCI slot has been reset */
654 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
656 /* PCI function reset prepare or completed */
657 void (*reset_notify)(struct pci_dev *dev, bool prepare);
659 /* Device driver may resume normal operations */
660 void (*resume)(struct pci_dev *dev);
666 struct list_head node;
668 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
669 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
670 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
671 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
672 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
673 int (*resume_early) (struct pci_dev *dev);
674 int (*resume) (struct pci_dev *dev); /* Device woken up */
675 void (*shutdown) (struct pci_dev *dev);
676 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */
677 const struct pci_error_handlers *err_handler;
678 struct device_driver driver;
679 struct pci_dynids dynids;
682 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
685 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
686 * @_table: device table name
688 * This macro is deprecated and should not be used in new code.
690 #define DEFINE_PCI_DEVICE_TABLE(_table) \
691 const struct pci_device_id _table[]
694 * PCI_DEVICE - macro used to describe a specific pci device
695 * @vend: the 16 bit PCI Vendor ID
696 * @dev: the 16 bit PCI Device ID
698 * This macro is used to create a struct pci_device_id that matches a
699 * specific device. The subvendor and subdevice fields will be set to
702 #define PCI_DEVICE(vend,dev) \
703 .vendor = (vend), .device = (dev), \
704 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
707 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
708 * @vend: the 16 bit PCI Vendor ID
709 * @dev: the 16 bit PCI Device ID
710 * @subvend: the 16 bit PCI Subvendor ID
711 * @subdev: the 16 bit PCI Subdevice ID
713 * This macro is used to create a struct pci_device_id that matches a
714 * specific device with subsystem information.
716 #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
717 .vendor = (vend), .device = (dev), \
718 .subvendor = (subvend), .subdevice = (subdev)
721 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
722 * @dev_class: the class, subclass, prog-if triple for this device
723 * @dev_class_mask: the class mask for this device
725 * This macro is used to create a struct pci_device_id that matches a
726 * specific PCI class. The vendor, device, subvendor, and subdevice
727 * fields will be set to PCI_ANY_ID.
729 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
730 .class = (dev_class), .class_mask = (dev_class_mask), \
731 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
732 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
735 * PCI_VDEVICE - macro used to describe a specific pci device in short form
736 * @vend: the vendor name
737 * @dev: the 16 bit PCI Device ID
739 * This macro is used to create a struct pci_device_id that matches a
740 * specific PCI device. The subvendor, and subdevice fields will be set
741 * to PCI_ANY_ID. The macro allows the next field to follow as the device
745 #define PCI_VDEVICE(vend, dev) \
746 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
747 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
750 PCI_REASSIGN_ALL_RSRC = 0x00000001, /* ignore firmware setup */
751 PCI_REASSIGN_ALL_BUS = 0x00000002, /* reassign all bus numbers */
752 PCI_PROBE_ONLY = 0x00000004, /* use existing setup */
753 PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, /* don't do ISA alignment */
754 PCI_ENABLE_PROC_DOMAINS = 0x00000010, /* enable domains in /proc */
755 PCI_COMPAT_DOMAIN_0 = 0x00000020, /* ... except domain 0 */
756 PCI_SCAN_ALL_PCIE_DEVS = 0x00000040, /* scan all, not just dev 0 */
759 /* these external functions are only available when PCI support is enabled */
762 extern unsigned int pci_flags;
764 static inline void pci_set_flags(int flags) { pci_flags = flags; }
765 static inline void pci_add_flags(int flags) { pci_flags |= flags; }
766 static inline void pci_clear_flags(int flags) { pci_flags &= ~flags; }
767 static inline int pci_has_flag(int flag) { return pci_flags & flag; }
769 void pcie_bus_configure_settings(struct pci_bus *bus);
771 enum pcie_bus_config_types {
772 PCIE_BUS_TUNE_OFF, /* don't touch MPS at all */
773 PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */
774 PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */
775 PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */
776 PCIE_BUS_PEER2PEER, /* set MPS = 128 for all devices */
779 extern enum pcie_bus_config_types pcie_bus_config;
781 extern struct bus_type pci_bus_type;
783 /* Do NOT directly access these two variables, unless you are arch-specific PCI
784 * code, or PCI core code. */
785 extern struct list_head pci_root_buses; /* list of all known PCI buses */
786 /* Some device drivers need know if PCI is initiated */
787 int no_pci_devices(void);
789 void pcibios_resource_survey_bus(struct pci_bus *bus);
790 void pcibios_add_bus(struct pci_bus *bus);
791 void pcibios_remove_bus(struct pci_bus *bus);
792 void pcibios_fixup_bus(struct pci_bus *);
793 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
794 /* Architecture-specific versions may override this (weak) */
795 char *pcibios_setup(char *str);
797 /* Used only when drivers/pci/setup.c is used */
798 resource_size_t pcibios_align_resource(void *, const struct resource *,
801 void pcibios_update_irq(struct pci_dev *, int irq);
803 /* Weak but can be overriden by arch */
804 void pci_fixup_cardbus(struct pci_bus *);
806 /* Generic PCI functions used internally */
808 void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
809 struct resource *res);
810 void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
811 struct pci_bus_region *region);
812 void pcibios_scan_specific_bus(int busn);
813 struct pci_bus *pci_find_bus(int domain, int busnr);
814 void pci_bus_add_devices(const struct pci_bus *bus);
815 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
816 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
817 struct pci_ops *ops, void *sysdata,
818 struct list_head *resources);
819 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
820 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
821 void pci_bus_release_busn_res(struct pci_bus *b);
822 struct pci_bus *pci_scan_root_bus_msi(struct device *parent, int bus,
823 struct pci_ops *ops, void *sysdata,
824 struct list_head *resources,
825 struct msi_controller *msi);
826 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
827 struct pci_ops *ops, void *sysdata,
828 struct list_head *resources);
829 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
831 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
832 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
834 struct hotplug_slot *hotplug);
835 void pci_destroy_slot(struct pci_slot *slot);
837 void pci_dev_assign_slot(struct pci_dev *dev);
839 static inline void pci_dev_assign_slot(struct pci_dev *dev) { }
841 int pci_scan_slot(struct pci_bus *bus, int devfn);
842 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
843 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
844 unsigned int pci_scan_child_bus(struct pci_bus *bus);
845 void pci_bus_add_device(struct pci_dev *dev);
846 void pci_read_bridge_bases(struct pci_bus *child);
847 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
848 struct resource *res);
849 struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev);
850 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
851 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
852 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
853 struct pci_dev *pci_dev_get(struct pci_dev *dev);
854 void pci_dev_put(struct pci_dev *dev);
855 void pci_remove_bus(struct pci_bus *b);
856 void pci_stop_and_remove_bus_device(struct pci_dev *dev);
857 void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev);
858 void pci_stop_root_bus(struct pci_bus *bus);
859 void pci_remove_root_bus(struct pci_bus *bus);
860 void pci_setup_cardbus(struct pci_bus *bus);
861 void pci_sort_breadthfirst(void);
862 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
863 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
864 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
866 /* Generic PCI functions exported to card drivers */
868 enum pci_lost_interrupt_reason {
869 PCI_LOST_IRQ_NO_INFORMATION = 0,
870 PCI_LOST_IRQ_DISABLE_MSI,
871 PCI_LOST_IRQ_DISABLE_MSIX,
872 PCI_LOST_IRQ_DISABLE_ACPI,
874 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
875 int pci_find_capability(struct pci_dev *dev, int cap);
876 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
877 int pci_find_ext_capability(struct pci_dev *dev, int cap);
878 int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
879 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
880 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
881 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
883 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
884 struct pci_dev *from);
885 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
886 unsigned int ss_vendor, unsigned int ss_device,
887 struct pci_dev *from);
888 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
889 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
891 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
894 return pci_get_domain_bus_and_slot(0, bus, devfn);
896 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
897 int pci_dev_present(const struct pci_device_id *ids);
899 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
901 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
902 int where, u16 *val);
903 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
904 int where, u32 *val);
905 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
907 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
909 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
912 int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
913 int where, int size, u32 *val);
914 int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
915 int where, int size, u32 val);
916 int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
917 int where, int size, u32 *val);
918 int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
919 int where, int size, u32 val);
921 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
923 static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
925 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
927 static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
929 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
931 static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
934 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
936 static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
938 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
940 static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
942 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
944 static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
947 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
950 int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
951 int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
952 int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
953 int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
954 int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
956 int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
959 static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
962 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
965 static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
968 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
971 static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
974 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
977 static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
980 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
983 /* user-space driven config access */
984 int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
985 int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
986 int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
987 int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
988 int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
989 int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
991 int __must_check pci_enable_device(struct pci_dev *dev);
992 int __must_check pci_enable_device_io(struct pci_dev *dev);
993 int __must_check pci_enable_device_mem(struct pci_dev *dev);
994 int __must_check pci_reenable_device(struct pci_dev *);
995 int __must_check pcim_enable_device(struct pci_dev *pdev);
996 void pcim_pin_device(struct pci_dev *pdev);
998 static inline int pci_is_enabled(struct pci_dev *pdev)
1000 return (atomic_read(&pdev->enable_cnt) > 0);
1003 static inline int pci_is_managed(struct pci_dev *pdev)
1005 return pdev->is_managed;
1008 static inline void pci_set_managed_irq(struct pci_dev *pdev, unsigned int irq)
1011 pdev->irq_managed = 1;
1014 static inline void pci_reset_managed_irq(struct pci_dev *pdev)
1017 pdev->irq_managed = 0;
1020 static inline bool pci_has_managed_irq(struct pci_dev *pdev)
1022 return pdev->irq_managed && pdev->irq > 0;
1025 void pci_disable_device(struct pci_dev *dev);
1027 extern unsigned int pcibios_max_latency;
1028 void pci_set_master(struct pci_dev *dev);
1029 void pci_clear_master(struct pci_dev *dev);
1031 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
1032 int pci_set_cacheline_size(struct pci_dev *dev);
1033 #define HAVE_PCI_SET_MWI
1034 int __must_check pci_set_mwi(struct pci_dev *dev);
1035 int pci_try_set_mwi(struct pci_dev *dev);
1036 void pci_clear_mwi(struct pci_dev *dev);
1037 void pci_intx(struct pci_dev *dev, int enable);
1038 bool pci_intx_mask_supported(struct pci_dev *dev);
1039 bool pci_check_and_mask_intx(struct pci_dev *dev);
1040 bool pci_check_and_unmask_intx(struct pci_dev *dev);
1041 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
1042 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
1043 int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask);
1044 int pci_wait_for_pending_transaction(struct pci_dev *dev);
1045 int pcix_get_max_mmrbc(struct pci_dev *dev);
1046 int pcix_get_mmrbc(struct pci_dev *dev);
1047 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
1048 int pcie_get_readrq(struct pci_dev *dev);
1049 int pcie_set_readrq(struct pci_dev *dev, int rq);
1050 int pcie_get_mps(struct pci_dev *dev);
1051 int pcie_set_mps(struct pci_dev *dev, int mps);
1052 int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
1053 enum pcie_link_width *width);
1054 int __pci_reset_function(struct pci_dev *dev);
1055 int __pci_reset_function_locked(struct pci_dev *dev);
1056 int pci_reset_function(struct pci_dev *dev);
1057 int pci_try_reset_function(struct pci_dev *dev);
1058 int pci_probe_reset_slot(struct pci_slot *slot);
1059 int pci_reset_slot(struct pci_slot *slot);
1060 int pci_try_reset_slot(struct pci_slot *slot);
1061 int pci_probe_reset_bus(struct pci_bus *bus);
1062 int pci_reset_bus(struct pci_bus *bus);
1063 int pci_try_reset_bus(struct pci_bus *bus);
1064 void pci_reset_secondary_bus(struct pci_dev *dev);
1065 void pcibios_reset_secondary_bus(struct pci_dev *dev);
1066 void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
1067 void pci_update_resource(struct pci_dev *dev, int resno);
1068 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
1069 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
1070 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
1071 bool pci_device_is_present(struct pci_dev *pdev);
1072 void pci_ignore_hotplug(struct pci_dev *dev);
1074 /* ROM control related routines */
1075 int pci_enable_rom(struct pci_dev *pdev);
1076 void pci_disable_rom(struct pci_dev *pdev);
1077 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
1078 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
1079 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
1080 void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
1082 /* Power management related routines */
1083 int pci_save_state(struct pci_dev *dev);
1084 void pci_restore_state(struct pci_dev *dev);
1085 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
1086 int pci_load_saved_state(struct pci_dev *dev,
1087 struct pci_saved_state *state);
1088 int pci_load_and_free_saved_state(struct pci_dev *dev,
1089 struct pci_saved_state **state);
1090 struct pci_cap_saved_state *pci_find_saved_cap(struct pci_dev *dev, char cap);
1091 struct pci_cap_saved_state *pci_find_saved_ext_cap(struct pci_dev *dev,
1093 int pci_add_cap_save_buffer(struct pci_dev *dev, char cap, unsigned int size);
1094 int pci_add_ext_cap_save_buffer(struct pci_dev *dev,
1095 u16 cap, unsigned int size);
1096 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
1097 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
1098 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
1099 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
1100 void pci_pme_active(struct pci_dev *dev, bool enable);
1101 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1102 bool runtime, bool enable);
1103 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
1104 int pci_prepare_to_sleep(struct pci_dev *dev);
1105 int pci_back_from_sleep(struct pci_dev *dev);
1106 bool pci_dev_run_wake(struct pci_dev *dev);
1107 bool pci_check_pme_status(struct pci_dev *dev);
1108 void pci_pme_wakeup_bus(struct pci_bus *bus);
1110 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1113 return __pci_enable_wake(dev, state, false, enable);
1116 /* PCI Virtual Channel */
1117 int pci_save_vc_state(struct pci_dev *dev);
1118 void pci_restore_vc_state(struct pci_dev *dev);
1119 void pci_allocate_vc_save_buffers(struct pci_dev *dev);
1121 /* For use by arch with custom probe code */
1122 void set_pcie_port_type(struct pci_dev *pdev);
1123 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
1125 /* Functions for PCI Hotplug drivers to use */
1126 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1127 unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
1128 unsigned int pci_rescan_bus(struct pci_bus *bus);
1129 void pci_lock_rescan_remove(void);
1130 void pci_unlock_rescan_remove(void);
1132 /* Vital product data routines */
1133 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
1134 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
1136 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1137 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
1138 void pci_bus_assign_resources(const struct pci_bus *bus);
1139 void pci_bus_size_bridges(struct pci_bus *bus);
1140 int pci_claim_resource(struct pci_dev *, int);
1141 int pci_claim_bridge_resource(struct pci_dev *bridge, int i);
1142 void pci_assign_unassigned_resources(void);
1143 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1144 void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
1145 void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
1146 void pdev_enable_device(struct pci_dev *);
1147 int pci_enable_resources(struct pci_dev *, int mask);
1148 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
1149 int (*)(const struct pci_dev *, u8, u8));
1150 #define HAVE_PCI_REQ_REGIONS 2
1151 int __must_check pci_request_regions(struct pci_dev *, const char *);
1152 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
1153 void pci_release_regions(struct pci_dev *);
1154 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1155 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
1156 void pci_release_region(struct pci_dev *, int);
1157 int pci_request_selected_regions(struct pci_dev *, int, const char *);
1158 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
1159 void pci_release_selected_regions(struct pci_dev *, int);
1161 /* drivers/pci/bus.c */
1162 struct pci_bus *pci_bus_get(struct pci_bus *bus);
1163 void pci_bus_put(struct pci_bus *bus);
1164 void pci_add_resource(struct list_head *resources, struct resource *res);
1165 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
1166 resource_size_t offset);
1167 void pci_free_resource_list(struct list_head *resources);
1168 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
1169 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
1170 void pci_bus_remove_resources(struct pci_bus *bus);
1172 #define pci_bus_for_each_resource(bus, res, i) \
1174 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
1177 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
1178 struct resource *res, resource_size_t size,
1179 resource_size_t align, resource_size_t min,
1180 unsigned long type_mask,
1181 resource_size_t (*alignf)(void *,
1182 const struct resource *,
1188 int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
1190 static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar)
1192 struct pci_bus_region region;
1194 pcibios_resource_to_bus(pdev->bus, ®ion, &pdev->resource[bar]);
1195 return region.start;
1198 /* Proper probing supporting hot-pluggable devices */
1199 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1200 const char *mod_name);
1203 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1205 #define pci_register_driver(driver) \
1206 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1208 void pci_unregister_driver(struct pci_driver *dev);
1211 * module_pci_driver() - Helper macro for registering a PCI driver
1212 * @__pci_driver: pci_driver struct
1214 * Helper macro for PCI drivers which do not do anything special in module
1215 * init/exit. This eliminates a lot of boilerplate. Each module may only
1216 * use this macro once, and calling it replaces module_init() and module_exit()
1218 #define module_pci_driver(__pci_driver) \
1219 module_driver(__pci_driver, pci_register_driver, \
1220 pci_unregister_driver)
1223 * builtin_pci_driver() - Helper macro for registering a PCI driver
1224 * @__pci_driver: pci_driver struct
1226 * Helper macro for PCI drivers which do not do anything special in their
1227 * init code. This eliminates a lot of boilerplate. Each driver may only
1228 * use this macro once, and calling it replaces device_initcall(...)
1230 #define builtin_pci_driver(__pci_driver) \
1231 builtin_driver(__pci_driver, pci_register_driver)
1233 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
1234 int pci_add_dynid(struct pci_driver *drv,
1235 unsigned int vendor, unsigned int device,
1236 unsigned int subvendor, unsigned int subdevice,
1237 unsigned int class, unsigned int class_mask,
1238 unsigned long driver_data);
1239 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1240 struct pci_dev *dev);
1241 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1244 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1246 int pci_cfg_space_size(struct pci_dev *dev);
1247 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1248 void pci_setup_bridge(struct pci_bus *bus);
1249 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
1250 unsigned long type);
1251 resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
1253 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
1254 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
1256 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1257 unsigned int command_bits, u32 flags);
1258 /* kmem_cache style wrapper around pci_alloc_consistent() */
1260 #include <linux/pci-dma.h>
1261 #include <linux/dmapool.h>
1263 #define pci_pool dma_pool
1264 #define pci_pool_create(name, pdev, size, align, allocation) \
1265 dma_pool_create(name, &pdev->dev, size, align, allocation)
1266 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
1267 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
1268 #define pci_pool_zalloc(pool, flags, handle) \
1269 dma_pool_zalloc(pool, flags, handle)
1270 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1273 u32 vector; /* kernel uses to write allocated vector */
1274 u16 entry; /* driver uses to specify entry, OS writes */
1277 #ifdef CONFIG_PCI_MSI
1278 int pci_msi_vec_count(struct pci_dev *dev);
1279 void pci_msi_shutdown(struct pci_dev *dev);
1280 void pci_disable_msi(struct pci_dev *dev);
1281 int pci_msix_vec_count(struct pci_dev *dev);
1282 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
1283 void pci_msix_shutdown(struct pci_dev *dev);
1284 void pci_disable_msix(struct pci_dev *dev);
1285 void pci_restore_msi_state(struct pci_dev *dev);
1286 int pci_msi_enabled(void);
1287 int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec);
1288 static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
1290 int rc = pci_enable_msi_range(dev, nvec, nvec);
1295 int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
1296 int minvec, int maxvec);
1297 static inline int pci_enable_msix_exact(struct pci_dev *dev,
1298 struct msix_entry *entries, int nvec)
1300 int rc = pci_enable_msix_range(dev, entries, nvec, nvec);
1306 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1307 static inline void pci_msi_shutdown(struct pci_dev *dev) { }
1308 static inline void pci_disable_msi(struct pci_dev *dev) { }
1309 static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
1310 static inline int pci_enable_msix(struct pci_dev *dev,
1311 struct msix_entry *entries, int nvec)
1313 static inline void pci_msix_shutdown(struct pci_dev *dev) { }
1314 static inline void pci_disable_msix(struct pci_dev *dev) { }
1315 static inline void pci_restore_msi_state(struct pci_dev *dev) { }
1316 static inline int pci_msi_enabled(void) { return 0; }
1317 static inline int pci_enable_msi_range(struct pci_dev *dev, int minvec,
1320 static inline int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
1322 static inline int pci_enable_msix_range(struct pci_dev *dev,
1323 struct msix_entry *entries, int minvec, int maxvec)
1325 static inline int pci_enable_msix_exact(struct pci_dev *dev,
1326 struct msix_entry *entries, int nvec)
1330 #ifdef CONFIG_PCIEPORTBUS
1331 extern bool pcie_ports_disabled;
1332 extern bool pcie_ports_auto;
1334 #define pcie_ports_disabled true
1335 #define pcie_ports_auto false
1338 #ifdef CONFIG_PCIEASPM
1339 bool pcie_aspm_support_enabled(void);
1341 static inline bool pcie_aspm_support_enabled(void) { return false; }
1344 #ifdef CONFIG_PCIEAER
1345 void pci_no_aer(void);
1346 bool pci_aer_available(void);
1348 static inline void pci_no_aer(void) { }
1349 static inline bool pci_aer_available(void) { return false; }
1352 #ifdef CONFIG_PCIE_ECRC
1353 void pcie_set_ecrc_checking(struct pci_dev *dev);
1354 void pcie_ecrc_get_policy(char *str);
1356 static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
1357 static inline void pcie_ecrc_get_policy(char *str) { }
1360 #define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1)
1362 #ifdef CONFIG_HT_IRQ
1363 /* The functions a driver should call */
1364 int ht_create_irq(struct pci_dev *dev, int idx);
1365 void ht_destroy_irq(unsigned int irq);
1366 #endif /* CONFIG_HT_IRQ */
1368 #ifdef CONFIG_PCI_ATS
1369 /* Address Translation Service */
1370 void pci_ats_init(struct pci_dev *dev);
1371 int pci_enable_ats(struct pci_dev *dev, int ps);
1372 void pci_disable_ats(struct pci_dev *dev);
1373 int pci_ats_queue_depth(struct pci_dev *dev);
1375 static inline void pci_ats_init(struct pci_dev *d) { }
1376 static inline int pci_enable_ats(struct pci_dev *d, int ps) { return -ENODEV; }
1377 static inline void pci_disable_ats(struct pci_dev *d) { }
1378 static inline int pci_ats_queue_depth(struct pci_dev *d) { return -ENODEV; }
1381 void pci_cfg_access_lock(struct pci_dev *dev);
1382 bool pci_cfg_access_trylock(struct pci_dev *dev);
1383 void pci_cfg_access_unlock(struct pci_dev *dev);
1386 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1387 * a PCI domain is defined to be a set of PCI buses which share
1388 * configuration space.
1390 #ifdef CONFIG_PCI_DOMAINS
1391 extern int pci_domains_supported;
1392 int pci_get_new_domain_nr(void);
1394 enum { pci_domains_supported = 0 };
1395 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
1396 static inline int pci_proc_domain(struct pci_bus *bus) { return 0; }
1397 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
1398 #endif /* CONFIG_PCI_DOMAINS */
1401 * Generic implementation for PCI domain support. If your
1402 * architecture does not need custom management of PCI
1403 * domains then this implementation will be used
1405 #ifdef CONFIG_PCI_DOMAINS_GENERIC
1406 static inline int pci_domain_nr(struct pci_bus *bus)
1408 return bus->domain_nr;
1410 void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent);
1412 static inline void pci_bus_assign_domain_nr(struct pci_bus *bus,
1413 struct device *parent)
1418 /* some architectures require additional setup to direct VGA traffic */
1419 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1420 unsigned int command_bits, u32 flags);
1421 void pci_register_set_vga_state(arch_set_vga_state_t func);
1423 #else /* CONFIG_PCI is not enabled */
1425 static inline void pci_set_flags(int flags) { }
1426 static inline void pci_add_flags(int flags) { }
1427 static inline void pci_clear_flags(int flags) { }
1428 static inline int pci_has_flag(int flag) { return 0; }
1431 * If the system does not have PCI, clearly these return errors. Define
1432 * these as simple inline functions to avoid hair in drivers.
1435 #define _PCI_NOP(o, s, t) \
1436 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1438 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1440 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1441 _PCI_NOP(o, word, u16 x) \
1442 _PCI_NOP(o, dword, u32 x)
1443 _PCI_NOP_ALL(read, *)
1444 _PCI_NOP_ALL(write,)
1446 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1447 unsigned int device,
1448 struct pci_dev *from)
1451 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1452 unsigned int device,
1453 unsigned int ss_vendor,
1454 unsigned int ss_device,
1455 struct pci_dev *from)
1458 static inline struct pci_dev *pci_get_class(unsigned int class,
1459 struct pci_dev *from)
1462 #define pci_dev_present(ids) (0)
1463 #define no_pci_devices() (1)
1464 #define pci_dev_put(dev) do { } while (0)
1466 static inline void pci_set_master(struct pci_dev *dev) { }
1467 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
1468 static inline void pci_disable_device(struct pci_dev *dev) { }
1469 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1471 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1473 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1476 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1479 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1481 static inline int __pci_register_driver(struct pci_driver *drv,
1482 struct module *owner)
1484 static inline int pci_register_driver(struct pci_driver *drv)
1486 static inline void pci_unregister_driver(struct pci_driver *drv) { }
1487 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1489 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1492 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1495 /* Power management related routines */
1496 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
1497 static inline void pci_restore_state(struct pci_dev *dev) { }
1498 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1500 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1502 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1505 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1509 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1511 static inline void pci_release_regions(struct pci_dev *dev) { }
1513 static inline void pci_block_cfg_access(struct pci_dev *dev) { }
1514 static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1516 static inline void pci_unblock_cfg_access(struct pci_dev *dev) { }
1518 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1520 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1523 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1527 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
1528 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; }
1529 static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
1531 #define dev_is_pci(d) (false)
1532 #define dev_is_pf(d) (false)
1533 #define dev_num_vf(d) (0)
1534 #endif /* CONFIG_PCI */
1536 /* Include architecture-dependent settings and functions */
1538 #include <asm/pci.h>
1540 /* these helpers provide future and backwards compatibility
1541 * for accessing popular PCI BAR info */
1542 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1543 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1544 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1545 #define pci_resource_len(dev,bar) \
1546 ((pci_resource_start((dev), (bar)) == 0 && \
1547 pci_resource_end((dev), (bar)) == \
1548 pci_resource_start((dev), (bar))) ? 0 : \
1550 (pci_resource_end((dev), (bar)) - \
1551 pci_resource_start((dev), (bar)) + 1))
1553 /* Similar to the helpers above, these manipulate per-pci_dev
1554 * driver-specific data. They are really just a wrapper around
1555 * the generic device structure functions of these calls.
1557 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1559 return dev_get_drvdata(&pdev->dev);
1562 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1564 dev_set_drvdata(&pdev->dev, data);
1567 /* If you want to know what to call your pci_dev, ask this function.
1568 * Again, it's a wrapper around the generic device.
1570 static inline const char *pci_name(const struct pci_dev *pdev)
1572 return dev_name(&pdev->dev);
1576 /* Some archs don't want to expose struct resource to userland as-is
1577 * in sysfs and /proc
1579 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1580 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1581 const struct resource *rsrc, resource_size_t *start,
1582 resource_size_t *end)
1584 *start = rsrc->start;
1587 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1591 * The world is not perfect and supplies us with broken PCI devices.
1592 * For at least a part of these bugs we need a work-around, so both
1593 * generic (drivers/pci/quirks.c) and per-architecture code can define
1594 * fixup hooks to be called for particular buggy devices.
1598 u16 vendor; /* You can use PCI_ANY_ID here of course */
1599 u16 device; /* You can use PCI_ANY_ID here of course */
1600 u32 class; /* You can use PCI_ANY_ID here too */
1601 unsigned int class_shift; /* should be 0, 8, 16 */
1602 void (*hook)(struct pci_dev *dev);
1605 enum pci_fixup_pass {
1606 pci_fixup_early, /* Before probing BARs */
1607 pci_fixup_header, /* After reading configuration header */
1608 pci_fixup_final, /* Final phase of device fixups */
1609 pci_fixup_enable, /* pci_enable_device() time */
1610 pci_fixup_resume, /* pci_device_resume() */
1611 pci_fixup_suspend, /* pci_device_suspend() */
1612 pci_fixup_resume_early, /* pci_device_resume_early() */
1613 pci_fixup_suspend_late, /* pci_device_suspend_late() */
1616 /* Anonymous variables would be nice... */
1617 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
1618 class_shift, hook) \
1619 static const struct pci_fixup __PASTE(__pci_fixup_##name,__LINE__) __used \
1620 __attribute__((__section__(#section), aligned((sizeof(void *))))) \
1621 = { vendor, device, class, class_shift, hook };
1623 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \
1624 class_shift, hook) \
1625 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1626 hook, vendor, device, class, class_shift, hook)
1627 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \
1628 class_shift, hook) \
1629 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1630 hook, vendor, device, class, class_shift, hook)
1631 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \
1632 class_shift, hook) \
1633 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1634 hook, vendor, device, class, class_shift, hook)
1635 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \
1636 class_shift, hook) \
1637 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1638 hook, vendor, device, class, class_shift, hook)
1639 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1640 class_shift, hook) \
1641 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1642 resume##hook, vendor, device, class, \
1644 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1645 class_shift, hook) \
1646 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1647 resume_early##hook, vendor, device, \
1648 class, class_shift, hook)
1649 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1650 class_shift, hook) \
1651 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1652 suspend##hook, vendor, device, class, \
1654 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND_LATE(vendor, device, class, \
1655 class_shift, hook) \
1656 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1657 suspend_late##hook, vendor, device, \
1658 class, class_shift, hook)
1660 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1661 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1662 hook, vendor, device, PCI_ANY_ID, 0, hook)
1663 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1664 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1665 hook, vendor, device, PCI_ANY_ID, 0, hook)
1666 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1667 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1668 hook, vendor, device, PCI_ANY_ID, 0, hook)
1669 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1670 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1671 hook, vendor, device, PCI_ANY_ID, 0, hook)
1672 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1673 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1674 resume##hook, vendor, device, \
1675 PCI_ANY_ID, 0, hook)
1676 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1677 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1678 resume_early##hook, vendor, device, \
1679 PCI_ANY_ID, 0, hook)
1680 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1681 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1682 suspend##hook, vendor, device, \
1683 PCI_ANY_ID, 0, hook)
1684 #define DECLARE_PCI_FIXUP_SUSPEND_LATE(vendor, device, hook) \
1685 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend_late, \
1686 suspend_late##hook, vendor, device, \
1687 PCI_ANY_ID, 0, hook)
1689 #ifdef CONFIG_PCI_QUIRKS
1690 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1691 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1692 void pci_dev_specific_enable_acs(struct pci_dev *dev);
1694 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1695 struct pci_dev *dev) { }
1696 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1701 static inline void pci_dev_specific_enable_acs(struct pci_dev *dev) { }
1704 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1705 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1706 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1707 int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1708 int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1710 void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1712 extern int pci_pci_problems;
1713 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1714 #define PCIPCI_TRITON 2
1715 #define PCIPCI_NATOMA 4
1716 #define PCIPCI_VIAETBF 8
1717 #define PCIPCI_VSFX 16
1718 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1719 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1721 extern unsigned long pci_cardbus_io_size;
1722 extern unsigned long pci_cardbus_mem_size;
1723 extern u8 pci_dfl_cache_line_size;
1724 extern u8 pci_cache_line_size;
1726 extern unsigned long pci_hotplug_io_size;
1727 extern unsigned long pci_hotplug_mem_size;
1729 /* Architecture-specific versions may override these (weak) */
1730 void pcibios_disable_device(struct pci_dev *dev);
1731 void pcibios_set_master(struct pci_dev *dev);
1732 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1733 enum pcie_reset_state state);
1734 int pcibios_add_device(struct pci_dev *dev);
1735 void pcibios_release_device(struct pci_dev *dev);
1736 void pcibios_penalize_isa_irq(int irq, int active);
1737 int pcibios_alloc_irq(struct pci_dev *dev);
1738 void pcibios_free_irq(struct pci_dev *dev);
1740 #ifdef CONFIG_HIBERNATE_CALLBACKS
1741 extern struct dev_pm_ops pcibios_pm_ops;
1744 #ifdef CONFIG_PCI_MMCONFIG
1745 void __init pci_mmcfg_early_init(void);
1746 void __init pci_mmcfg_late_init(void);
1748 static inline void pci_mmcfg_early_init(void) { }
1749 static inline void pci_mmcfg_late_init(void) { }
1752 int pci_ext_cfg_avail(void);
1754 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1755 void __iomem *pci_ioremap_wc_bar(struct pci_dev *pdev, int bar);
1757 #ifdef CONFIG_PCI_IOV
1758 int pci_iov_virtfn_bus(struct pci_dev *dev, int id);
1759 int pci_iov_virtfn_devfn(struct pci_dev *dev, int id);
1761 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1762 void pci_disable_sriov(struct pci_dev *dev);
1763 int pci_num_vf(struct pci_dev *dev);
1764 int pci_vfs_assigned(struct pci_dev *dev);
1765 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
1766 int pci_sriov_get_totalvfs(struct pci_dev *dev);
1767 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno);
1769 static inline int pci_iov_virtfn_bus(struct pci_dev *dev, int id)
1773 static inline int pci_iov_virtfn_devfn(struct pci_dev *dev, int id)
1777 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1779 static inline void pci_disable_sriov(struct pci_dev *dev) { }
1780 static inline int pci_num_vf(struct pci_dev *dev) { return 0; }
1781 static inline int pci_vfs_assigned(struct pci_dev *dev)
1783 static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
1785 static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
1787 static inline resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
1791 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1792 void pci_hp_create_module_link(struct pci_slot *pci_slot);
1793 void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1797 * pci_pcie_cap - get the saved PCIe capability offset
1800 * PCIe capability offset is calculated at PCI device initialization
1801 * time and saved in the data structure. This function returns saved
1802 * PCIe capability offset. Using this instead of pci_find_capability()
1803 * reduces unnecessary search in the PCI configuration space. If you
1804 * need to calculate PCIe capability offset from raw device for some
1805 * reasons, please use pci_find_capability() instead.
1807 static inline int pci_pcie_cap(struct pci_dev *dev)
1809 return dev->pcie_cap;
1813 * pci_is_pcie - check if the PCI device is PCI Express capable
1816 * Returns: true if the PCI device is PCI Express capable, false otherwise.
1818 static inline bool pci_is_pcie(struct pci_dev *dev)
1820 return pci_pcie_cap(dev);
1824 * pcie_caps_reg - get the PCIe Capabilities Register
1827 static inline u16 pcie_caps_reg(const struct pci_dev *dev)
1829 return dev->pcie_flags_reg;
1833 * pci_pcie_type - get the PCIe device/port type
1836 static inline int pci_pcie_type(const struct pci_dev *dev)
1838 return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1841 void pci_request_acs(void);
1842 bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1843 bool pci_acs_path_enabled(struct pci_dev *start,
1844 struct pci_dev *end, u16 acs_flags);
1846 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1847 #define PCI_VPD_LRDT_ID(x) ((x) | PCI_VPD_LRDT)
1849 /* Large Resource Data Type Tag Item Names */
1850 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1851 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1852 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1854 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1855 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1856 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1858 /* Small Resource Data Type Tag Item Names */
1859 #define PCI_VPD_STIN_END 0x78 /* End */
1861 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1863 #define PCI_VPD_SRDT_TIN_MASK 0x78
1864 #define PCI_VPD_SRDT_LEN_MASK 0x07
1866 #define PCI_VPD_LRDT_TAG_SIZE 3
1867 #define PCI_VPD_SRDT_TAG_SIZE 1
1869 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1871 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1872 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1873 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1874 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1877 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1878 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1880 * Returns the extracted Large Resource Data Type length.
1882 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1884 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1888 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1889 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1891 * Returns the extracted Small Resource Data Type length.
1893 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1895 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1899 * pci_vpd_info_field_size - Extracts the information field length
1900 * @lrdt: Pointer to the beginning of an information field header
1902 * Returns the extracted information field length.
1904 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1906 return info_field[2];
1910 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1911 * @buf: Pointer to buffered vpd data
1912 * @off: The offset into the buffer at which to begin the search
1913 * @len: The length of the vpd buffer
1914 * @rdt: The Resource Data Type to search for
1916 * Returns the index where the Resource Data Type was found or
1917 * -ENOENT otherwise.
1919 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1922 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1923 * @buf: Pointer to buffered vpd data
1924 * @off: The offset into the buffer at which to begin the search
1925 * @len: The length of the buffer area, relative to off, in which to search
1926 * @kw: The keyword to search for
1928 * Returns the index where the information field keyword was found or
1929 * -ENOENT otherwise.
1931 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1932 unsigned int len, const char *kw);
1934 /* PCI <-> OF binding helpers */
1938 void pci_set_of_node(struct pci_dev *dev);
1939 void pci_release_of_node(struct pci_dev *dev);
1940 void pci_set_bus_of_node(struct pci_bus *bus);
1941 void pci_release_bus_of_node(struct pci_bus *bus);
1942 struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus);
1944 /* Arch may override this (weak) */
1945 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
1947 static inline struct device_node *
1948 pci_device_to_OF_node(const struct pci_dev *pdev)
1950 return pdev ? pdev->dev.of_node : NULL;
1953 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1955 return bus ? bus->dev.of_node : NULL;
1958 #else /* CONFIG_OF */
1959 static inline void pci_set_of_node(struct pci_dev *dev) { }
1960 static inline void pci_release_of_node(struct pci_dev *dev) { }
1961 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1962 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1963 static inline struct device_node *
1964 pci_device_to_OF_node(const struct pci_dev *pdev) { return NULL; }
1965 static inline struct irq_domain *
1966 pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; }
1967 #endif /* CONFIG_OF */
1970 struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus);
1973 pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *));
1975 static inline struct irq_domain *
1976 pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) { return NULL; }
1980 static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
1982 return pdev->dev.archdata.edev;
1986 int pci_for_each_dma_alias(struct pci_dev *pdev,
1987 int (*fn)(struct pci_dev *pdev,
1988 u16 alias, void *data), void *data);
1990 /* helper functions for operation of device flag */
1991 static inline void pci_set_dev_assigned(struct pci_dev *pdev)
1993 pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED;
1995 static inline void pci_clear_dev_assigned(struct pci_dev *pdev)
1997 pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED;
1999 static inline bool pci_is_dev_assigned(struct pci_dev *pdev)
2001 return (pdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) == PCI_DEV_FLAGS_ASSIGNED;
2005 * pci_ari_enabled - query ARI forwarding status
2008 * Returns true if ARI forwarding is enabled.
2010 static inline bool pci_ari_enabled(struct pci_bus *bus)
2012 return bus->self && bus->self->ari_enabled;
2014 #endif /* LINUX_PCI_H */