4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/mod_devicetable.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/list.h>
26 #include <linux/compiler.h>
27 #include <linux/errno.h>
28 #include <linux/kobject.h>
29 #include <linux/atomic.h>
30 #include <linux/device.h>
32 #include <linux/irqreturn.h>
33 #include <uapi/linux/pci.h>
35 /* Include the ID list */
36 #include <linux/pci_ids.h>
39 * The PCI interface treats multi-function devices as independent
40 * devices. The slot/function address of each device is encoded
41 * in a single byte as follows:
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined uapi/linux/pci.h
46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel only defines are being added here.
49 #define PCI_DEVID(bus, devfn) ((((u16)bus) << 8) | devfn)
50 /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
51 #define PCI_BUS_NUM(x) (((x) >> 8) & 0xff)
53 /* pci_slot represents a physical slot */
55 struct pci_bus *bus; /* The bus this slot is on */
56 struct list_head list; /* node in list of slots on this bus */
57 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
62 static inline const char *pci_slot_name(const struct pci_slot *slot)
64 return kobject_name(&slot->kobj);
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
80 * For PCI devices, the region numbers are assigned this way:
83 /* #0-5: standard PCI resources */
85 PCI_STD_RESOURCE_END = 5,
87 /* #6: expansion ROM resource */
90 /* device specific resources */
93 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
96 /* resources assigned to buses behind the bridge */
97 #define PCI_BRIDGE_RESOURCE_NUM 4
100 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
101 PCI_BRIDGE_RESOURCE_NUM - 1,
103 /* total resources associated with a PCI device */
106 /* preserve this for compatibility */
107 DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
110 typedef int __bitwise pci_power_t;
112 #define PCI_D0 ((pci_power_t __force) 0)
113 #define PCI_D1 ((pci_power_t __force) 1)
114 #define PCI_D2 ((pci_power_t __force) 2)
115 #define PCI_D3hot ((pci_power_t __force) 3)
116 #define PCI_D3cold ((pci_power_t __force) 4)
117 #define PCI_UNKNOWN ((pci_power_t __force) 5)
118 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
120 /* Remember to update this when the list above changes! */
121 extern const char *pci_power_names[];
123 static inline const char *pci_power_name(pci_power_t state)
125 return pci_power_names[1 + (int) state];
128 #define PCI_PM_D2_DELAY 200
129 #define PCI_PM_D3_WAIT 10
130 #define PCI_PM_D3COLD_WAIT 100
131 #define PCI_PM_BUS_WAIT 50
133 /** The pci_channel state describes connectivity between the CPU and
134 * the pci device. If some PCI bus between here and the pci device
135 * has crashed or locked up, this info is reflected here.
137 typedef unsigned int __bitwise pci_channel_state_t;
139 enum pci_channel_state {
140 /* I/O channel is in normal state */
141 pci_channel_io_normal = (__force pci_channel_state_t) 1,
143 /* I/O to channel is blocked */
144 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
146 /* PCI card is dead */
147 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
150 typedef unsigned int __bitwise pcie_reset_state_t;
152 enum pcie_reset_state {
153 /* Reset is NOT asserted (Use to deassert reset) */
154 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
156 /* Use #PERST to reset PCI-E device */
157 pcie_warm_reset = (__force pcie_reset_state_t) 2,
159 /* Use PCI-E Hot Reset to reset device */
160 pcie_hot_reset = (__force pcie_reset_state_t) 3
163 typedef unsigned short __bitwise pci_dev_flags_t;
165 /* INTX_DISABLE in PCI_COMMAND register disables MSI
168 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
169 /* Device configuration is irrevocably lost if disabled into D3 */
170 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
171 /* Provide indication device is assigned by a Virtual Machine Manager */
172 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
175 enum pci_irq_reroute_variant {
176 INTEL_IRQ_REROUTE_VARIANT = 1,
177 MAX_IRQ_REROUTE_VARIANTS = 3
180 typedef unsigned short __bitwise pci_bus_flags_t;
182 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
183 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
186 /* These values come from the PCI Express Spec */
187 enum pcie_link_width {
188 PCIE_LNK_WIDTH_RESRV = 0x00,
196 PCIE_LNK_WIDTH_UNKNOWN = 0xFF,
199 /* Based on the PCI Hotplug Spec, but some values are made up by us */
201 PCI_SPEED_33MHz = 0x00,
202 PCI_SPEED_66MHz = 0x01,
203 PCI_SPEED_66MHz_PCIX = 0x02,
204 PCI_SPEED_100MHz_PCIX = 0x03,
205 PCI_SPEED_133MHz_PCIX = 0x04,
206 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
207 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
208 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
209 PCI_SPEED_66MHz_PCIX_266 = 0x09,
210 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
211 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
217 PCI_SPEED_66MHz_PCIX_533 = 0x11,
218 PCI_SPEED_100MHz_PCIX_533 = 0x12,
219 PCI_SPEED_133MHz_PCIX_533 = 0x13,
220 PCIE_SPEED_2_5GT = 0x14,
221 PCIE_SPEED_5_0GT = 0x15,
222 PCIE_SPEED_8_0GT = 0x16,
223 PCI_SPEED_UNKNOWN = 0xff,
226 struct pci_cap_saved_data {
232 struct pci_cap_saved_state {
233 struct hlist_node next;
234 struct pci_cap_saved_data cap;
237 struct pcie_link_state;
243 * The pci_dev structure is used to describe PCI devices.
246 struct list_head bus_list; /* node in per-bus list */
247 struct pci_bus *bus; /* bus this device is on */
248 struct pci_bus *subordinate; /* bus this device bridges to */
250 void *sysdata; /* hook for sys-specific extension */
251 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
252 struct pci_slot *slot; /* Physical slot this device is in */
254 unsigned int devfn; /* encoded device & function index */
255 unsigned short vendor;
256 unsigned short device;
257 unsigned short subsystem_vendor;
258 unsigned short subsystem_device;
259 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
260 u8 revision; /* PCI revision, low byte of class word */
261 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
262 u8 pcie_cap; /* PCI-E capability offset */
263 u8 msi_cap; /* MSI capability offset */
264 u8 msix_cap; /* MSI-X capability offset */
265 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
266 u8 rom_base_reg; /* which config register controls the ROM */
267 u8 pin; /* which interrupt pin this device uses */
268 u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */
270 struct pci_driver *driver; /* which driver has allocated this device */
271 u64 dma_mask; /* Mask of the bits of bus address this
272 device implements. Normally this is
273 0xffffffff. You only need to change
274 this if your device has broken DMA
275 or supports 64-bit transfers. */
277 struct device_dma_parameters dma_parms;
279 pci_power_t current_state; /* Current operating state. In ACPI-speak,
280 this is D0-D3, D0 being fully functional,
282 u8 pm_cap; /* PM capability offset */
283 unsigned int pme_support:5; /* Bitmask of states from which PME#
285 unsigned int pme_interrupt:1;
286 unsigned int pme_poll:1; /* Poll device's PME status bit */
287 unsigned int d1_support:1; /* Low power state D1 is supported */
288 unsigned int d2_support:1; /* Low power state D2 is supported */
289 unsigned int no_d1d2:1; /* D1 and D2 are forbidden */
290 unsigned int no_d3cold:1; /* D3cold is forbidden */
291 unsigned int d3cold_allowed:1; /* D3cold is allowed by user */
292 unsigned int mmio_always_on:1; /* disallow turning off io/mem
293 decoding during bar sizing */
294 unsigned int wakeup_prepared:1;
295 unsigned int runtime_d3cold:1; /* whether go through runtime
296 D3cold, not set for devices
297 powered on/off by the
298 corresponding bridge */
299 unsigned int d3_delay; /* D3->D0 transition time in ms */
300 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
302 #ifdef CONFIG_PCIEASPM
303 struct pcie_link_state *link_state; /* ASPM link state. */
306 pci_channel_state_t error_state; /* current connectivity state */
307 struct device dev; /* Generic device interface */
309 int cfg_size; /* Size of configuration space */
312 * Instead of touching interrupt line and base address registers
313 * directly, use the values stored here. They might be different!
316 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
318 bool match_driver; /* Skip attaching driver */
319 /* These fields are used by common fixups */
320 unsigned int transparent:1; /* Transparent PCI bridge */
321 unsigned int multifunction:1;/* Part of multi-function device */
322 /* keep track of device state */
323 unsigned int is_added:1;
324 unsigned int is_busmaster:1; /* device is busmaster */
325 unsigned int no_msi:1; /* device may not use msi */
326 unsigned int block_cfg_access:1; /* config space access is blocked */
327 unsigned int broken_parity_status:1; /* Device generates false positive parity */
328 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
329 unsigned int msi_enabled:1;
330 unsigned int msix_enabled:1;
331 unsigned int ari_enabled:1; /* ARI forwarding */
332 unsigned int is_managed:1;
333 unsigned int needs_freset:1; /* Dev requires fundamental reset */
334 unsigned int state_saved:1;
335 unsigned int is_physfn:1;
336 unsigned int is_virtfn:1;
337 unsigned int reset_fn:1;
338 unsigned int is_hotplug_bridge:1;
339 unsigned int __aer_firmware_first_valid:1;
340 unsigned int __aer_firmware_first:1;
341 unsigned int broken_intx_masking:1;
342 unsigned int io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
343 pci_dev_flags_t dev_flags;
344 atomic_t enable_cnt; /* pci_enable_device has been called */
346 u32 saved_config_space[16]; /* config space saved at suspend time */
347 struct hlist_head saved_cap_space;
348 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
349 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
350 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
351 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
352 #ifdef CONFIG_PCI_MSI
353 struct list_head msi_list;
354 struct kset *msi_kset;
357 #ifdef CONFIG_PCI_ATS
359 struct pci_sriov *sriov; /* SR-IOV capability related */
360 struct pci_dev *physfn; /* the PF this VF is associated with */
362 struct pci_ats *ats; /* Address Translation Service */
364 phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
365 size_t romlen; /* Length of ROM if it's not from the BAR */
368 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
370 #ifdef CONFIG_PCI_IOV
378 struct pci_dev *pci_alloc_dev(struct pci_bus *bus);
379 struct pci_dev * __deprecated alloc_pci_dev(void);
381 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
382 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
384 static inline int pci_channel_offline(struct pci_dev *pdev)
386 return (pdev->error_state != pci_channel_io_normal);
389 extern struct resource busn_resource;
391 struct pci_host_bridge_window {
392 struct list_head list;
393 struct resource *res; /* host bridge aperture (CPU address) */
394 resource_size_t offset; /* bus address + offset = CPU address */
397 struct pci_host_bridge {
399 struct pci_bus *bus; /* root bus */
400 struct list_head windows; /* pci_host_bridge_windows */
401 void (*release_fn)(struct pci_host_bridge *);
405 #define to_pci_host_bridge(n) container_of(n, struct pci_host_bridge, dev)
406 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
407 void (*release_fn)(struct pci_host_bridge *),
410 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
413 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
414 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
415 * buses below host bridges or subtractive decode bridges) go in the list.
416 * Use pci_bus_for_each_resource() to iterate through all the resources.
420 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
421 * and there's no way to program the bridge with the details of the window.
422 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
423 * decode bit set, because they are explicit and can be programmed with _SRS.
425 #define PCI_SUBTRACTIVE_DECODE 0x1
427 struct pci_bus_resource {
428 struct list_head list;
429 struct resource *res;
433 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
436 struct list_head node; /* node in list of buses */
437 struct pci_bus *parent; /* parent bus this bridge is on */
438 struct list_head children; /* list of child buses */
439 struct list_head devices; /* list of devices on this bus */
440 struct pci_dev *self; /* bridge device as seen by parent */
441 struct list_head slots; /* list of slots on this bus */
442 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
443 struct list_head resources; /* address space routed to this bus */
444 struct resource busn_res; /* bus numbers routed to this bus */
446 struct pci_ops *ops; /* configuration access functions */
447 struct msi_chip *msi; /* MSI controller */
448 void *sysdata; /* hook for sys-specific extension */
449 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
451 unsigned char number; /* bus number */
452 unsigned char primary; /* number of primary bridge */
453 unsigned char max_bus_speed; /* enum pci_bus_speed */
454 unsigned char cur_bus_speed; /* enum pci_bus_speed */
458 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
459 pci_bus_flags_t bus_flags; /* Inherited by child busses */
460 struct device *bridge;
462 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
463 struct bin_attribute *legacy_mem; /* legacy mem */
464 unsigned int is_added:1;
467 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
468 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
471 * Returns true if the pci bus is root (behind host-pci bridge),
474 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
475 * This is incorrect because "virtual" buses added for SR-IOV (via
476 * virtfn_add_bus()) have "bus->self == NULL" but are not root buses.
478 static inline bool pci_is_root_bus(struct pci_bus *pbus)
480 return !(pbus->parent);
483 #ifdef CONFIG_PCI_MSI
484 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
486 return pci_dev->msi_enabled || pci_dev->msix_enabled;
489 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
493 * Error values that may be returned by PCI functions.
495 #define PCIBIOS_SUCCESSFUL 0x00
496 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
497 #define PCIBIOS_BAD_VENDOR_ID 0x83
498 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
499 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
500 #define PCIBIOS_SET_FAILED 0x88
501 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
504 * Translate above to generic errno for passing back through non-pci.
506 static inline int pcibios_err_to_errno(int err)
508 if (err <= PCIBIOS_SUCCESSFUL)
509 return err; /* Assume already errno */
512 case PCIBIOS_FUNC_NOT_SUPPORTED:
514 case PCIBIOS_BAD_VENDOR_ID:
516 case PCIBIOS_DEVICE_NOT_FOUND:
518 case PCIBIOS_BAD_REGISTER_NUMBER:
520 case PCIBIOS_SET_FAILED:
522 case PCIBIOS_BUFFER_TOO_SMALL:
529 /* Low-level architecture-dependent routines */
532 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
533 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
537 * ACPI needs to be able to access PCI config space before we've done a
538 * PCI bus scan and created pci_bus structures.
540 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
541 int reg, int len, u32 *val);
542 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
543 int reg, int len, u32 val);
545 struct pci_bus_region {
546 resource_size_t start;
551 spinlock_t lock; /* protects list, index */
552 struct list_head list; /* for IDs added at runtime */
555 /* ---------------------------------------------------------------- */
556 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
557 * a set of callbacks in struct pci_error_handlers, then that device driver
558 * will be notified of PCI bus errors, and will be driven to recovery
559 * when an error occurs.
562 typedef unsigned int __bitwise pci_ers_result_t;
564 enum pci_ers_result {
565 /* no result/none/not supported in device driver */
566 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
568 /* Device driver can recover without slot reset */
569 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
571 /* Device driver wants slot to be reset. */
572 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
574 /* Device has completely failed, is unrecoverable */
575 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
577 /* Device driver is fully recovered and operational */
578 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
580 /* No AER capabilities registered for the driver */
581 PCI_ERS_RESULT_NO_AER_DRIVER = (__force pci_ers_result_t) 6,
584 /* PCI bus error event callbacks */
585 struct pci_error_handlers {
586 /* PCI bus error detected on this device */
587 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
588 enum pci_channel_state error);
590 /* MMIO has been re-enabled, but not DMA */
591 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
593 /* PCI Express link has been reset */
594 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
596 /* PCI slot has been reset */
597 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
599 /* Device driver may resume normal operations */
600 void (*resume)(struct pci_dev *dev);
603 /* ---------------------------------------------------------------- */
607 struct list_head node;
609 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
610 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
611 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
612 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
613 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
614 int (*resume_early) (struct pci_dev *dev);
615 int (*resume) (struct pci_dev *dev); /* Device woken up */
616 void (*shutdown) (struct pci_dev *dev);
617 int (*sriov_configure) (struct pci_dev *dev, int num_vfs); /* PF pdev */
618 const struct pci_error_handlers *err_handler;
619 struct device_driver driver;
620 struct pci_dynids dynids;
623 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
626 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
627 * @_table: device table name
629 * This macro is used to create a struct pci_device_id array (a device table)
630 * in a generic manner.
632 #define DEFINE_PCI_DEVICE_TABLE(_table) \
633 const struct pci_device_id _table[]
636 * PCI_DEVICE - macro used to describe a specific pci device
637 * @vend: the 16 bit PCI Vendor ID
638 * @dev: the 16 bit PCI Device ID
640 * This macro is used to create a struct pci_device_id that matches a
641 * specific device. The subvendor and subdevice fields will be set to
644 #define PCI_DEVICE(vend,dev) \
645 .vendor = (vend), .device = (dev), \
646 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
649 * PCI_DEVICE_SUB - macro used to describe a specific pci device with subsystem
650 * @vend: the 16 bit PCI Vendor ID
651 * @dev: the 16 bit PCI Device ID
652 * @subvend: the 16 bit PCI Subvendor ID
653 * @subdev: the 16 bit PCI Subdevice ID
655 * This macro is used to create a struct pci_device_id that matches a
656 * specific device with subsystem information.
658 #define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \
659 .vendor = (vend), .device = (dev), \
660 .subvendor = (subvend), .subdevice = (subdev)
663 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
664 * @dev_class: the class, subclass, prog-if triple for this device
665 * @dev_class_mask: the class mask for this device
667 * This macro is used to create a struct pci_device_id that matches a
668 * specific PCI class. The vendor, device, subvendor, and subdevice
669 * fields will be set to PCI_ANY_ID.
671 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
672 .class = (dev_class), .class_mask = (dev_class_mask), \
673 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
674 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
677 * PCI_VDEVICE - macro used to describe a specific pci device in short form
678 * @vendor: the vendor name
679 * @device: the 16 bit PCI Device ID
681 * This macro is used to create a struct pci_device_id that matches a
682 * specific PCI device. The subvendor, and subdevice fields will be set
683 * to PCI_ANY_ID. The macro allows the next field to follow as the device
687 #define PCI_VDEVICE(vendor, device) \
688 PCI_VENDOR_ID_##vendor, (device), \
689 PCI_ANY_ID, PCI_ANY_ID, 0, 0
691 /* these external functions are only available when PCI support is enabled */
694 void pcie_bus_configure_settings(struct pci_bus *bus);
696 enum pcie_bus_config_types {
699 PCIE_BUS_PERFORMANCE,
703 extern enum pcie_bus_config_types pcie_bus_config;
705 extern struct bus_type pci_bus_type;
707 /* Do NOT directly access these two variables, unless you are arch specific pci
708 * code, or pci core code. */
709 extern struct list_head pci_root_buses; /* list of all known PCI buses */
710 /* Some device drivers need know if pci is initiated */
711 int no_pci_devices(void);
713 void pcibios_resource_survey_bus(struct pci_bus *bus);
714 void pcibios_add_bus(struct pci_bus *bus);
715 void pcibios_remove_bus(struct pci_bus *bus);
716 void pcibios_fixup_bus(struct pci_bus *);
717 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
718 /* Architecture specific versions may override this (weak) */
719 char *pcibios_setup(char *str);
721 /* Used only when drivers/pci/setup.c is used */
722 resource_size_t pcibios_align_resource(void *, const struct resource *,
725 void pcibios_update_irq(struct pci_dev *, int irq);
727 /* Weak but can be overriden by arch */
728 void pci_fixup_cardbus(struct pci_bus *);
730 /* Generic PCI functions used internally */
732 void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
733 struct resource *res);
734 void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
735 struct pci_bus_region *region);
736 void pcibios_scan_specific_bus(int busn);
737 struct pci_bus *pci_find_bus(int domain, int busnr);
738 void pci_bus_add_devices(const struct pci_bus *bus);
739 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
740 struct pci_ops *ops, void *sysdata);
741 struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
742 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
743 struct pci_ops *ops, void *sysdata,
744 struct list_head *resources);
745 int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
746 int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
747 void pci_bus_release_busn_res(struct pci_bus *b);
748 struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
749 struct pci_ops *ops, void *sysdata,
750 struct list_head *resources);
751 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
753 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
754 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
756 struct hotplug_slot *hotplug);
757 void pci_destroy_slot(struct pci_slot *slot);
758 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
759 int pci_scan_slot(struct pci_bus *bus, int devfn);
760 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
761 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
762 unsigned int pci_scan_child_bus(struct pci_bus *bus);
763 int __must_check pci_bus_add_device(struct pci_dev *dev);
764 void pci_read_bridge_bases(struct pci_bus *child);
765 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
766 struct resource *res);
767 u8 pci_swizzle_interrupt_pin(const struct pci_dev *dev, u8 pin);
768 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
769 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
770 struct pci_dev *pci_dev_get(struct pci_dev *dev);
771 void pci_dev_put(struct pci_dev *dev);
772 void pci_remove_bus(struct pci_bus *b);
773 void pci_stop_and_remove_bus_device(struct pci_dev *dev);
774 void pci_stop_root_bus(struct pci_bus *bus);
775 void pci_remove_root_bus(struct pci_bus *bus);
776 void pci_setup_cardbus(struct pci_bus *bus);
777 void pci_sort_breadthfirst(void);
778 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
779 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
780 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
782 /* Generic PCI functions exported to card drivers */
784 enum pci_lost_interrupt_reason {
785 PCI_LOST_IRQ_NO_INFORMATION = 0,
786 PCI_LOST_IRQ_DISABLE_MSI,
787 PCI_LOST_IRQ_DISABLE_MSIX,
788 PCI_LOST_IRQ_DISABLE_ACPI,
790 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
791 int pci_find_capability(struct pci_dev *dev, int cap);
792 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
793 int pci_find_ext_capability(struct pci_dev *dev, int cap);
794 int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap);
795 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
796 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
797 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
799 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
800 struct pci_dev *from);
801 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
802 unsigned int ss_vendor, unsigned int ss_device,
803 struct pci_dev *from);
804 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
805 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
807 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
810 return pci_get_domain_bus_and_slot(0, bus, devfn);
812 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
813 int pci_dev_present(const struct pci_device_id *ids);
815 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
817 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
818 int where, u16 *val);
819 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
820 int where, u32 *val);
821 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
823 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
825 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
827 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
829 static inline int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
831 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
833 static inline int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
835 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
837 static inline int pci_read_config_dword(const struct pci_dev *dev, int where,
840 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
842 static inline int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val)
844 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
846 static inline int pci_write_config_word(const struct pci_dev *dev, int where, u16 val)
848 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
850 static inline int pci_write_config_dword(const struct pci_dev *dev, int where,
853 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
856 int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
857 int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
858 int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
859 int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val);
860 int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
862 int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
865 static inline int pcie_capability_set_word(struct pci_dev *dev, int pos,
868 return pcie_capability_clear_and_set_word(dev, pos, 0, set);
871 static inline int pcie_capability_set_dword(struct pci_dev *dev, int pos,
874 return pcie_capability_clear_and_set_dword(dev, pos, 0, set);
877 static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos,
880 return pcie_capability_clear_and_set_word(dev, pos, clear, 0);
883 static inline int pcie_capability_clear_dword(struct pci_dev *dev, int pos,
886 return pcie_capability_clear_and_set_dword(dev, pos, clear, 0);
889 /* user-space driven config access */
890 int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
891 int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
892 int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
893 int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
894 int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
895 int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
897 int __must_check pci_enable_device(struct pci_dev *dev);
898 int __must_check pci_enable_device_io(struct pci_dev *dev);
899 int __must_check pci_enable_device_mem(struct pci_dev *dev);
900 int __must_check pci_reenable_device(struct pci_dev *);
901 int __must_check pcim_enable_device(struct pci_dev *pdev);
902 void pcim_pin_device(struct pci_dev *pdev);
904 static inline int pci_is_enabled(struct pci_dev *pdev)
906 return (atomic_read(&pdev->enable_cnt) > 0);
909 static inline int pci_is_managed(struct pci_dev *pdev)
911 return pdev->is_managed;
914 void pci_disable_device(struct pci_dev *dev);
916 extern unsigned int pcibios_max_latency;
917 void pci_set_master(struct pci_dev *dev);
918 void pci_clear_master(struct pci_dev *dev);
920 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
921 int pci_set_cacheline_size(struct pci_dev *dev);
922 #define HAVE_PCI_SET_MWI
923 int __must_check pci_set_mwi(struct pci_dev *dev);
924 int pci_try_set_mwi(struct pci_dev *dev);
925 void pci_clear_mwi(struct pci_dev *dev);
926 void pci_intx(struct pci_dev *dev, int enable);
927 bool pci_intx_mask_supported(struct pci_dev *dev);
928 bool pci_check_and_mask_intx(struct pci_dev *dev);
929 bool pci_check_and_unmask_intx(struct pci_dev *dev);
930 void pci_msi_off(struct pci_dev *dev);
931 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
932 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
933 int pci_wait_for_pending_transaction(struct pci_dev *dev);
934 int pcix_get_max_mmrbc(struct pci_dev *dev);
935 int pcix_get_mmrbc(struct pci_dev *dev);
936 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
937 int pcie_get_readrq(struct pci_dev *dev);
938 int pcie_set_readrq(struct pci_dev *dev, int rq);
939 int pcie_get_mps(struct pci_dev *dev);
940 int pcie_set_mps(struct pci_dev *dev, int mps);
941 int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
942 enum pcie_link_width *width);
943 int __pci_reset_function(struct pci_dev *dev);
944 int __pci_reset_function_locked(struct pci_dev *dev);
945 int pci_reset_function(struct pci_dev *dev);
946 int pci_probe_reset_slot(struct pci_slot *slot);
947 int pci_reset_slot(struct pci_slot *slot);
948 int pci_probe_reset_bus(struct pci_bus *bus);
949 int pci_reset_bus(struct pci_bus *bus);
950 void pci_reset_bridge_secondary_bus(struct pci_dev *dev);
951 void pci_update_resource(struct pci_dev *dev, int resno);
952 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
953 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
954 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
956 /* ROM control related routines */
957 int pci_enable_rom(struct pci_dev *pdev);
958 void pci_disable_rom(struct pci_dev *pdev);
959 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
960 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
961 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
962 void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
964 /* Power management related routines */
965 int pci_save_state(struct pci_dev *dev);
966 void pci_restore_state(struct pci_dev *dev);
967 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
968 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
969 int pci_load_and_free_saved_state(struct pci_dev *dev,
970 struct pci_saved_state **state);
971 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
972 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
973 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
974 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
975 void pci_pme_active(struct pci_dev *dev, bool enable);
976 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
977 bool runtime, bool enable);
978 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
979 pci_power_t pci_target_state(struct pci_dev *dev);
980 int pci_prepare_to_sleep(struct pci_dev *dev);
981 int pci_back_from_sleep(struct pci_dev *dev);
982 bool pci_dev_run_wake(struct pci_dev *dev);
983 bool pci_check_pme_status(struct pci_dev *dev);
984 void pci_pme_wakeup_bus(struct pci_bus *bus);
986 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
989 return __pci_enable_wake(dev, state, false, enable);
992 #define PCI_EXP_IDO_REQUEST (1<<0)
993 #define PCI_EXP_IDO_COMPLETION (1<<1)
994 void pci_enable_ido(struct pci_dev *dev, unsigned long type);
995 void pci_disable_ido(struct pci_dev *dev, unsigned long type);
997 enum pci_obff_signal_type {
998 PCI_EXP_OBFF_SIGNAL_L0 = 0,
999 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
1001 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
1002 void pci_disable_obff(struct pci_dev *dev);
1004 int pci_enable_ltr(struct pci_dev *dev);
1005 void pci_disable_ltr(struct pci_dev *dev);
1006 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
1008 /* For use by arch with custom probe code */
1009 void set_pcie_port_type(struct pci_dev *pdev);
1010 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
1012 /* Functions for PCI Hotplug drivers to use */
1013 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1014 unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
1015 unsigned int pci_rescan_bus(struct pci_bus *bus);
1017 /* Vital product data routines */
1018 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
1019 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
1020 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
1022 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
1023 resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx);
1024 void pci_bus_assign_resources(const struct pci_bus *bus);
1025 void pci_bus_size_bridges(struct pci_bus *bus);
1026 int pci_claim_resource(struct pci_dev *, int);
1027 void pci_assign_unassigned_resources(void);
1028 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
1029 void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
1030 void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
1031 void pdev_enable_device(struct pci_dev *);
1032 int pci_enable_resources(struct pci_dev *, int mask);
1033 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
1034 int (*)(const struct pci_dev *, u8, u8));
1035 #define HAVE_PCI_REQ_REGIONS 2
1036 int __must_check pci_request_regions(struct pci_dev *, const char *);
1037 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
1038 void pci_release_regions(struct pci_dev *);
1039 int __must_check pci_request_region(struct pci_dev *, int, const char *);
1040 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
1041 void pci_release_region(struct pci_dev *, int);
1042 int pci_request_selected_regions(struct pci_dev *, int, const char *);
1043 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
1044 void pci_release_selected_regions(struct pci_dev *, int);
1046 /* drivers/pci/bus.c */
1047 struct pci_bus *pci_bus_get(struct pci_bus *bus);
1048 void pci_bus_put(struct pci_bus *bus);
1049 void pci_add_resource(struct list_head *resources, struct resource *res);
1050 void pci_add_resource_offset(struct list_head *resources, struct resource *res,
1051 resource_size_t offset);
1052 void pci_free_resource_list(struct list_head *resources);
1053 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
1054 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
1055 void pci_bus_remove_resources(struct pci_bus *bus);
1057 #define pci_bus_for_each_resource(bus, res, i) \
1059 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
1062 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
1063 struct resource *res, resource_size_t size,
1064 resource_size_t align, resource_size_t min,
1065 unsigned int type_mask,
1066 resource_size_t (*alignf)(void *,
1067 const struct resource *,
1072 /* Proper probing supporting hot-pluggable devices */
1073 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
1074 const char *mod_name);
1077 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
1079 #define pci_register_driver(driver) \
1080 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
1082 void pci_unregister_driver(struct pci_driver *dev);
1085 * module_pci_driver() - Helper macro for registering a PCI driver
1086 * @__pci_driver: pci_driver struct
1088 * Helper macro for PCI drivers which do not do anything special in module
1089 * init/exit. This eliminates a lot of boilerplate. Each module may only
1090 * use this macro once, and calling it replaces module_init() and module_exit()
1092 #define module_pci_driver(__pci_driver) \
1093 module_driver(__pci_driver, pci_register_driver, \
1094 pci_unregister_driver)
1096 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
1097 int pci_add_dynid(struct pci_driver *drv,
1098 unsigned int vendor, unsigned int device,
1099 unsigned int subvendor, unsigned int subdevice,
1100 unsigned int class, unsigned int class_mask,
1101 unsigned long driver_data);
1102 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
1103 struct pci_dev *dev);
1104 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
1107 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
1109 int pci_cfg_space_size_ext(struct pci_dev *dev);
1110 int pci_cfg_space_size(struct pci_dev *dev);
1111 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
1112 void pci_setup_bridge(struct pci_bus *bus);
1113 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
1114 unsigned long type);
1116 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
1117 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
1119 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1120 unsigned int command_bits, u32 flags);
1121 /* kmem_cache style wrapper around pci_alloc_consistent() */
1123 #include <linux/pci-dma.h>
1124 #include <linux/dmapool.h>
1126 #define pci_pool dma_pool
1127 #define pci_pool_create(name, pdev, size, align, allocation) \
1128 dma_pool_create(name, &pdev->dev, size, align, allocation)
1129 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
1130 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
1131 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
1133 enum pci_dma_burst_strategy {
1134 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
1135 strategy_parameter is N/A */
1136 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
1138 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
1139 strategy_parameter byte boundaries */
1143 u32 vector; /* kernel uses to write allocated vector */
1144 u16 entry; /* driver uses to specify entry, OS writes */
1148 #ifndef CONFIG_PCI_MSI
1149 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
1155 pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
1160 static inline void pci_msi_shutdown(struct pci_dev *dev)
1162 static inline void pci_disable_msi(struct pci_dev *dev)
1165 static inline int pci_msix_table_size(struct pci_dev *dev)
1169 static inline int pci_enable_msix(struct pci_dev *dev,
1170 struct msix_entry *entries, int nvec)
1175 static inline void pci_msix_shutdown(struct pci_dev *dev)
1177 static inline void pci_disable_msix(struct pci_dev *dev)
1180 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
1183 static inline void pci_restore_msi_state(struct pci_dev *dev)
1185 static inline int pci_msi_enabled(void)
1190 int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
1191 int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec);
1192 void pci_msi_shutdown(struct pci_dev *dev);
1193 void pci_disable_msi(struct pci_dev *dev);
1194 int pci_msix_table_size(struct pci_dev *dev);
1195 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec);
1196 void pci_msix_shutdown(struct pci_dev *dev);
1197 void pci_disable_msix(struct pci_dev *dev);
1198 void msi_remove_pci_irq_vectors(struct pci_dev *dev);
1199 void pci_restore_msi_state(struct pci_dev *dev);
1200 int pci_msi_enabled(void);
1203 #ifdef CONFIG_PCIEPORTBUS
1204 extern bool pcie_ports_disabled;
1205 extern bool pcie_ports_auto;
1207 #define pcie_ports_disabled true
1208 #define pcie_ports_auto false
1211 #ifndef CONFIG_PCIEASPM
1212 static inline int pcie_aspm_enabled(void) { return 0; }
1213 static inline bool pcie_aspm_support_enabled(void) { return false; }
1215 int pcie_aspm_enabled(void);
1216 bool pcie_aspm_support_enabled(void);
1219 #ifdef CONFIG_PCIEAER
1220 void pci_no_aer(void);
1221 bool pci_aer_available(void);
1223 static inline void pci_no_aer(void) { }
1224 static inline bool pci_aer_available(void) { return false; }
1227 #ifndef CONFIG_PCIE_ECRC
1228 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
1232 static inline void pcie_ecrc_get_policy(char *str) {};
1234 void pcie_set_ecrc_checking(struct pci_dev *dev);
1235 void pcie_ecrc_get_policy(char *str);
1238 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1240 #ifdef CONFIG_HT_IRQ
1241 /* The functions a driver should call */
1242 int ht_create_irq(struct pci_dev *dev, int idx);
1243 void ht_destroy_irq(unsigned int irq);
1244 #endif /* CONFIG_HT_IRQ */
1246 void pci_cfg_access_lock(struct pci_dev *dev);
1247 bool pci_cfg_access_trylock(struct pci_dev *dev);
1248 void pci_cfg_access_unlock(struct pci_dev *dev);
1251 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1252 * a PCI domain is defined to be a set of PCI busses which share
1253 * configuration space.
1255 #ifdef CONFIG_PCI_DOMAINS
1256 extern int pci_domains_supported;
1258 enum { pci_domains_supported = 0 };
1259 static inline int pci_domain_nr(struct pci_bus *bus)
1264 static inline int pci_proc_domain(struct pci_bus *bus)
1268 #endif /* CONFIG_PCI_DOMAINS */
1270 /* some architectures require additional setup to direct VGA traffic */
1271 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1272 unsigned int command_bits, u32 flags);
1273 void pci_register_set_vga_state(arch_set_vga_state_t func);
1275 #else /* CONFIG_PCI is not enabled */
1278 * If the system does not have PCI, clearly these return errors. Define
1279 * these as simple inline functions to avoid hair in drivers.
1282 #define _PCI_NOP(o, s, t) \
1283 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1285 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1287 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1288 _PCI_NOP(o, word, u16 x) \
1289 _PCI_NOP(o, dword, u32 x)
1290 _PCI_NOP_ALL(read, *)
1291 _PCI_NOP_ALL(write,)
1293 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1294 unsigned int device,
1295 struct pci_dev *from)
1300 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1301 unsigned int device,
1302 unsigned int ss_vendor,
1303 unsigned int ss_device,
1304 struct pci_dev *from)
1309 static inline struct pci_dev *pci_get_class(unsigned int class,
1310 struct pci_dev *from)
1315 #define pci_dev_present(ids) (0)
1316 #define no_pci_devices() (1)
1317 #define pci_dev_put(dev) do { } while (0)
1319 static inline void pci_set_master(struct pci_dev *dev)
1322 static inline int pci_enable_device(struct pci_dev *dev)
1327 static inline void pci_disable_device(struct pci_dev *dev)
1330 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1335 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1340 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1346 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1352 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1357 static inline int __pci_register_driver(struct pci_driver *drv,
1358 struct module *owner)
1363 static inline int pci_register_driver(struct pci_driver *drv)
1368 static inline void pci_unregister_driver(struct pci_driver *drv)
1371 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1376 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1382 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1387 /* Power management related routines */
1388 static inline int pci_save_state(struct pci_dev *dev)
1393 static inline void pci_restore_state(struct pci_dev *dev)
1396 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1401 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1406 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1412 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1418 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1422 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1426 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1431 static inline void pci_disable_obff(struct pci_dev *dev)
1435 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1440 static inline void pci_release_regions(struct pci_dev *dev)
1443 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1445 static inline void pci_block_cfg_access(struct pci_dev *dev)
1448 static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
1451 static inline void pci_unblock_cfg_access(struct pci_dev *dev)
1454 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1457 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1461 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1465 static inline int pci_domain_nr(struct pci_bus *bus)
1468 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev)
1471 #define dev_is_pci(d) (false)
1472 #define dev_is_pf(d) (false)
1473 #define dev_num_vf(d) (0)
1474 #endif /* CONFIG_PCI */
1476 /* Include architecture-dependent settings and functions */
1478 #include <asm/pci.h>
1480 #ifndef PCIBIOS_MAX_MEM_32
1481 #define PCIBIOS_MAX_MEM_32 (-1)
1484 /* these helpers provide future and backwards compatibility
1485 * for accessing popular PCI BAR info */
1486 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1487 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1488 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1489 #define pci_resource_len(dev,bar) \
1490 ((pci_resource_start((dev), (bar)) == 0 && \
1491 pci_resource_end((dev), (bar)) == \
1492 pci_resource_start((dev), (bar))) ? 0 : \
1494 (pci_resource_end((dev), (bar)) - \
1495 pci_resource_start((dev), (bar)) + 1))
1497 /* Similar to the helpers above, these manipulate per-pci_dev
1498 * driver-specific data. They are really just a wrapper around
1499 * the generic device structure functions of these calls.
1501 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1503 return dev_get_drvdata(&pdev->dev);
1506 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1508 dev_set_drvdata(&pdev->dev, data);
1511 /* If you want to know what to call your pci_dev, ask this function.
1512 * Again, it's a wrapper around the generic device.
1514 static inline const char *pci_name(const struct pci_dev *pdev)
1516 return dev_name(&pdev->dev);
1520 /* Some archs don't want to expose struct resource to userland as-is
1521 * in sysfs and /proc
1523 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1524 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1525 const struct resource *rsrc, resource_size_t *start,
1526 resource_size_t *end)
1528 *start = rsrc->start;
1531 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1535 * The world is not perfect and supplies us with broken PCI devices.
1536 * For at least a part of these bugs we need a work-around, so both
1537 * generic (drivers/pci/quirks.c) and per-architecture code can define
1538 * fixup hooks to be called for particular buggy devices.
1542 u16 vendor; /* You can use PCI_ANY_ID here of course */
1543 u16 device; /* You can use PCI_ANY_ID here of course */
1544 u32 class; /* You can use PCI_ANY_ID here too */
1545 unsigned int class_shift; /* should be 0, 8, 16 */
1546 void (*hook)(struct pci_dev *dev);
1549 enum pci_fixup_pass {
1550 pci_fixup_early, /* Before probing BARs */
1551 pci_fixup_header, /* After reading configuration header */
1552 pci_fixup_final, /* Final phase of device fixups */
1553 pci_fixup_enable, /* pci_enable_device() time */
1554 pci_fixup_resume, /* pci_device_resume() */
1555 pci_fixup_suspend, /* pci_device_suspend */
1556 pci_fixup_resume_early, /* pci_device_resume_early() */
1559 /* Anonymous variables would be nice... */
1560 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, class, \
1561 class_shift, hook) \
1562 static const struct pci_fixup __pci_fixup_##name __used \
1563 __attribute__((__section__(#section), aligned((sizeof(void *))))) \
1564 = { vendor, device, class, class_shift, hook };
1566 #define DECLARE_PCI_FIXUP_CLASS_EARLY(vendor, device, class, \
1567 class_shift, hook) \
1568 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1569 vendor##device##hook, vendor, device, class, class_shift, hook)
1570 #define DECLARE_PCI_FIXUP_CLASS_HEADER(vendor, device, class, \
1571 class_shift, hook) \
1572 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1573 vendor##device##hook, vendor, device, class, class_shift, hook)
1574 #define DECLARE_PCI_FIXUP_CLASS_FINAL(vendor, device, class, \
1575 class_shift, hook) \
1576 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1577 vendor##device##hook, vendor, device, class, class_shift, hook)
1578 #define DECLARE_PCI_FIXUP_CLASS_ENABLE(vendor, device, class, \
1579 class_shift, hook) \
1580 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1581 vendor##device##hook, vendor, device, class, class_shift, hook)
1582 #define DECLARE_PCI_FIXUP_CLASS_RESUME(vendor, device, class, \
1583 class_shift, hook) \
1584 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1585 resume##vendor##device##hook, vendor, device, class, \
1587 #define DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(vendor, device, class, \
1588 class_shift, hook) \
1589 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1590 resume_early##vendor##device##hook, vendor, device, \
1591 class, class_shift, hook)
1592 #define DECLARE_PCI_FIXUP_CLASS_SUSPEND(vendor, device, class, \
1593 class_shift, hook) \
1594 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1595 suspend##vendor##device##hook, vendor, device, class, \
1598 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1599 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1600 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1601 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1602 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1603 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1604 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1605 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1606 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1607 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1608 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1609 vendor##device##hook, vendor, device, PCI_ANY_ID, 0, hook)
1610 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1611 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1612 resume##vendor##device##hook, vendor, device, \
1613 PCI_ANY_ID, 0, hook)
1614 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1615 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1616 resume_early##vendor##device##hook, vendor, device, \
1617 PCI_ANY_ID, 0, hook)
1618 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1619 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1620 suspend##vendor##device##hook, vendor, device, \
1621 PCI_ANY_ID, 0, hook)
1623 #ifdef CONFIG_PCI_QUIRKS
1624 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1625 struct pci_dev *pci_get_dma_source(struct pci_dev *dev);
1626 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1628 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1629 struct pci_dev *dev) {}
1630 static inline struct pci_dev *pci_get_dma_source(struct pci_dev *dev)
1632 return pci_dev_get(dev);
1634 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1641 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1642 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1643 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1644 int pcim_iomap_regions(struct pci_dev *pdev, int mask, const char *name);
1645 int pcim_iomap_regions_request_all(struct pci_dev *pdev, int mask,
1647 void pcim_iounmap_regions(struct pci_dev *pdev, int mask);
1649 extern int pci_pci_problems;
1650 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1651 #define PCIPCI_TRITON 2
1652 #define PCIPCI_NATOMA 4
1653 #define PCIPCI_VIAETBF 8
1654 #define PCIPCI_VSFX 16
1655 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1656 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1658 extern unsigned long pci_cardbus_io_size;
1659 extern unsigned long pci_cardbus_mem_size;
1660 extern u8 pci_dfl_cache_line_size;
1661 extern u8 pci_cache_line_size;
1663 extern unsigned long pci_hotplug_io_size;
1664 extern unsigned long pci_hotplug_mem_size;
1666 /* Architecture specific versions may override these (weak) */
1667 int pcibios_add_platform_entries(struct pci_dev *dev);
1668 void pcibios_disable_device(struct pci_dev *dev);
1669 void pcibios_set_master(struct pci_dev *dev);
1670 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1671 enum pcie_reset_state state);
1672 int pcibios_add_device(struct pci_dev *dev);
1673 void pcibios_release_device(struct pci_dev *dev);
1675 #ifdef CONFIG_HIBERNATE_CALLBACKS
1676 extern struct dev_pm_ops pcibios_pm_ops;
1679 #ifdef CONFIG_PCI_MMCONFIG
1680 void __init pci_mmcfg_early_init(void);
1681 void __init pci_mmcfg_late_init(void);
1683 static inline void pci_mmcfg_early_init(void) { }
1684 static inline void pci_mmcfg_late_init(void) { }
1687 int pci_ext_cfg_avail(void);
1689 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1691 #ifdef CONFIG_PCI_IOV
1692 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1693 void pci_disable_sriov(struct pci_dev *dev);
1694 irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1695 int pci_num_vf(struct pci_dev *dev);
1696 int pci_vfs_assigned(struct pci_dev *dev);
1697 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
1698 int pci_sriov_get_totalvfs(struct pci_dev *dev);
1700 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1704 static inline void pci_disable_sriov(struct pci_dev *dev)
1707 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1711 static inline int pci_num_vf(struct pci_dev *dev)
1715 static inline int pci_vfs_assigned(struct pci_dev *dev)
1719 static inline int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
1723 static inline int pci_sriov_get_totalvfs(struct pci_dev *dev)
1729 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1730 void pci_hp_create_module_link(struct pci_slot *pci_slot);
1731 void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1735 * pci_pcie_cap - get the saved PCIe capability offset
1738 * PCIe capability offset is calculated at PCI device initialization
1739 * time and saved in the data structure. This function returns saved
1740 * PCIe capability offset. Using this instead of pci_find_capability()
1741 * reduces unnecessary search in the PCI configuration space. If you
1742 * need to calculate PCIe capability offset from raw device for some
1743 * reasons, please use pci_find_capability() instead.
1745 static inline int pci_pcie_cap(struct pci_dev *dev)
1747 return dev->pcie_cap;
1751 * pci_is_pcie - check if the PCI device is PCI Express capable
1754 * Returns: true if the PCI device is PCI Express capable, false otherwise.
1756 static inline bool pci_is_pcie(struct pci_dev *dev)
1758 return pci_pcie_cap(dev);
1762 * pcie_caps_reg - get the PCIe Capabilities Register
1765 static inline u16 pcie_caps_reg(const struct pci_dev *dev)
1767 return dev->pcie_flags_reg;
1771 * pci_pcie_type - get the PCIe device/port type
1774 static inline int pci_pcie_type(const struct pci_dev *dev)
1776 return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1779 void pci_request_acs(void);
1780 bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1781 bool pci_acs_path_enabled(struct pci_dev *start,
1782 struct pci_dev *end, u16 acs_flags);
1784 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1785 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1787 /* Large Resource Data Type Tag Item Names */
1788 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1789 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1790 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1792 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1793 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1794 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1796 /* Small Resource Data Type Tag Item Names */
1797 #define PCI_VPD_STIN_END 0x78 /* End */
1799 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1801 #define PCI_VPD_SRDT_TIN_MASK 0x78
1802 #define PCI_VPD_SRDT_LEN_MASK 0x07
1804 #define PCI_VPD_LRDT_TAG_SIZE 3
1805 #define PCI_VPD_SRDT_TAG_SIZE 1
1807 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1809 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1810 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1811 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1812 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1815 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1816 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1818 * Returns the extracted Large Resource Data Type length.
1820 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1822 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1826 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1827 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1829 * Returns the extracted Small Resource Data Type length.
1831 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1833 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1837 * pci_vpd_info_field_size - Extracts the information field length
1838 * @lrdt: Pointer to the beginning of an information field header
1840 * Returns the extracted information field length.
1842 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1844 return info_field[2];
1848 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1849 * @buf: Pointer to buffered vpd data
1850 * @off: The offset into the buffer at which to begin the search
1851 * @len: The length of the vpd buffer
1852 * @rdt: The Resource Data Type to search for
1854 * Returns the index where the Resource Data Type was found or
1855 * -ENOENT otherwise.
1857 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1860 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1861 * @buf: Pointer to buffered vpd data
1862 * @off: The offset into the buffer at which to begin the search
1863 * @len: The length of the buffer area, relative to off, in which to search
1864 * @kw: The keyword to search for
1866 * Returns the index where the information field keyword was found or
1867 * -ENOENT otherwise.
1869 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1870 unsigned int len, const char *kw);
1872 /* PCI <-> OF binding helpers */
1875 void pci_set_of_node(struct pci_dev *dev);
1876 void pci_release_of_node(struct pci_dev *dev);
1877 void pci_set_bus_of_node(struct pci_bus *bus);
1878 void pci_release_bus_of_node(struct pci_bus *bus);
1880 /* Arch may override this (weak) */
1881 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus);
1883 static inline struct device_node *
1884 pci_device_to_OF_node(const struct pci_dev *pdev)
1886 return pdev ? pdev->dev.of_node : NULL;
1889 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1891 return bus ? bus->dev.of_node : NULL;
1894 #else /* CONFIG_OF */
1895 static inline void pci_set_of_node(struct pci_dev *dev) { }
1896 static inline void pci_release_of_node(struct pci_dev *dev) { }
1897 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1898 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1899 #endif /* CONFIG_OF */
1902 static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev)
1904 return pdev->dev.archdata.edev;
1909 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
1910 * @pdev: the PCI device
1912 * if the device is PCIE, return NULL
1913 * if the device isn't connected to a PCIe bridge (that is its parent is a
1914 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
1917 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
1919 #endif /* LINUX_PCI_H */