4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/mod_devicetable.h>
22 /* Include the pci register defines */
23 #include <linux/pci_regs.h>
25 /* Include the ID list */
26 #include <linux/pci_ids.h>
29 * The PCI interface treats multi-function devices as independent
30 * devices. The slot/function address of each device is encoded
31 * in a single byte as follows:
36 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
37 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
38 #define PCI_FUNC(devfn) ((devfn) & 0x07)
40 /* Ioctls for /proc/bus/pci/X/Y nodes. */
41 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
42 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
43 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
44 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
45 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
49 #include <linux/types.h>
50 #include <linux/config.h>
51 #include <linux/ioport.h>
52 #include <linux/list.h>
53 #include <linux/errno.h>
54 #include <linux/device.h>
56 /* File state for mmap()s on /proc/bus/pci/X/Y */
62 /* This defines the direction arg to the DMA mapping routines. */
63 #define PCI_DMA_BIDIRECTIONAL 0
64 #define PCI_DMA_TODEVICE 1
65 #define PCI_DMA_FROMDEVICE 2
66 #define PCI_DMA_NONE 3
68 #define DEVICE_COUNT_COMPATIBLE 4
69 #define DEVICE_COUNT_RESOURCE 12
71 typedef int __bitwise pci_power_t;
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
82 * The pci_dev structure is used to describe PCI devices.
85 struct list_head global_list; /* node in list of all PCI devices */
86 struct list_head bus_list; /* node in per-bus list */
87 struct pci_bus *bus; /* bus this device is on */
88 struct pci_bus *subordinate; /* bus this device bridges to */
90 void *sysdata; /* hook for sys-specific extension */
91 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
93 unsigned int devfn; /* encoded device & function index */
94 unsigned short vendor;
95 unsigned short device;
96 unsigned short subsystem_vendor;
97 unsigned short subsystem_device;
98 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
99 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
100 u8 rom_base_reg; /* which config register controls the ROM */
102 struct pci_driver *driver; /* which driver has allocated this device */
103 u64 dma_mask; /* Mask of the bits of bus address this
104 device implements. Normally this is
105 0xffffffff. You only need to change
106 this if your device has broken DMA
107 or supports 64-bit transfers. */
109 pci_power_t current_state; /* Current operating state. In ACPI-speak,
110 this is D0-D3, D0 being fully functional,
113 struct device dev; /* Generic device interface */
115 /* device is compatible with these IDs */
116 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
117 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
119 int cfg_size; /* Size of configuration space */
122 * Instead of touching interrupt line and base address registers
123 * directly, use the values stored here. They might be different!
126 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
128 /* These fields are used by common fixups */
129 unsigned int transparent:1; /* Transparent PCI bridge */
130 unsigned int multifunction:1;/* Part of multi-function device */
131 /* keep track of device state */
132 unsigned int is_enabled:1; /* pci_enable_device has been called */
133 unsigned int is_busmaster:1; /* device is busmaster */
134 unsigned int no_msi:1; /* device may not use msi */
135 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
137 u32 saved_config_space[16]; /* config space saved at suspend time */
138 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
139 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
140 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
143 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
144 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
145 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
146 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
149 * For PCI devices, the region numbers are assigned this way:
151 * 0-5 standard PCI regions
153 * 7-10 bridges: address space assigned to buses behind the bridge
156 #define PCI_ROM_RESOURCE 6
157 #define PCI_BRIDGE_RESOURCES 7
158 #define PCI_NUM_RESOURCES 11
160 #ifndef PCI_BUS_NUM_RESOURCES
161 #define PCI_BUS_NUM_RESOURCES 8
164 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
167 struct list_head node; /* node in list of buses */
168 struct pci_bus *parent; /* parent bus this bridge is on */
169 struct list_head children; /* list of child buses */
170 struct list_head devices; /* list of devices on this bus */
171 struct pci_dev *self; /* bridge device as seen by parent */
172 struct resource *resource[PCI_BUS_NUM_RESOURCES];
173 /* address space routed to this bus */
175 struct pci_ops *ops; /* configuration access functions */
176 void *sysdata; /* hook for sys-specific extension */
177 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
179 unsigned char number; /* bus number */
180 unsigned char primary; /* number of primary bridge */
181 unsigned char secondary; /* number of secondary bridge */
182 unsigned char subordinate; /* max number of subordinate buses */
186 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
188 struct device *bridge;
189 struct class_device class_dev;
190 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
191 struct bin_attribute *legacy_mem; /* legacy mem */
194 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
195 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
198 * Error values that may be returned by PCI functions.
200 #define PCIBIOS_SUCCESSFUL 0x00
201 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
202 #define PCIBIOS_BAD_VENDOR_ID 0x83
203 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
204 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
205 #define PCIBIOS_SET_FAILED 0x88
206 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
208 /* Low-level architecture-dependent routines */
211 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
212 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
216 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
217 int reg, int len, u32 *val);
218 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
219 int reg, int len, u32 val);
222 extern struct pci_raw_ops *raw_pci_ops;
224 struct pci_bus_region {
230 spinlock_t lock; /* protects list, index */
231 struct list_head list; /* for IDs added at runtime */
232 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
237 struct list_head node;
239 struct module *owner;
240 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
241 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
242 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
243 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
244 int (*resume) (struct pci_dev *dev); /* Device woken up */
245 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
246 void (*shutdown) (struct pci_dev *dev);
248 struct device_driver driver;
249 struct pci_dynids dynids;
252 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
255 * PCI_DEVICE - macro used to describe a specific pci device
256 * @vend: the 16 bit PCI Vendor ID
257 * @dev: the 16 bit PCI Device ID
259 * This macro is used to create a struct pci_device_id that matches a
260 * specific device. The subvendor and subdevice fields will be set to
263 #define PCI_DEVICE(vend,dev) \
264 .vendor = (vend), .device = (dev), \
265 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
268 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
269 * @dev_class: the class, subclass, prog-if triple for this device
270 * @dev_class_mask: the class mask for this device
272 * This macro is used to create a struct pci_device_id that matches a
273 * specific PCI class. The vendor, device, subvendor, and subdevice
274 * fields will be set to PCI_ANY_ID.
276 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
277 .class = (dev_class), .class_mask = (dev_class_mask), \
278 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
279 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
282 * pci_module_init is obsolete, this stays here till we fix up all usages of it
285 #define pci_module_init pci_register_driver
287 /* these external functions are only available when PCI support is enabled */
290 extern struct bus_type pci_bus_type;
292 /* Do NOT directly access these two variables, unless you are arch specific pci
293 * code, or pci core code. */
294 extern struct list_head pci_root_buses; /* list of all known PCI buses */
295 extern struct list_head pci_devices; /* list of all devices */
297 void pcibios_fixup_bus(struct pci_bus *);
298 int pcibios_enable_device(struct pci_dev *, int mask);
299 char *pcibios_setup (char *str);
301 /* Used only when drivers/pci/setup.c is used */
302 void pcibios_align_resource(void *, struct resource *,
303 unsigned long, unsigned long);
304 void pcibios_update_irq(struct pci_dev *, int irq);
306 /* Generic PCI functions used internally */
308 extern struct pci_bus *pci_find_bus(int domain, int busnr);
309 void pci_bus_add_devices(struct pci_bus *bus);
310 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
311 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
313 struct pci_bus *root_bus;
314 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
316 pci_bus_add_devices(root_bus);
319 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
320 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
321 int pci_scan_slot(struct pci_bus *bus, int devfn);
322 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
323 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
324 unsigned int pci_scan_child_bus(struct pci_bus *bus);
325 void pci_bus_add_device(struct pci_dev *dev);
326 void pci_read_bridge_bases(struct pci_bus *child);
327 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
328 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
329 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
330 extern void pci_dev_put(struct pci_dev *dev);
331 extern void pci_remove_bus(struct pci_bus *b);
332 extern void pci_remove_bus_device(struct pci_dev *dev);
333 void pci_setup_cardbus(struct pci_bus *bus);
335 /* Generic PCI functions exported to card drivers */
337 struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
338 struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
339 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
340 int pci_find_capability (struct pci_dev *dev, int cap);
341 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
342 int pci_find_ext_capability (struct pci_dev *dev, int cap);
343 struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
345 struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
346 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
347 unsigned int ss_vendor, unsigned int ss_device,
348 struct pci_dev *from);
349 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
350 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
351 int pci_dev_present(const struct pci_device_id *ids);
353 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
354 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
355 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
356 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
357 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
358 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
360 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
362 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
364 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
366 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
368 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
370 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
372 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
374 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
376 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
378 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
380 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
382 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
385 int pci_enable_device(struct pci_dev *dev);
386 int pci_enable_device_bars(struct pci_dev *dev, int mask);
387 void pci_disable_device(struct pci_dev *dev);
388 void pci_set_master(struct pci_dev *dev);
389 #define HAVE_PCI_SET_MWI
390 int pci_set_mwi(struct pci_dev *dev);
391 void pci_clear_mwi(struct pci_dev *dev);
392 void pci_intx(struct pci_dev *dev, int enable);
393 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
394 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
395 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
396 int pci_assign_resource(struct pci_dev *dev, int i);
397 void pci_restore_bars(struct pci_dev *dev);
399 /* ROM control related routines */
400 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
401 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
402 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
403 void pci_remove_rom(struct pci_dev *pdev);
405 /* Power management related routines */
406 int pci_save_state(struct pci_dev *dev);
407 int pci_restore_state(struct pci_dev *dev);
408 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
409 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
410 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
412 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
413 void pci_bus_assign_resources(struct pci_bus *bus);
414 void pci_bus_size_bridges(struct pci_bus *bus);
415 int pci_claim_resource(struct pci_dev *, int);
416 void pci_assign_unassigned_resources(void);
417 void pdev_enable_device(struct pci_dev *);
418 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
419 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
420 int (*)(struct pci_dev *, u8, u8));
421 #define HAVE_PCI_REQ_REGIONS 2
422 int pci_request_regions(struct pci_dev *, char *);
423 void pci_release_regions(struct pci_dev *);
424 int pci_request_region(struct pci_dev *, int, char *);
425 void pci_release_region(struct pci_dev *, int);
427 /* drivers/pci/bus.c */
428 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
429 unsigned long size, unsigned long align,
430 unsigned long min, unsigned int type_mask,
431 void (*alignf)(void *, struct resource *,
432 unsigned long, unsigned long),
434 void pci_enable_bridges(struct pci_bus *bus);
436 /* New-style probing supporting hot-pluggable devices */
437 int pci_register_driver(struct pci_driver *);
438 void pci_unregister_driver(struct pci_driver *);
439 void pci_remove_behind_bridge(struct pci_dev *);
440 struct pci_driver *pci_dev_driver(const struct pci_dev *);
441 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
442 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
443 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
445 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
448 /* kmem_cache style wrapper around pci_alloc_consistent() */
450 #include <linux/dmapool.h>
452 #define pci_pool dma_pool
453 #define pci_pool_create(name, pdev, size, align, allocation) \
454 dma_pool_create(name, &pdev->dev, size, align, allocation)
455 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
456 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
457 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
459 enum pci_dma_burst_strategy {
460 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
461 strategy_parameter is N/A */
462 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
464 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
465 strategy_parameter byte boundaries */
468 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
469 extern struct pci_dev *isa_bridge;
473 u16 vector; /* kernel uses to write allocated vector */
474 u16 entry; /* driver uses to specify entry, OS writes */
477 #ifndef CONFIG_PCI_MSI
478 static inline void pci_scan_msi_device(struct pci_dev *dev) {}
479 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
480 static inline void pci_disable_msi(struct pci_dev *dev) {}
481 static inline int pci_enable_msix(struct pci_dev* dev,
482 struct msix_entry *entries, int nvec) {return -1;}
483 static inline void pci_disable_msix(struct pci_dev *dev) {}
484 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
486 extern void pci_scan_msi_device(struct pci_dev *dev);
487 extern int pci_enable_msi(struct pci_dev *dev);
488 extern void pci_disable_msi(struct pci_dev *dev);
489 extern int pci_enable_msix(struct pci_dev* dev,
490 struct msix_entry *entries, int nvec);
491 extern void pci_disable_msix(struct pci_dev *dev);
492 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
495 extern void pci_block_user_cfg_access(struct pci_dev *dev);
496 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
499 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
500 * a PCI domain is defined to be a set of PCI busses which share
501 * configuration space.
503 #ifndef CONFIG_PCI_DOMAINS
504 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
505 static inline int pci_proc_domain(struct pci_bus *bus)
511 #else /* CONFIG_PCI is not enabled */
514 * If the system does not have PCI, clearly these return errors. Define
515 * these as simple inline functions to avoid hair in drivers.
518 #define _PCI_NOP(o,s,t) \
519 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
520 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
521 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
522 _PCI_NOP(o,word,u16 x) \
523 _PCI_NOP(o,dword,u32 x)
524 _PCI_NOP_ALL(read, *)
527 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
530 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
533 static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
536 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
537 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
540 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
543 #define pci_dev_present(ids) (0)
544 #define pci_dev_put(dev) do { } while (0)
546 static inline void pci_set_master(struct pci_dev *dev) { }
547 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
548 static inline void pci_disable_device(struct pci_dev *dev) { }
549 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
550 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
551 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
552 static inline void pci_unregister_driver(struct pci_driver *drv) { }
553 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
554 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
555 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
556 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
558 /* Power management related routines */
559 static inline int pci_save_state(struct pci_dev *dev) { return 0; }
560 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
561 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
562 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
563 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
565 #define isa_bridge ((struct pci_dev *)NULL)
567 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
569 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
570 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
572 #endif /* CONFIG_PCI */
574 /* Include architecture-dependent settings and functions */
578 /* these helpers provide future and backwards compatibility
579 * for accessing popular PCI BAR info */
580 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
581 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
582 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
583 #define pci_resource_len(dev,bar) \
584 ((pci_resource_start((dev),(bar)) == 0 && \
585 pci_resource_end((dev),(bar)) == \
586 pci_resource_start((dev),(bar))) ? 0 : \
588 (pci_resource_end((dev),(bar)) - \
589 pci_resource_start((dev),(bar)) + 1))
591 /* Similar to the helpers above, these manipulate per-pci_dev
592 * driver-specific data. They are really just a wrapper around
593 * the generic device structure functions of these calls.
595 static inline void *pci_get_drvdata (struct pci_dev *pdev)
597 return dev_get_drvdata(&pdev->dev);
600 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
602 dev_set_drvdata(&pdev->dev, data);
605 /* If you want to know what to call your pci_dev, ask this function.
606 * Again, it's a wrapper around the generic device.
608 static inline char *pci_name(struct pci_dev *pdev)
610 return pdev->dev.bus_id;
614 /* Some archs don't want to expose struct resource to userland as-is
617 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
618 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
619 const struct resource *rsrc, u64 *start, u64 *end)
621 *start = rsrc->start;
624 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
628 * The world is not perfect and supplies us with broken PCI devices.
629 * For at least a part of these bugs we need a work-around, so both
630 * generic (drivers/pci/quirks.c) and per-architecture code can define
631 * fixup hooks to be called for particular buggy devices.
635 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
636 void (*hook)(struct pci_dev *dev);
639 enum pci_fixup_pass {
640 pci_fixup_early, /* Before probing BARs */
641 pci_fixup_header, /* After reading configuration header */
642 pci_fixup_final, /* Final phase of device fixups */
643 pci_fixup_enable, /* pci_enable_device() time */
646 /* Anonymous variables would be nice... */
647 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
648 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
649 __attribute__((__section__(#section))) = { vendor, device, hook };
650 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
651 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
652 vendor##device##hook, vendor, device, hook)
653 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
654 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
655 vendor##device##hook, vendor, device, hook)
656 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
657 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
658 vendor##device##hook, vendor, device, hook)
659 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
660 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
661 vendor##device##hook, vendor, device, hook)
664 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
666 extern int pci_pci_problems;
667 #define PCIPCI_FAIL 1
668 #define PCIPCI_TRITON 2
669 #define PCIPCI_NATOMA 4
670 #define PCIPCI_VIAETBF 8
671 #define PCIPCI_VSFX 16
672 #define PCIPCI_ALIMAGIK 32
674 #endif /* __KERNEL__ */
675 #endif /* LINUX_PCI_H */